This patch adds pinmux code for I2C.
Signed-off-by: Rajeshwari Shinde <rajeshwar...@samsung.com>
Acked-by: Simon Glass <s...@chromium.org>
---
Changes in V2:
- Aligned the pinmux functionality as per the latest comments.
Changes in V3:
- None
Changes in V4:
- None
Changes in V5:
- None
Changes in V6:
- None
Changes in V7:
- None.
arch/arm/cpu/armv7/exynos/pinmux.c | 52 +++++++++++++++++++++++++++++
arch/arm/include/asm/arch-exynos/periph.h | 8 ++++
2 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 0e91a6c..7776add 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -188,6 +188,48 @@ static void exynos5_sromc_config(int flags)
}
}
+static void exynos5_i2c_config(int peripheral, int flags)
+{
+
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+ switch (peripheral) {
+ case PERIPH_ID_I2C0:
+ s5p_gpio_cfg_pin(&gpio1->b3, 0, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(&gpio1->b3, 1, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C1:
+ s5p_gpio_cfg_pin(&gpio1->b3, 2, GPIO_FUNC(0x2));
+ s5p_gpio_cfg_pin(&gpio1->b3, 3, GPIO_FUNC(0x2));
+ break;
+ case PERIPH_ID_I2C2:
+ s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C3:
+ s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C4:
+ s5p_gpio_cfg_pin(&gpio1->a2, 0, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a2, 1, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C5:
+ s5p_gpio_cfg_pin(&gpio1->a2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->a2, 3, GPIO_FUNC(0x3));
+ break;
+ case PERIPH_ID_I2C6:
+ s5p_gpio_cfg_pin(&gpio1->b1, 3, GPIO_FUNC(0x4));
+ s5p_gpio_cfg_pin(&gpio1->b1, 4, GPIO_FUNC(0x4));
+ break;
+ case PERIPH_ID_I2C7:
+ s5p_gpio_cfg_pin(&gpio1->b2, 2, GPIO_FUNC(0x3));
+ s5p_gpio_cfg_pin(&gpio1->b2, 3, GPIO_FUNC(0x3));
+ break;
+ }
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -205,6 +247,16 @@ static int exynos5_pinmux_config(int peripheral, int flags)
case PERIPH_ID_SROMC:
exynos5_sromc_config(flags);
break;
+ case PERIPH_ID_I2C0:
+ case PERIPH_ID_I2C1:
+ case PERIPH_ID_I2C2:
+ case PERIPH_ID_I2C3:
+ case PERIPH_ID_I2C4:
+ case PERIPH_ID_I2C5:
+ case PERIPH_ID_I2C6:
+ case PERIPH_ID_I2C7:
+ exynos5_i2c_config(peripheral, flags);
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 5db25aa..b861d7d 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -30,6 +30,14 @@
*
*/
enum periph_id {
+ PERIPH_ID_I2C0,
+ PERIPH_ID_I2C1,
+ PERIPH_ID_I2C2,
+ PERIPH_ID_I2C3,
+ PERIPH_ID_I2C4,
+ PERIPH_ID_I2C5,
+ PERIPH_ID_I2C6,
+ PERIPH_ID_I2C7,
PERIPH_ID_SDMMC0,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
--
1.7.4.4
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