Re: [U-Boot] [PATCH 5/6] board/BuR: provide real clock-frequency instead a divider

[Hannes Schmelzer]

Am 09.01.2018 um 09:28 schrieb Anatolij Gustschin:

Hi Hannes,

Hi Anatoli,


On Tue,  9 Jan 2018 07:58:46 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:
...

-   dtbprop = FDTPROP(PATHTIM, "clock-frequency");
-   if (dtbprop != ~0UL)
-   pnltmp.pxl_clk_div = 19200 / dtbprop;
-   else
-   pnltmp.pxl_clk_div = ~0UL;
+   pnltmp.pxl_clk_div = FDTPROP(PATHTIM, "clock-frequency");

did you test !CONFIG_USE_FDT case? This should be

 pnltmp.pxl_clk = FDTPROP(PATHTIM, "clock-frequency");

Thanks for catching this,  i've missed that.
Will prepare some V2 of the patch, sending it in the evening maybe some 
other improvements come up.

--
Anatolij

cheers,
Hannes

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Re: [U-Boot] [PATCH 5/6] board/BuR: provide real clock-frequency instead a divider

[Anatolij Gustschin]

Hi Hannes,

On Tue,  9 Jan 2018 07:58:46 +0100
Hannes Schmelzer oe5...@oevsv.at wrote:
...
> - dtbprop = FDTPROP(PATHTIM, "clock-frequency");
> - if (dtbprop != ~0UL)
> - pnltmp.pxl_clk_div = 19200 / dtbprop;
> - else
> - pnltmp.pxl_clk_div = ~0UL;
> + pnltmp.pxl_clk_div = FDTPROP(PATHTIM, "clock-frequency");

did you test !CONFIG_USE_FDT case? This should be

pnltmp.pxl_clk = FDTPROP(PATHTIM, "clock-frequency");


--
Anatolij
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[U-Boot] [PATCH 5/6] board/BuR: provide real clock-frequency instead a divider

[Hannes Schmelzer]

Actual am335x-fb implementation takes now a real clock frequency instead
a divider. So this component doesn't need to know anymore some base
frequency of the LCDC, we simply provide the pixel-clock frequency.

Signed-off-by: Hannes Schmelzer 
---

 board/BuR/common/common.c | 14 --
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 7e49cdf..0c64bed 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -146,13 +146,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len");
pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay");
pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay");
-
-   /* calc. proper clk-divisor */
-   dtbprop = FDTPROP(PATHTIM, "clock-frequency");
-   if (dtbprop != ~0UL)
-   pnltmp.pxl_clk_div = 19200 / dtbprop;
-   else
-   pnltmp.pxl_clk_div = ~0UL;
+   pnltmp.pxl_clk_div = FDTPROP(PATHTIM, "clock-frequency");
 
/* check polarity of control-signals */
dtbprop = FDTPROP(PATHTIM, "hsync-active");
@@ -202,7 +196,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
-   pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL);
+   pnltmp.pxl_clk = env_get_ulong("ds1_pxlclk", 10, ~0UL);
pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
@@ -218,7 +212,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
   ~0UL == (pnltmp.vfp) ||
   ~0UL == (pnltmp.vbp) ||
   ~0UL == (pnltmp.vsw) ||
-  ~0UL == (pnltmp.pxl_clk_div) ||
+  ~0UL == (pnltmp.pxl_clk) ||
   ~0UL == (pnltmp.pol) ||
   ~0UL == (pnltmp.pup_delay) ||
   ~0UL == (pnltmp.pon_delay)
@@ -241,7 +235,7 @@ int load_lcdtiming(struct am335x_lcdpanel *panel)
pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
-   pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
+   pnltmp.pxl_clk, pnltmp.pol, pnltmp.pon_delay);
 
return -1;
}
-- 
2.7.4

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