Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
At 23:58 27.01.2011 -0500, haiying.w...@freescale.com wrote: From: Haiying Wang haiying.w...@freescale.com Support P1021MDS board to boot from NAND flash (No NOR flash on this board). And because P1021 only has 256K L2 SRAM, which can not used for final uboot image, this patch also enables the TPL BOOT on P1021MDS so that DDR can be initialized in L2 SRAM through SPD code. So there are three stage uboot images: * nand_spl, pad from 4KB size to 16KB, load tpl_boot from offset 16KB in NAND. * tpl_boot, 112KB size. The env variables are copied to offset 128KB in L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 128KB in NAND. * final uboot image, size is variable depends on the functions enabled. I'm not questioning the patch, I'm just trying to understand. +#define CONFIG_MP /* Multiprocessor support */ + +#define CONFIG_PCI /* Disable PCI/PCIE */ Shouldn't that be Enable PCI? bye Fabi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
On Fri, 2011-01-28 at 11:02 +0100, Fabian Cenedese wrote: I'm not questioning the patch, I'm just trying to understand. +#define CONFIG_MP /* Multiprocessor support */ + +#define CONFIG_PCI /* Disable PCI/PCIE */ Shouldn't that be Enable PCI? Yes, you are right. Thanks for pointing out. Haiying ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
diff --git a/board/freescale/p1021mds/law.c b/board/freescale/p1021mds/law.c
new file mode 100644
index 000..d0be19e
--- /dev/null
+++ b/board/freescale/p1021mds/law.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2010 - 2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/fsl_law.h
+#include asm/mmu.h
+
+struct law_entry law_table[] = {
+#ifndef CONFIG_IN_TPL
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_2),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2),
PCIe LAWs are now set by common code, you can remove these.
- k
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
On Fri, 2011-01-28 at 08:49 -0600, Kumar Gala wrote:
+
+struct law_entry law_table[] = {
+#ifndef CONFIG_IN_TPL
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_2),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2),
PCIe LAWs are now set by common code, you can remove these.
Fixed it in v4 patch, thanks.
Haiying
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
On Thu, Jan 27, 2011 at 10:58 PM, haiying.w...@freescale.com wrote:
+/* These are used when DDR doesn't use SPD. */
+#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */
+#define CONFIG_SYS_DDR_CS0_BNDS 0x001F
+#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202
+#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x
+#define CONFIG_SYS_DDR_SDRAM_CFG 0x4700
+#define CONFIG_SYS_DDR_SDRAM_CFG_2 0x04401040
+#define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600
+#define CONFIG_SYS_DDR_WRLVL_CNTL 0x86559608
+#define CONFIG_SYS_DDR_CDR_1 0x000eaa00
+#define CONFIG_SYS_DDR_CDR_2 0x
+#define CONFIG_SYS_DDR_OCD_CTRL 0x
+#define CONFIG_SYS_DDR_OCD_STATUS 0x
+#define CONFIG_SYS_DDR_CONTROL 0x470c /* Type = DDR3 */
+#define CONFIG_SYS_DDR_CONTROL_2 0x04401050
+#define CONFIG_SYS_DDR_DATA_INIT 0x1021babe
+#define CONFIG_SYS_DDR_TIMING_3 0x0001
+#define CONFIG_SYS_DDR_TIMING_0 0x00330004
+#define CONFIG_SYS_DDR_TIMING_1 0x5d5bd746
+#define CONFIG_SYS_DDR_TIMING_2 0x0fa8c8cd
+#define CONFIG_SYS_DDR_SDRAM_MODE 0x40461320
+#define CONFIG_SYS_DDR_SDRAM_MODE_2 0x8000C000
+#define CONFIG_SYS_DDR_SDRAM_INTERVAL 0x0a28
+#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x0300
+#define CONFIG_SYS_DDR_TIMING_4 0x00220001
+#define CONFIG_SYS_DDR_TIMING_5 0x03402400
Aren't static DDR configurations now handled in a board-specific
source file? Look at board/freescale/corenet_ds/p4080ds_ddr.c
+#define CONFIG_ID_EEPROM
+#ifdef CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#endif
No need for the #ifdef here. CONFIG_SYS_I2C_EEPROM_NXID is not used
in any Makefile.
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
Not 0x57? That's where the NXID EEPROM almost always is.
+void putc(char c)
+{
+ if (c == '\n')
+ NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
+
+ NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
+}
+
+void puts(const char *str)
+{
+ while (*str)
+ putc(*str++);
+}
These look like functions that shouldn't be in board-specific code.
--
Timur Tabi
Linux kernel developer at Freescale
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
Haiying Wang wrote: +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 Not 0x57? That's where the NXID EEPROM almost always is. It is board specific value, isn't it? P1021MDS does use 0x52 for board eeprom. I just wanted you to be sure it wasn't a typo. Did you actual test reading and writing to the EEPROM with the 'mac' command? -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
On Fri, 2011-01-28 at 13:24 -0600, Timur Tabi wrote: Haiying Wang wrote: +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 Not 0x57? That's where the NXID EEPROM almost always is. It is board specific value, isn't it? P1021MDS does use 0x52 for board eeprom. I just wanted you to be sure it wasn't a typo. Did you actual test reading and writing to the EEPROM with the 'mac' command? Yes, I did test and have used it for almost one year. :) Haiying ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/8 v3] P1021: add P1021MDS board support
From: Haiying Wang haiying.w...@freescale.com Support P1021MDS board to boot from NAND flash (No NOR flash on this board). And because P1021 only has 256K L2 SRAM, which can not used for final uboot image, this patch also enables the TPL BOOT on P1021MDS so that DDR can be initialized in L2 SRAM through SPD code. So there are three stage uboot images: * nand_spl, pad from 4KB size to 16KB, load tpl_boot from offset 16KB in NAND. * tpl_boot, 112KB size. The env variables are copied to offset 128KB in L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 128KB in NAND. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Haiying Wang haiying.w...@freescale.com Signed-off-by: Mohit Kumar mohit.ku...@freescale.com Signed-off-by: Yu Liu yu@freescale.com Signed-off-by: Kai Jiang kai.ji...@freescale.com --- v3: use CONFIG_HAS_TPL and CONFIG_IN_TPL, update copyright year, remove pci.c, incoperate with the changes in upstream. MAINTAINERS |4 + board/freescale/p1021mds/Makefile | 52 +++ board/freescale/p1021mds/config.mk| 31 ++ board/freescale/p1021mds/ddr.c| 107 + board/freescale/p1021mds/law.c| 38 ++ board/freescale/p1021mds/p1021mds.c | 133 ++ board/freescale/p1021mds/tlb.c| 102 + boards.cfg|1 + include/configs/P1021MDS.h| 571 + nand_spl/board/freescale/p1021mds/Makefile| 134 ++ nand_spl/board/freescale/p1021mds/nand_boot.c | 69 +++ nand_spl/nand_boot_fsl_elbc.c |6 +- tpl/board/freescale/p1021mds/Makefile | 256 +++ tpl/board/freescale/p1021mds/tpl_boot.c | 79 14 files changed, 1582 insertions(+), 1 deletions(-) create mode 100644 board/freescale/p1021mds/Makefile create mode 100644 board/freescale/p1021mds/config.mk create mode 100644 board/freescale/p1021mds/ddr.c create mode 100644 board/freescale/p1021mds/law.c create mode 100644 board/freescale/p1021mds/p1021mds.c create mode 100644 board/freescale/p1021mds/tlb.c create mode 100644 include/configs/P1021MDS.h create mode 100644 nand_spl/board/freescale/p1021mds/Makefile create mode 100644 nand_spl/board/freescale/p1021mds/nand_boot.c create mode 100644 tpl/board/freescale/p1021mds/Makefile create mode 100644 tpl/board/freescale/p1021mds/tpl_boot.c diff --git a/MAINTAINERS b/MAINTAINERS index edd1c5c..da1b2a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17,6 +17,10 @@ # Board CPU # # +Haiying Wang haiying.w...@freescale.com + + P1021MDSP1021 + Poonam Aggrwal poonam.aggr...@freescale.com P2020RDBP2020 diff --git a/board/freescale/p1021mds/Makefile b/board/freescale/p1021mds/Makefile new file mode 100644 index 000..50d4743 --- /dev/null +++ b/board/freescale/p1021mds/Makefile @@ -0,0 +1,52 @@ +# +# Copyright (C) 2010-2011 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS-y+= $(BOARD).o +COBJS-y+= law.o +COBJS-y+= tlb.o +COBJS-y+= ddr.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/p1021mds/config.mk b/board/freescale/p1021mds/config.mk new file mode 100644 index 000..3888f61 --- /dev/null +++ b/board/freescale/p1021mds/config.mk @@ -0,0 +1,31 @@ +# +# Copyright (C)
