Re: [U-Boot] [PATCH 5/9] Revert "x86: fsp: Configure SPI opcode registers before SPI is locked down"

[Bin Meng]

On Thu, Oct 19, 2017 at 9:20 AM, Bin Meng  wrote:
> This reverts commit 1e6ebee667da47fd3a87839a239a7574c66f5659.
>
> It's not appropriate to call the Intel SPI driver specific stuff in
> the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
> and let the Intel SPI driver call these stuff instead.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/Kconfig  |  9 -
>  arch/x86/lib/fsp/fsp_common.c | 24 
>  2 files changed, 33 deletions(-)
>

applied to u-boot-x86, thanks!
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[U-Boot] [PATCH 5/9] Revert "x86: fsp: Configure SPI opcode registers before SPI is locked down"

[Bin Meng]

This reverts commit 1e6ebee667da47fd3a87839a239a7574c66f5659.

It's not appropriate to call the Intel SPI driver specific stuff in
the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
and let the Intel SPI driver call these stuff instead.

Signed-off-by: Bin Meng 
---

 arch/x86/Kconfig  |  9 -
 arch/x86/lib/fsp/fsp_common.c | 24 
 2 files changed, 33 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index b2ae865..98c56ad 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -402,15 +402,6 @@ config FSP_BROKEN_HOB
  do not overwrite the important boot service data which is used by
  FSP, otherwise the subsequent call to fsp_notify() will fail.
 
-config FSP_LOCKDOWN_SPI
-   bool
-   depends on HAVE_FSP
-   help
- Some Intel FSP (like Braswell) does SPI lock-down during the call
- to fsp_notify(INIT_PHASE_BOOT). This option should be turned on
- for such FSP and U-Boot will configure the SPI opcode registers
- before the lock-down.
-
 config ENABLE_MRC_CACHE
bool "Enable MRC cache"
depends on !EFI && !SYS_COREBOOT
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 1714d13..3397bb8 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -19,8 +19,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void ich_spi_config_opcode(struct udevice *dev);
-
 int checkcpu(void)
 {
return 0;
@@ -51,28 +49,6 @@ void board_final_cleanup(void)
 {
u32 status;
 
-#ifdef CONFIG_FSP_LOCKDOWN_SPI
-   struct udevice *dev;
-
-   /*
-* Some Intel FSP (like Braswell) does SPI lock-down during the call
-* to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
-* it's bootloader's responsibility to configure the SPI controller's
-* opcode registers properly otherwise SPI controller driver doesn't
-* know how to communicate with the SPI flash device.
-*
-* Note we cannot do such configuration elsewhere (eg: during the SPI
-* controller driver's probe() routine), because:
-*
-* 1). U-Boot SPI controller driver does not set the lock-down bit
-* 2). Any SPI transfer will corrupt the contents of these registers
-*
-* Hence we have to do it right here before SPI lock-down bit is set.
-*/
-   if (!uclass_first_device_err(UCLASS_SPI, ))
-   ich_spi_config_opcode(dev);
-#endif
-
/* call into FspNotify */
debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
status = fsp_notify(NULL, INIT_PHASE_BOOT);
-- 
2.7.4

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