Re: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
On 08/12/2011 02:03 AM, Eric Jarrige wrote: Hi Stefano, On 11 août 2011, at 11:22, Stefano Babic wrote: On 08/10/2011 10:33 PM, Eric Jarrige wrote: Improve PLL freq computation by using the full resolution of the PLL registers Hi Eric, + return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); +} - return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) + (mfn10)/(mfd+1)))/(pd+1); Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces. I did it and had no error and no warning: Here is the ourput of checkpatch.pl: armadeus/buildroot/output/build/linux-3.0.1/scripts/checkpatch.pl ../../../target/u-boot/git/09-arm920t-relocation.patch total: 0 errors, 0 warnings, 10 lines checked Then forget my comment. I did not yet run checkpatch on your patches. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
On 08/10/2011 10:33 PM, Eric Jarrige wrote: Improve PLL freq computation by using the full resolution of the PLL registers Hi Eric, + return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); +} - return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) + (mfn10)/(mfd+1)))/(pd+1); Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
Hi Stefano, On 11 août 2011, at 11:22, Stefano Babic wrote: On 08/10/2011 10:33 PM, Eric Jarrige wrote: Improve PLL freq computation by using the full resolution of the PLL registers Hi Eric, +return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); +} -return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) + (mfn10)/(mfd+1)))/(pd+1); Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces. I did it and had no error and no warning: Here is the ourput of checkpatch.pl: armadeus/buildroot/output/build/linux-3.0.1/scripts/checkpatch.pl ../../../target/u-boot/git/09-arm920t-relocation.patch total: 0 errors, 0 warnings, 10 lines checked ../../../target/u-boot/git/09-arm920t-relocation.patch has no obvious style problems and is ready for submission. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
Hi Stefano, On 11 août 2011, at 11:22, Stefano Babic wrote: On 08/10/2011 10:33 PM, Eric Jarrige wrote: Improve PLL freq computation by using the full resolution of the PLL registers Hi Eric, + return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1)); +} - return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) + (mfn10)/(mfd+1)))/(pd+1); Please run checkpatch on your patches for V2. I have not yet done, but this line will report missing spaces. I did it and had no error and no warning: Here is the report of checkpatch.pl on [PATCH 6/9] this time : armadeus/buildroot/output/build/linux-3.0.1/scripts/checkpatch.pl ../../../target/u-boot/git/06-mx1-pllclk.patch total: 0 errors, 0 warnings, 44 lines checked ../../../target/u-boot/git/06-mx1-pllclk.patch has no obvious style problems and is ready for submission. Cheers, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/9] mx1: improve PLL freq computation
Improve PLL freq computation by using the full resolution of the PLL registers
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Cc: Stefano Babic sba...@denx.de
---
arch/arm/cpu/arm920t/imx/speed.c | 29 +++--
1 files changed, 11 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c
index 1e29698..b1c2bd6 100644
--- a/arch/arm/cpu/arm920t/imx/speed.c
+++ b/arch/arm/cpu/arm920t/imx/speed.c
@@ -36,33 +36,26 @@
* the specified bus in HZ.
*/
/* - */
-
-ulong get_systemPLLCLK(void)
+static ulong get_PLLCLK(u32 sys_clk_freq, u32 pllctl0)
{
/* FIXME: We assume System_SEL = 0 here */
- u32 spctl0 = SPCTL0;
- u32 mfi = (spctl0 10) 0xf;
- u32 mfn = spctl0 0x3f;
- u32 mfd = (spctl0 16) 0x3f;
- u32 pd = (spctl0 26) 0xf;
+ u32 mfi = (pllctl0 10) 0xf;
+ u32 mfn = pllctl0 0x3ff;
+ u32 mfd = (pllctl0 16) 0x3ff;
+ u32 pd = (pllctl0 26) 0xf;
mfi = mfi=5 ? 5 : mfi;
+ return (2*(u64)sys_clk_freq * (mfi*(mfd+1) + mfn))/((mfd+1)*(pd+1));
+}
- return (2*(CONFIG_SYSPLL_CLK_FREQ10)*( (mfi10) +
(mfn10)/(mfd+1)))/(pd+1);
+ulong get_systemPLLCLK(void)
+{
+ return get_PLLCLK(CONFIG_SYSPLL_CLK_FREQ, SPCTL0);
}
ulong get_mcuPLLCLK(void)
{
- /* FIXME: We assume System_SEL = 0 here */
- u32 mpctl0 = MPCTL0;
- u32 mfi = (mpctl0 10) 0xf;
- u32 mfn = mpctl0 0x3f;
- u32 mfd = (mpctl0 16) 0x3f;
- u32 pd = (mpctl0 26) 0xf;
-
- mfi = mfi=5 ? 5 : mfi;
-
- return (2*(CONFIG_SYS_CLK_FREQ10)*( (mfi10) +
(mfn10)/(mfd+1)))/(pd+1);
+ return get_PLLCLK(CONFIG_SYS_CLK_FREQ, MPCTL0);
}
ulong get_FCLK(void)
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