Re: [U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file.
Dear Alex Waterman, > Moves to using newer defines and adds possible support for the > second bank of RAM (if so desired). > > Also, some coding clean up: removed the needless define to 1s for > defines that just act as flags. > > Signed-off-by: Alex Waterman > --- > include/configs/at91sam9m10g45ek.h | 188 +-- > 1 files changed, 113 insertions(+), 75 deletions(-) > > diff --git a/include/configs/at91sam9m10g45ek.h > b/include/configs/at91sam9m10g45ek.h > index de74dcf..5e02dde 100644 > --- a/include/configs/at91sam9m10g45ek.h > +++ b/include/configs/at91sam9m10g45ek.h > @@ -27,48 +27,65 @@ > #ifndef __CONFIG_H > #define __CONFIG_H > > +/*#define DEBUG*/ > + > #define CONFIG_AT91_LEGACY > +#define CONFIG_ATMEL_LEGACY > > /* ARM asynchronous clock */ > -#define CONFIG_SYS_AT91_MAIN_CLOCK 1200/* from 12 MHz crystal > */ > +#define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */ > +#define AT91_SLOW_CLOCK 32768 Must be CONFIG_SYS_AT91_SLOW_CLOCK here. > #define CONFIG_SYS_HZ1000 > > -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core*/ > -#ifdef CONFIG_AT91SAM9M10G45EK > -#define CONFIG_AT91SAM9M10G451 /* It's an Atmel AT91SAM9M10G45 > SoC*/ > -#else > -#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/ > -#endif > +#define CONFIG_AT91SAM9M10G45 > +#define CONFIG_AT91FAMILY > #define CONFIG_ARCH_CPU_INIT > +#define CONFIG_BOARD_EARLY_INIT_F > #undef CONFIG_USE_IRQ/* we don't need IRQ/FIQ stuff > */ > > -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > -#define CONFIG_SETUP_MEMORY_TAGS 1 > -#define CONFIG_INITRD_TAG1 > +#define CONFIGMDLINE_TAG /* enable passing of ATAGs */ > +#define CONFIG_SETUP_MEMORY_TAGS > +#define CONFIG_INITRD_TAG > > #define CONFIG_SKIP_LOWLEVEL_INIT > > +#define ATMEL_PIO_PORTS 5 /* 5 PIO ports. */ > +#define CONFIG_SYS_SDRAM_BASE 0x7000 > + > /* > * Hardware drivers > */ > -#define CONFIG_AT91_GPIO 1 > -#define CONFIG_ATMEL_USART 1 > +#define CONFIG_AT91_GPIO > +#define CONFIG_ATMEL_USART > #undef CONFIG_USART0 > #undef CONFIG_USART1 > #undef CONFIG_USART2 > -#define CONFIG_USART31 /* USART 3 is DBGU */ > +#define CONFIG_USART3/* USART 3 is DBGU */ > +#define CONFIG_USART_BASE0xee00 /* Use the DBGU hardware. */ > +#define CONFIG_USART_ID 10 Please follow the examples in at91sam9260ek.h There is no CONFIG_USARTx anymore. Just defining BASE and ID is sufficient. > + > +/* > + * This needs to be defined for the OHCI code to work but it is defined as > + * ATMEL_ID_UHPHS in the CPU specific header files. > + */ > +#define ATMEL_ID_UHP ATMEL_ID_UHPHS > + > +/* > + * Specify the clock enable bit in the PMC_SCER register. > + */ > +#define ATMEL_PMC_UHPAT91SAM926x_PMC_UHP > > /* LCD */ > -#define CONFIG_LCD 1 > +#define CONFIG_LCD > #define LCD_BPP LCD_COLOR8 > -#define CONFIG_LCD_LOGO 1 > +#define CONFIG_LCD_LOGO > #undef LCD_TEST_PATTERN > -#define CONFIG_LCD_INFO 1 > -#define CONFIG_LCD_INFO_BELOW_LOGO 1 > -#define CONFIG_SYS_WHITE_ON_BLACK1 > -#define CONFIG_ATMEL_LCD 1 > -#define CONFIG_ATMEL_LCD_RGB565 1 > -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 > +#define CONFIG_LCD_INFO > +#define CONFIG_LCD_INFO_BELOW_LOGO > +#define CONFIG_SYS_WHITE_ON_BLACK > +#define CONFIG_ATMEL_LCD > +#define CONFIG_ATMEL_LCD_RGB565 > +#define CONFIG_SYS_CONSOLE_IS_IN_ENV > /* board specific(not enough SRAM) */ > #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E0 > > @@ -82,10 +99,10 @@ > /* > * BOOTP options > */ > -#define CONFIG_BOOTP_BOOTFILESIZE1 > -#define CONFIG_BOOTP_BOOTPATH1 > -#define CONFIG_BOOTP_GATEWAY 1 > -#define CONFIG_BOOTP_HOSTNAME1 > +#define CONFIG_BOOTP_BOOTFILESIZE > +#define CONFIG_BOOTP_BOOTPATH > +#define CONFIG_BOOTP_GATEWAY > +#define CONFIG_BOOTP_HOSTNAME Thanks for removing the "1"s ! > > /* > * Command line configuration. > @@ -98,35 +115,37 @@ > #undef CONFIG_CMD_AUTOSCRIPT > #undef CONFIG_CMD_LOADS > > -#define CONFIG_CMD_PING 1 > -#define CONFIG_CMD_DHCP 1 > -#define CONFIG_CMD_NAND 1 > -#define CONFIG_CMD_USB 1 > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_NAND > +#define CONFIG_CMD_USB > > /* SDRAM */ > -#define CONFIG_NR_DRAM_BANKS 1 > +#define CONFIG_NR_DRAM_BANKS 2 > #define PHYS_SDRAM 0x7000 > #define PHYS_SDRAM_SIZE 0x0800 /* 128 megs */ > +#define PHYS_SDRAM_2 0x2000 > +#define PHYS_SDRAM_SIZE_20x0800 /* 128 m
[U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file.
From: Alex Waterman Moves to using newer defines and adds possible support for the second bank of RAM (if so desired). Also, some coding clean up: removed the needless define to 1s for defines that just act as flags. Signed-off-by: Alex Waterman --- include/configs/at91sam9m10g45ek.h | 188 +-- 1 files changed, 113 insertions(+), 75 deletions(-) diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index de74dcf..5e02dde 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -27,48 +27,65 @@ #ifndef __CONFIG_H #define __CONFIG_H +/*#define DEBUG*/ + #define CONFIG_AT91_LEGACY +#define CONFIG_ATMEL_LEGACY /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 1200/* from 12 MHz crystal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */ +#define AT91_SLOW_CLOCK32768 #define CONFIG_SYS_HZ 1000 -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core*/ -#ifdef CONFIG_AT91SAM9M10G45EK -#define CONFIG_AT91SAM9M10G45 1 /* It's an Atmel AT91SAM9M10G45 SoC*/ -#else -#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/ -#endif +#define CONFIG_AT91SAM9M10G45 +#define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT +#define CONFIG_BOARD_EARLY_INIT_F #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIGMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_SKIP_LOWLEVEL_INIT +#define ATMEL_PIO_PORTS5 /* 5 PIO ports. */ +#define CONFIG_SYS_SDRAM_BASE 0x7000 + /* * Hardware drivers */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 +#define CONFIG_AT91_GPIO +#define CONFIG_ATMEL_USART #undef CONFIG_USART0 #undef CONFIG_USART1 #undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_USART3 /* USART 3 is DBGU */ +#define CONFIG_USART_BASE 0xee00 /* Use the DBGU hardware. */ +#define CONFIG_USART_ID10 + +/* + * This needs to be defined for the OHCI code to work but it is defined as + * ATMEL_ID_UHPHS in the CPU specific header files. + */ +#define ATMEL_ID_UHP ATMEL_ID_UHPHS + +/* + * Specify the clock enable bit in the PMC_SCER register. + */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP /* LCD */ -#define CONFIG_LCD 1 +#define CONFIG_LCD #define LCD_BPPLCD_COLOR8 -#define CONFIG_LCD_LOGO1 +#define CONFIG_LCD_LOGO #undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_RGB5651 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#define CONFIG_LCD_INFO +#define CONFIG_LCD_INFO_BELOW_LOGO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_ATMEL_LCD +#define CONFIG_ATMEL_LCD_RGB565 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE0x73E0 @@ -82,10 +99,10 @@ /* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -98,35 +115,37 @@ #undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_LOADS -#define CONFIG_CMD_PING1 -#define CONFIG_CMD_DHCP1 -#define CONFIG_CMD_NAND1 -#define CONFIG_CMD_USB 1 +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_USB /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM 0x7000 #define PHYS_SDRAM_SIZE0x0800 /* 128 megs */ +#define PHYS_SDRAM_2 0x2000 +#define PHYS_SDRAM_SIZE_2 0x0800 /* 128 megs */ /* DataFlash */ #ifdef CONFIG_ATMEL_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH 1 -#define CONFIG_SPI_FLASH_ATMEL 1 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #endif /* NOR flash, if populated */ -#ifndef CONFIG_CMD_NAND -#define CONFIG_SYS_NO_FLASH1 +#ifdef CONFIG_CMD_NAND +#define CONFIG_SYS_NO_FLASH #else -#define CONFIG_
[U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file.
Moves to using newer defines and adds possible support for the second bank of RAM (if so desired). Also, some coding clean up: removed the needless define to 1s for defines that just act as flags. Signed-off-by: Alex Waterman --- include/configs/at91sam9m10g45ek.h | 188 +-- 1 files changed, 113 insertions(+), 75 deletions(-) diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index de74dcf..5e02dde 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -27,48 +27,65 @@ #ifndef __CONFIG_H #define __CONFIG_H +/*#define DEBUG*/ + #define CONFIG_AT91_LEGACY +#define CONFIG_ATMEL_LEGACY /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 1200/* from 12 MHz crystal */ +#define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */ +#define AT91_SLOW_CLOCK32768 #define CONFIG_SYS_HZ 1000 -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core*/ -#ifdef CONFIG_AT91SAM9M10G45EK -#define CONFIG_AT91SAM9M10G45 1 /* It's an Atmel AT91SAM9M10G45 SoC*/ -#else -#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/ -#endif +#define CONFIG_AT91SAM9M10G45 +#define CONFIG_AT91FAMILY #define CONFIG_ARCH_CPU_INIT +#define CONFIG_BOARD_EARLY_INIT_F #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIGMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_SKIP_LOWLEVEL_INIT +#define ATMEL_PIO_PORTS5 /* 5 PIO ports. */ +#define CONFIG_SYS_SDRAM_BASE 0x7000 + /* * Hardware drivers */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 +#define CONFIG_AT91_GPIO +#define CONFIG_ATMEL_USART #undef CONFIG_USART0 #undef CONFIG_USART1 #undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_USART3 /* USART 3 is DBGU */ +#define CONFIG_USART_BASE 0xee00 /* Use the DBGU hardware. */ +#define CONFIG_USART_ID10 + +/* + * This needs to be defined for the OHCI code to work but it is defined as + * ATMEL_ID_UHPHS in the CPU specific header files. + */ +#define ATMEL_ID_UHP ATMEL_ID_UHPHS + +/* + * Specify the clock enable bit in the PMC_SCER register. + */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP /* LCD */ -#define CONFIG_LCD 1 +#define CONFIG_LCD #define LCD_BPPLCD_COLOR8 -#define CONFIG_LCD_LOGO1 +#define CONFIG_LCD_LOGO #undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_RGB5651 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 +#define CONFIG_LCD_INFO +#define CONFIG_LCD_INFO_BELOW_LOGO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_ATMEL_LCD +#define CONFIG_ATMEL_LCD_RGB565 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE0x73E0 @@ -82,10 +99,10 @@ /* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -98,35 +115,37 @@ #undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_LOADS -#define CONFIG_CMD_PING1 -#define CONFIG_CMD_DHCP1 -#define CONFIG_CMD_NAND1 -#define CONFIG_CMD_USB 1 +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_USB /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM 0x7000 #define PHYS_SDRAM_SIZE0x0800 /* 128 megs */ +#define PHYS_SDRAM_2 0x2000 +#define PHYS_SDRAM_SIZE_2 0x0800 /* 128 megs */ /* DataFlash */ #ifdef CONFIG_ATMEL_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH 1 -#define CONFIG_SPI_FLASH_ATMEL 1 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 #endif /* NOR flash, if populated */ -#ifndef CONFIG_CMD_NAND -#define CONFIG_SYS_NO_FLASH1 +#ifdef CONFIG_CMD_NAND +#define CONFIG_SYS_NO_FLASH #else -#define CONFIG_SYS_FLASH_CFI
