Hi Peng,
On Tue, Jul 17, 2018 at 10:35 PM, Peng Fan wrote:
> Add helper functions to identify different armv8 variants.
>
> Signed-off-by: Peng Fan
> ---
> arch/arm/include/asm/armv8/cpu.h | 26 ++
> 1 file changed, 26 insertions(+)
> create mode 100644 arch/arm/include/asm/armv8/cpu.h
>
> diff --git a/arch/arm/include/asm/armv8/cpu.h
> b/arch/arm/include/asm/armv8/cpu.h
> new file mode 100644
> index 00..40d54dc85a
> --- /dev/null
> +++ b/arch/arm/include/asm/armv8/cpu.h
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright 2018 NXP
> + */
> +
> +#define MIDR_PARTNUM_CORTEX_A350xD04
> +#define MIDR_PARTNUM_CORTEX_A530xD03
> +#define MIDR_PARTNUM_CORTEX_A720xD08
> +#define MIDR_PARTNUM_SHIFT 0x4
> +#define MIDR_PARTNUM_MASK (0xFFF << 0x4)
> +
> +static inline unsigned int read_midr(void)
> +{
> + unsigned long val;
> +
> + asm volatile("mrs %0, midr_el1" : "=r" (val));
> +
> + return val;
> +}
> +
> +#define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> \
> +MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A35)
> +#define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> \
> +MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A53)
> +#define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >>\
> +MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A72)
This is not mx8 specific, so this header could be on a more common location.
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