Re: [U-Boot] [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12
Dear Piotr, On 08/11/13 00:00, Piotr Wilczek wrote: This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Chnages for v3: - removed unnecessary empty line Changes for v2: - no changes drivers/usb/gadget/regs-otg.h|5 + drivers/usb/gadget/s3c_udc_otg.c |9 +++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h index 84bfcc5..ac5d112 100644 --- a/drivers/usb/gadget/regs-otg.h +++ b/drivers/usb/gadget/regs-otg.h @@ -226,6 +226,11 @@ struct s3c_usbotg_reg { #define CLK_SEL_12MHZ (0x2 0) #define CLK_SEL_48MHZ (0x0 0) +#define EXYNOS4X12_ID_PULLUP0(0x01 3) +#define EXYNOS4X12_COMMON_ON_N0 (0x01 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 0) + /* Device Configuration Register DCFG */ #define DEV_SPEED_HIGH_SPEED_20 (0x0 0) #define DEV_SPEED_FULL_SPEED_20 (0x1 0) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7e20209..ba17a04 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -167,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev) writel((readl(phy-phypwr) ~(OTG_DISABLE_0 | ANALOG_PWRDOWN) ~FORCE_SUSPEND_0), phy-phypwr); - writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | -CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ + if (s5p_cpu_id == 0x4412) proid_is_exynos4412() + writel((readl(phy-phyclk) ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, +phy-phyclk); /* PLL 24Mhz */ + else + writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | +CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ writel((readl(phy-rstcon) ~(LINK_SW_RST | PHYLNK_SW_RST)) | PHY_SW_RST0, phy-rstcon); Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12
Dear Minkyu Kang, -Original Message- From: Minkyu Kang [mailto:mk7.k...@samsung.com] Sent: Thursday, November 21, 2013 9:10 AM To: Piotr Wilczek Cc: u-boot@lists.denx.de; Kyungmin Park Subject: Re: [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12 Dear Piotr, On 08/11/13 00:00, Piotr Wilczek wrote: This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Chnages for v3: - removed unnecessary empty line Changes for v2: - no changes drivers/usb/gadget/regs-otg.h|5 + drivers/usb/gadget/s3c_udc_otg.c |9 +++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h index 84bfcc5..ac5d112 100644 --- a/drivers/usb/gadget/regs-otg.h +++ b/drivers/usb/gadget/regs-otg.h @@ -226,6 +226,11 @@ struct s3c_usbotg_reg { #define CLK_SEL_12MHZ (0x2 0) #define CLK_SEL_48MHZ (0x0 0) +#define EXYNOS4X12_ID_PULLUP0 (0x01 3) +#define EXYNOS4X12_COMMON_ON_N0(0x01 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 0) + /* Device Configuration Register DCFG */ #define DEV_SPEED_HIGH_SPEED_20 (0x0 0) #define DEV_SPEED_FULL_SPEED_20 (0x1 0) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7e20209..ba17a04 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -167,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev) writel((readl(phy-phypwr) ~(OTG_DISABLE_0 | ANALOG_PWRDOWN) ~FORCE_SUSPEND_0), phy-phypwr); - writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ + if (s5p_cpu_id == 0x4412) proid_is_exynos4412() Ok but, proid_is_exynos4412() is not available for s5pc1**, ex the Goni board. + writel((readl(phy-phyclk) ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, + phy-phyclk); /* PLL 24Mhz */ + else + writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | + CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ writel((readl(phy-rstcon) ~(LINK_SW_RST | PHYLNK_SW_RST)) | PHY_SW_RST0, phy-rstcon); Thanks, Minkyu Kang. Best regards Piotr Wilczek ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12
On 21/11/13 17:40, Piotr Wilczek wrote: Dear Minkyu Kang, -Original Message- From: Minkyu Kang [mailto:mk7.k...@samsung.com] Sent: Thursday, November 21, 2013 9:10 AM To: Piotr Wilczek Cc: u-boot@lists.denx.de; Kyungmin Park Subject: Re: [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12 Dear Piotr, On 08/11/13 00:00, Piotr Wilczek wrote: This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Chnages for v3: - removed unnecessary empty line Changes for v2: - no changes drivers/usb/gadget/regs-otg.h|5 + drivers/usb/gadget/s3c_udc_otg.c |9 +++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h index 84bfcc5..ac5d112 100644 --- a/drivers/usb/gadget/regs-otg.h +++ b/drivers/usb/gadget/regs-otg.h @@ -226,6 +226,11 @@ struct s3c_usbotg_reg { #define CLK_SEL_12MHZ (0x2 0) #define CLK_SEL_48MHZ (0x0 0) +#define EXYNOS4X12_ID_PULLUP0 (0x01 3) +#define EXYNOS4X12_COMMON_ON_N0(0x01 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 0) + /* Device Configuration Register DCFG */ #define DEV_SPEED_HIGH_SPEED_20 (0x0 0) #define DEV_SPEED_FULL_SPEED_20 (0x1 0) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7e20209..ba17a04 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -167,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev) writel((readl(phy-phypwr) ~(OTG_DISABLE_0 | ANALOG_PWRDOWN) ~FORCE_SUSPEND_0), phy-phypwr); - writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ + if (s5p_cpu_id == 0x4412) proid_is_exynos4412() Ok but, proid_is_exynos4412() is not available for s5pc1**, ex the Goni board. Right.. just keep going. I'll fix it later. + writel((readl(phy-phyclk) ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, + phy-phyclk); /* PLL 24Mhz */ + else + writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | + CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ writel((readl(phy-rstcon) ~(LINK_SW_RST | PHYLNK_SW_RST)) | PHY_SW_RST0, phy-rstcon); Thanks, Minkyu Kang. Best regards Piotr Wilczek Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 1/2] driver:usb:s3c_udc: add support for Exynos4x12
This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- Chnages for v3: - removed unnecessary empty line Changes for v2: - no changes drivers/usb/gadget/regs-otg.h|5 + drivers/usb/gadget/s3c_udc_otg.c |9 +++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h index 84bfcc5..ac5d112 100644 --- a/drivers/usb/gadget/regs-otg.h +++ b/drivers/usb/gadget/regs-otg.h @@ -226,6 +226,11 @@ struct s3c_usbotg_reg { #define CLK_SEL_12MHZ (0x2 0) #define CLK_SEL_48MHZ (0x0 0) +#define EXYNOS4X12_ID_PULLUP0 (0x01 3) +#define EXYNOS4X12_COMMON_ON_N0(0x01 4) +#define EXYNOS4X12_CLK_SEL_12MHZ (0x02 0) +#define EXYNOS4X12_CLK_SEL_24MHZ (0x05 0) + /* Device Configuration Register DCFG */ #define DEV_SPEED_HIGH_SPEED_20 (0x0 0) #define DEV_SPEED_FULL_SPEED_20 (0x1 0) diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index 7e20209..ba17a04 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -167,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev) writel((readl(phy-phypwr) ~(OTG_DISABLE_0 | ANALOG_PWRDOWN) ~FORCE_SUSPEND_0), phy-phypwr); - writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ + if (s5p_cpu_id == 0x4412) + writel((readl(phy-phyclk) ~(EXYNOS4X12_ID_PULLUP0 | + EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, + phy-phyclk); /* PLL 24Mhz */ + else + writel((readl(phy-phyclk) ~(ID_PULLUP0 | COMMON_ON_N0)) | + CLK_SEL_24MHZ, phy-phyclk); /* PLL 24Mhz */ writel((readl(phy-rstcon) ~(LINK_SW_RST | PHYLNK_SW_RST)) | PHY_SW_RST0, phy-rstcon); -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot