Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread Tom Warren
seedshope, (?)

On Fri, Jan 21, 2011 at 9:35 AM, seedshope  wrote:
> On 01/21/2011 08:42 AM, Tom Warren wrote:
>>
>> +
>> +enum {
>> +       UART_A = 1,
>> +       UART_B,
>> +       UART_C,
>> +       UART_D,
>> +       UART_E
>> +};
>> +
>> +#endif /* _BOARD_H_ */
>>


>> +
>> +#if CONFIG_TEGRA2_ENABLE_UARTA
>> +       if (uart_num  == UART_A) {
>
> Why  you need get the parameters uart_num, I think if you want to use
> CONFIG_TEGRA2_ENABLE_UARTA,
> You  only defined CONFIG_TEGRA2_ENABLE_UARTA in include/configs/seaboard.h
> or include/configs/tegra2-common.h.
>
OK, makes sense. I'll move uart.c/board.h to drivers/serial as
serial_tegra2.[ch] and remove
all mention of UART_[A-E] and uart_num. Thanks.

> Here, The code formats may be as following:
>
> #ifdef CONFIG_SERIAL1
> ..
> #elif defined(CONFIG_SERIAL2)
> ..
> #else
> ..
> #endif
>
Some configs / builds can have both UARTs active, so each
#ifdef/#endif pair is needed.

> Thanks
> seedshope
Thanks for the feedback

Tom
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Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread seedshope
On 01/22/2011 12:35 AM, seedshope wrote:
> On 01/21/2011 08:42 AM, Tom Warren wrote:
>> +
>> +enum {
>> +UART_A = 1,
>> +UART_B,
>> +UART_C,
>> +UART_D,
>> +UART_E
>> +};
>> +
>> +#endif /* _BOARD_H_ */
>>
>>
>> diff --git a/arch/arm/cpu/armv7/tegra2/uart.c 
>> b/arch/arm/cpu/armv7/tegra2/uart.c
>> new file mode 100644
>> index 000..5e60bd8
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/tegra2/uart.c
>> @@ -0,0 +1,216 @@
>> +/*
>> + *  (C) Copyright 2010,2011
>> + *  NVIDIA Corporation
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include "board.h"
>> +
>> +/*
>> + * Routine: uart_clock_init
>> + * Description: init the PLL and clock for the UART in uart_num
>> + */
>> +static void uart_clock_init(int uart_num)
>> +{
>> +clk_rst_ctlr *const clkrst = (clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
>> +static int pllp_init_done;
>> +u32 reg;
>> +
>> +if (!pllp_init_done) {
>> +/* Override pllp setup for 216MHz operation. */
>> +reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
>> +reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500)<<  8) | PLL_DIVM);
>> +writel(reg,&clkrst->crc_pllp_base);
>> +
>> +reg |= PLL_ENABLE;
>> +writel(reg,&clkrst->crc_pllp_base);
>> +
>> +reg&= ~PLL_BYPASS;
>> +writel(reg,&clkrst->crc_pllp_base);
>> +
>> +pllp_init_done++;
>> +}
>> +
>> +/* Now do the UART reset/clock enable based on uart_num */
>> +#if CONFIG_TEGRA2_ENABLE_UARTA
>> +if (uart_num == UART_A) {
>> +/* Assert Reset to UART */
>> +reg = readl(&clkrst->crc_rst_dev_l);
>> +reg |= SWR_UARTA_RST;/* SWR_UARTA_RST = 1 */
>> +writel(reg,&clkrst->crc_rst_dev_l);
>> +
>> +/* Enable clk to UART */
>> +reg = readl(&clkrst->crc_clk_out_enb_l);
>> +reg |= CLK_ENB_UARTA;/* CLK_ENB_UARTA = 1 */
>> +writel(reg,&clkrst->crc_clk_out_enb_l);
>> +
>> +/* Enable pllp_out0 to UART */
>> +reg = readl(&clkrst->crc_clk_src_uarta);
>> +reg&= 0x3FFF;/* UARTA_CLK_SRC = 00, PLLP_OUT0 */
>> +writel(reg,&clkrst->crc_clk_src_uarta);
>> +
>> +/* wait for 2us */
>> +udelay(2);
>> +
>> +/* De-assert reset to UART */
>> +reg = readl(&clkrst->crc_rst_dev_l);
>> +reg&= ~SWR_UARTA_RST;/* SWR_UARTA_RST = 0 */
>> +writel(reg,&clkrst->crc_rst_dev_l);
>> +}
>> +#endif/* CONFIG_TEGRA2_ENABLE_UARTA */
>> +#if CONFIG_TEGRA2_ENABLE_UARTD
>> +if (uart_num == UART_D) {
>> +/* Assert Reset to UART */
>> +reg = readl(&clkrst->crc_rst_dev_u);
>> +reg |= SWR_UARTD_RST;/* SWR_UARTD_RST = 1 */
>> +writel(reg,&clkrst->crc_rst_dev_u);
>> +
>> +/* Enable clk to UART */
>> +reg = readl(&clkrst->crc_clk_out_enb_u);
>> +reg |= CLK_ENB_UARTD;/* CLK_ENB_UARTD = 1 */
>> +writel(reg,&clkrst->crc_clk_out_enb_u);
>> +
>> +/* Enable pllp_out0 to UART */
>> +reg = readl(&clkrst->crc_clk_src_uartd);
>> +reg&= 0x3FFF;/* UARTD_CLK_SRC = 00, PLLP_OUT0 */
>> +writel(reg,&clkrst->crc_clk_src_uartd);
>> +
>> +/* wait for 2us */
>> +udelay(2);
>> +
>> +/* De-assert reset to UART */
>> +reg = readl(&clkrst->crc_rst_dev_u);
>> +reg&= ~SWR_UARTD_RST;/* SWR_UARTD_RST = 0 */
>> +writel(reg,&clkrst->crc_rst_dev_u);
>> +}
>> +#endif/* CONFIG_TEGRA2_ENABLE_UARTD */
>> +}
>> +
>> +/*
>> + * Routine: pin_mux_uart
>> + * Description: setup the pin muxes/tristate values for UART based 
>> on uart_num
>> + */
>> +static void pin_mux_uart(int uart_num)
>> +{
>> +pinmux_tri_ctlr *const pmt = (pinmux_tri_ctlr 
>> *)NV_PA_APB_MISC_BASE;
>> +u32 reg;
>> +
>> +#if CONFIG_TEGRA2_ENABLE_UARTA
>> +if (uart_num  == UART_A) {
> Why  you need get the parameters uart_num, I think if you want to use 
> CONFIG_TEGRA2_ENABLE_UARTA,
> You  only defined CONFIG_TEGRA2_ENABLE_UARTA in 
> include/configs/seaboard.h or include/configs/tegra2-common.h.
>
> Here, The code formats may 

Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread seedshope
On 01/21/2011 08:42 AM, Tom Warren wrote:
> +
> +enum {
> + UART_A = 1,
> + UART_B,
> + UART_C,
> + UART_D,
> + UART_E
> +};
> +
> +#endif /* _BOARD_H_ */
>
>
> diff --git a/arch/arm/cpu/armv7/tegra2/uart.c 
> b/arch/arm/cpu/armv7/tegra2/uart.c
> new file mode 100644
> index 000..5e60bd8
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/tegra2/uart.c
> @@ -0,0 +1,216 @@
> +/*
> + *  (C) Copyright 2010,2011
> + *  NVIDIA Corporation
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include "board.h"
> +
> +/*
> + * Routine: uart_clock_init
> + * Description: init the PLL and clock for the UART in uart_num
> + */
> +static void uart_clock_init(int uart_num)
> +{
> + clk_rst_ctlr *const clkrst = (clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
> + static int pllp_init_done;
> + u32 reg;
> +
> + if (!pllp_init_done) {
> + /* Override pllp setup for 216MHz operation. */
> + reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
> + reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500)<<  8) | PLL_DIVM);
> + writel(reg,&clkrst->crc_pllp_base);
> +
> + reg |= PLL_ENABLE;
> + writel(reg,&clkrst->crc_pllp_base);
> +
> + reg&= ~PLL_BYPASS;
> + writel(reg,&clkrst->crc_pllp_base);
> +
> + pllp_init_done++;
> + }
> +
> + /* Now do the UART reset/clock enable based on uart_num */
> +#if CONFIG_TEGRA2_ENABLE_UARTA
> + if (uart_num == UART_A) {
> + /* Assert Reset to UART */
> + reg = readl(&clkrst->crc_rst_dev_l);
> + reg |= SWR_UARTA_RST;   /* SWR_UARTA_RST = 1 */
> + writel(reg,&clkrst->crc_rst_dev_l);
> +
> + /* Enable clk to UART */
> + reg = readl(&clkrst->crc_clk_out_enb_l);
> + reg |= CLK_ENB_UARTA;   /* CLK_ENB_UARTA = 1 */
> + writel(reg,&clkrst->crc_clk_out_enb_l);
> +
> + /* Enable pllp_out0 to UART */
> + reg = readl(&clkrst->crc_clk_src_uarta);
> + reg&= 0x3FFF;   /* UARTA_CLK_SRC = 00, PLLP_OUT0 */
> + writel(reg,&clkrst->crc_clk_src_uarta);
> +
> + /* wait for 2us */
> + udelay(2);
> +
> + /* De-assert reset to UART */
> + reg = readl(&clkrst->crc_rst_dev_l);
> + reg&= ~SWR_UARTA_RST;   /* SWR_UARTA_RST = 0 */
> + writel(reg,&clkrst->crc_rst_dev_l);
> + }
> +#endif   /* CONFIG_TEGRA2_ENABLE_UARTA */
> +#if CONFIG_TEGRA2_ENABLE_UARTD
> + if (uart_num == UART_D) {
> + /* Assert Reset to UART */
> + reg = readl(&clkrst->crc_rst_dev_u);
> + reg |= SWR_UARTD_RST;   /* SWR_UARTD_RST = 1 */
> + writel(reg,&clkrst->crc_rst_dev_u);
> +
> + /* Enable clk to UART */
> + reg = readl(&clkrst->crc_clk_out_enb_u);
> + reg |= CLK_ENB_UARTD;   /* CLK_ENB_UARTD = 1 */
> + writel(reg,&clkrst->crc_clk_out_enb_u);
> +
> + /* Enable pllp_out0 to UART */
> + reg = readl(&clkrst->crc_clk_src_uartd);
> + reg&= 0x3FFF;   /* UARTD_CLK_SRC = 00, PLLP_OUT0 */
> + writel(reg,&clkrst->crc_clk_src_uartd);
> +
> + /* wait for 2us */
> + udelay(2);
> +
> + /* De-assert reset to UART */
> + reg = readl(&clkrst->crc_rst_dev_u);
> + reg&= ~SWR_UARTD_RST;   /* SWR_UARTD_RST = 0 */
> + writel(reg,&clkrst->crc_rst_dev_u);
> + }
> +#endif   /* CONFIG_TEGRA2_ENABLE_UARTD */
> +}
> +
> +/*
> + * Routine: pin_mux_uart
> + * Description: setup the pin muxes/tristate values for UART based on 
> uart_num
> + */
> +static void pin_mux_uart(int uart_num)
> +{
> + pinmux_tri_ctlr *const pmt = (pinmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
> + u32 reg;
> +
> +#if CONFIG_TEGRA2_ENABLE_UARTA
> + if (uart_num  == UART_A) {
Why  you need get the parameters uart_num, I think if you want to use 
CONFIG_TEGRA2_ENABLE_UARTA,
You  only defined CONFIG_TEGRA2_ENABLE_UARTA in 
include/configs/

Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread seedshope
On 01/22/2011 12:08 AM, Tom Warren wrote:
> Minkyu,
>
> On Fri, Jan 21, 2011 at 1:16 AM, Minkyu Kang  wrote:
>> Dear Tom Warren,
>>
>> On 21 January 2011 09:42, Tom Warren  wrote:
>>> diff --git a/arch/arm/cpu/armv7/tegra2/uart.c 
>>> b/arch/arm/cpu/armv7/tegra2/uart.c
>>> new file mode 100644
>>> index 000..5e60bd8
>>> --- /dev/null
>>> +++ b/arch/arm/cpu/armv7/tegra2/uart.c
>> How about move it to drivers/serial/ ?
Approve, you can use name in the drivers/serial. such as:
serial_tegra2.c

Thanks
seedshope
> There's Tegra-specific code in there (clocks, PLLs and pinmuxes).
>
>> And why don't you use serial multi interface?
> CONFIG_SERIAL_MULTI is enabled in the config files.
>
>> Thanks
>> Minkyu Kang
> Thank you,
>
> Tom
>> --
>> from. prom.
>> www.promsoft.net
>>
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Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread Tom Warren
Minkyu,

On Fri, Jan 21, 2011 at 1:16 AM, Minkyu Kang  wrote:
> Dear Tom Warren,
>
> On 21 January 2011 09:42, Tom Warren  wrote:
>> diff --git a/arch/arm/cpu/armv7/tegra2/uart.c 
>> b/arch/arm/cpu/armv7/tegra2/uart.c
>> new file mode 100644
>> index 000..5e60bd8
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/tegra2/uart.c
>
> How about move it to drivers/serial/ ?
There's Tegra-specific code in there (clocks, PLLs and pinmuxes).

> And why don't you use serial multi interface?
CONFIG_SERIAL_MULTI is enabled in the config files.

>
> Thanks
> Minkyu Kang
Thank you,

Tom
> --
> from. prom.
> www.promsoft.net
>
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Re: [U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-21 Thread Minkyu Kang
Dear Tom Warren,

On 21 January 2011 09:42, Tom Warren  wrote:
> diff --git a/arch/arm/cpu/armv7/tegra2/uart.c 
> b/arch/arm/cpu/armv7/tegra2/uart.c
> new file mode 100644
> index 000..5e60bd8
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/tegra2/uart.c

How about move it to drivers/serial/ ?
And why don't you use serial multi interface?

Thanks
Minkyu Kang
-- 
from. prom.
www.promsoft.net
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[U-Boot] [PATCH V4 1/4] arm: Tegra2: Add basic NVIDIA Tegra2 SoC support

2011-01-20 Thread Tom Warren
Signed-off-by: Tom Warren 
---
Changes for V2:
- Coding style cleanup
- Move serial driver changes to separate patch
- Use board/nvidia instead of board/tegra
- Remove TRUE/FALSE defines
- Use standard NS16550 registers/bit defines in UART init

Changes for V3:
- Use I/O accessors for Tegra2 HW MMIO register access
- Allow conditional compile of UARTA/UARTD code to save space

Changes for V4:
- Use address of HW structs (&pmc, etc.) in readl/writel
- Remove empty lines, fix mixed case hex #s & comments in header(s)
- Move board/nvidia/common/board.c UART code & header to 
arch/arm/cpu/armv7/tegra2/
- Declare internal functions as static in UART code

 arch/arm/cpu/armv7/tegra2/Makefile   |   48 ++
 arch/arm/cpu/armv7/tegra2/board.c|   91 +++
 arch/arm/cpu/armv7/tegra2/board.h|   58 +++
 arch/arm/cpu/armv7/tegra2/config.mk  |   28 
 arch/arm/cpu/armv7/tegra2/lowlevel_init.S|   65 
 arch/arm/cpu/armv7/tegra2/sys_info.c |   35 
 arch/arm/cpu/armv7/tegra2/timer.c|  122 +++
 arch/arm/cpu/armv7/tegra2/uart.c |  216 ++
 arch/arm/include/asm/arch-tegra2/clk_rst.h   |  154 ++
 arch/arm/include/asm/arch-tegra2/pinmux.h|   51 ++
 arch/arm/include/asm/arch-tegra2/pmc.h   |  124 +++
 arch/arm/include/asm/arch-tegra2/sys_proto.h |   33 
 arch/arm/include/asm/arch-tegra2/tegra2.h|   49 ++
 arch/arm/include/asm/arch-tegra2/uart.h  |   44 ++
 board/nvidia/common/board.c  |   57 +++
 15 files changed, 1175 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/tegra2/Makefile
 create mode 100644 arch/arm/cpu/armv7/tegra2/board.c
 create mode 100644 arch/arm/cpu/armv7/tegra2/board.h
 create mode 100644 arch/arm/cpu/armv7/tegra2/config.mk
 create mode 100644 arch/arm/cpu/armv7/tegra2/lowlevel_init.S
 create mode 100644 arch/arm/cpu/armv7/tegra2/sys_info.c
 create mode 100644 arch/arm/cpu/armv7/tegra2/timer.c
 create mode 100644 arch/arm/cpu/armv7/tegra2/uart.c
 create mode 100644 arch/arm/include/asm/arch-tegra2/clk_rst.h
 create mode 100644 arch/arm/include/asm/arch-tegra2/pinmux.h
 create mode 100644 arch/arm/include/asm/arch-tegra2/pmc.h
 create mode 100644 arch/arm/include/asm/arch-tegra2/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-tegra2/tegra2.h
 create mode 100644 arch/arm/include/asm/arch-tegra2/uart.h
 create mode 100644 board/nvidia/common/board.c

diff --git a/arch/arm/cpu/armv7/tegra2/Makefile 
b/arch/arm/cpu/armv7/tegra2/Makefile
new file mode 100644
index 000..f5b657b
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2010,2011 Nvidia Corporation.
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB=  $(obj)lib$(SOC).o
+
+SOBJS  := lowlevel_init.o
+COBJS  := board.o sys_info.o timer.o uart.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/tegra2/board.c 
b/arch/arm/cpu/armv7/tegra2/board.c
new file mode 100644
index 000..816a8cd
--- /dev/null
+++ b/arch/arm/cpu/armv7/tegra2/board.c
@@ -0,0 +1,91 @@
+/*
+ *  (C) Copyright 2010,2011
+ *  NVIDIA Corporation 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hop