Re: [U-Boot] [PATCH v1 06/11] spi: stm32_qspi: Update mode management

[Patrice CHOTARD]

Hi Jagan

On 05/01/2018 07:31 AM, Jagan Teki wrote:
> On Thu, Apr 26, 2018 at 8:35 PM, Patrice Chotard  
> wrote:
>> From: Christophe Kerello 
>>
>> We face issue on Macronix/Spansion spi nors due to bad mode management.
>> We solve these issues using following mode configurations:
>>   - read_cmd = CMD_READ_QUAD_OUTPUT_FAST => 1-1-4
>>   - read_cmd = CMD_READ_DUAL_OUTPUT_FAST => 1-1-2
>>   - write_cmd = CMD_QUAD_PAGE_PROGRAM => 1-1-4
>>   - others commands => 1-1-1
>>
>> Signed-off-by: Christophe Kerello 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>>   drivers/spi/stm32_qspi.c | 30 ++
>>   1 file changed, 18 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
>> index 6b7232905bc8..46915194f034 100644
>> --- a/drivers/spi/stm32_qspi.c
>> +++ b/drivers/spi/stm32_qspi.c
>> @@ -156,6 +156,10 @@ enum STM32_QSPI_CCR_FMODE {
>>   /* default SCK frequency, unit: HZ */
>>   #define STM32_QSPI_DEFAULT_SCK_FREQ 10800
>>
>> +#define STM32_CMD_READ_DUAL_OUTPUT_FAST0x3b
>> +#define STM32_CMD_READ_QUAD_OUTPUT_FAST0x6b
>> +#define STM32_CMD_QUAD_PP  0x32
> 
> NAK, pls don't add flash changes in spi.

I will resent this series without this patch.
This patch will be reworked and resubmitted separately.

Thanks

> 
> Jagan.
> 
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Re: [U-Boot] [PATCH v1 06/11] spi: stm32_qspi: Update mode management

[Jagan Teki]

On Thu, Apr 26, 2018 at 8:35 PM, Patrice Chotard  wrote:
> From: Christophe Kerello 
>
> We face issue on Macronix/Spansion spi nors due to bad mode management.
> We solve these issues using following mode configurations:
>  - read_cmd = CMD_READ_QUAD_OUTPUT_FAST => 1-1-4
>  - read_cmd = CMD_READ_DUAL_OUTPUT_FAST => 1-1-2
>  - write_cmd = CMD_QUAD_PAGE_PROGRAM => 1-1-4
>  - others commands => 1-1-1
>
> Signed-off-by: Christophe Kerello 
> Signed-off-by: Patrice Chotard 
> ---
>
>  drivers/spi/stm32_qspi.c | 30 ++
>  1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
> index 6b7232905bc8..46915194f034 100644
> --- a/drivers/spi/stm32_qspi.c
> +++ b/drivers/spi/stm32_qspi.c
> @@ -156,6 +156,10 @@ enum STM32_QSPI_CCR_FMODE {
>  /* default SCK frequency, unit: HZ */
>  #define STM32_QSPI_DEFAULT_SCK_FREQ 10800
>
> +#define STM32_CMD_READ_DUAL_OUTPUT_FAST0x3b
> +#define STM32_CMD_READ_QUAD_OUTPUT_FAST0x6b
> +#define STM32_CMD_QUAD_PP  0x32

NAK, pls don't add flash changes in spi.

Jagan.
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[U-Boot] [PATCH v1 06/11] spi: stm32_qspi: Update mode management

[Patrice Chotard]

From: Christophe Kerello 

We face issue on Macronix/Spansion spi nors due to bad mode management.
We solve these issues using following mode configurations:
 - read_cmd = CMD_READ_QUAD_OUTPUT_FAST => 1-1-4
 - read_cmd = CMD_READ_DUAL_OUTPUT_FAST => 1-1-2
 - write_cmd = CMD_QUAD_PAGE_PROGRAM => 1-1-4
 - others commands => 1-1-1

Signed-off-by: Christophe Kerello 
Signed-off-by: Patrice Chotard 
---

 drivers/spi/stm32_qspi.c | 30 ++
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 6b7232905bc8..46915194f034 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -156,6 +156,10 @@ enum STM32_QSPI_CCR_FMODE {
 /* default SCK frequency, unit: HZ */
 #define STM32_QSPI_DEFAULT_SCK_FREQ 10800
 
+#define STM32_CMD_READ_DUAL_OUTPUT_FAST0x3b
+#define STM32_CMD_READ_QUAD_OUTPUT_FAST0x6b
+#define STM32_CMD_QUAD_PP  0x32
+
 struct stm32_qspi_platdata {
u32 base;
u32 memory_map;
@@ -217,26 +221,28 @@ static unsigned int _stm32_qspi_gen_ccr(struct 
stm32_qspi_priv *priv)
 {
unsigned int ccr_reg = 0;
u8 imode, admode, dmode;
-   u32 mode = priv->mode;
u32 cmd = (priv->command & STM32_QSPI_CCR_INSTRUCTION_MASK);
 
imode = STM32_QSPI_CCR_IMODE_ONE_LINE;
admode = STM32_QSPI_CCR_ADMODE_ONE_LINE;
 
-   if (mode & SPI_RX_QUAD) {
+   /*
+* Based on mtd spi framework,
+* read_cmd = CMD_READ_QUAD_OUTPUT_FAST if (mode & SPI_RX_QUAD)
+* read_cmd = CMD_READ_DUAL_OUTPUT_FAST if (mode & SPI_RX_DUAL)
+* write_cmd = CMD_QUAD_PAGE_PROGRAM if (mode & SPI_TX_QUAD)
+*/
+   switch (cmd) {
+   case STM32_CMD_READ_QUAD_OUTPUT_FAST:
+   case STM32_CMD_QUAD_PP:
dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
-   if (mode & SPI_TX_QUAD) {
-   imode = STM32_QSPI_CCR_IMODE_FOUR_LINE;
-   admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE;
-   }
-   } else if (mode & SPI_RX_DUAL) {
+   break;
+   case STM32_CMD_READ_DUAL_OUTPUT_FAST:
dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
-   if (mode & SPI_TX_DUAL) {
-   imode = STM32_QSPI_CCR_IMODE_TWO_LINE;
-   admode = STM32_QSPI_CCR_ADMODE_TWO_LINE;
-   }
-   } else {
+   break;
+   default:
dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
+   break;
}
 
if (priv->command & CMD_HAS_DATA)
-- 
1.9.1

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