subject:"\[U\-Boot\] \[PATCH v1 6\/6\] mpc83xx\: Add gdsys hrcon board"

Re: [U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

2014-11-07 Thread Dirk Eibach

Hi Kim,

2014-11-07 1:18 GMT+01:00 Kim Phillips kim.phill...@freescale.com:
 ...
 sorry for the delay, I bricked a board when going through my queue
 lately, and haven't been able to fully recover since.

no problem, Thanks for the review,  I'm very happy we have some progress now.

  arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
  board/gdsys/405ep/iocon.c| 190 +--
  board/gdsys/common/Makefile  |   3 +-
  board/gdsys/common/ihs_mdio.c|  88 +
  board/gdsys/common/ihs_mdio.h|  18 ++
  board/gdsys/common/phy.c | 280 
  board/gdsys/common/phy.h |  14 +

 is it me, or should PHY support go under drivers/net/phy/gdsys.c (or
 something like that)?  Even if not immediately ported to the Generic
 PHY Management layer, still, I think it would be a good idea to get
 it in the right vicinity.

 Taking a closer look, it looks like at least one of the PHYs
 involved here (the Marvell 88E1518) is already implemented in
 drivers/phy/marvell.c to a certain degree, so it might be helpful to
 define CONFIG_PHY_MARVELL as a first step to migrating to the
 generic PHY subsystem.

The first step was to factor out the common PHY code from iocon.c. The
next step is merging this with the PHY subsystem.
For the moment I would prefer it going in this way and doing a merge
with the PHY subsystem for the next release.
There are more boards coming that use this and I will clean it up alltogether.

  board/gdsys/mpc8308/Kconfig  |  12 +
  board/gdsys/mpc8308/MAINTAINERS  |   6 +
  board/gdsys/mpc8308/Makefile |   9 +
  board/gdsys/mpc8308/hrcon.c  | 677 
 +++
  board/gdsys/mpc8308/mpc8308.c| 109 +++
  board/gdsys/mpc8308/mpc8308.h|  10 +
  board/gdsys/mpc8308/sdram.c  |  82 +

  common/Makefile  |   1 +
  common/cmd_ioloop.c  | 295 +

 IDK what this is (FPGA io-endpoint looper/reflector?), but I'm
 guessing since it's in common/, it should be separated from this
 board support patch, otherwise it won't get the intended audience's
 attention.

Since this is very gdsys FPGA specific I should probably move it to
our board directory.

 +int last_stage_init(void)
 +{
 + int slaves;
 + unsigned int k;
 + unsigned int mux_ch;
 + unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
 + u16 fpga_features;
 + bool hw_type_cat = pca9698_get_value(0x20, 20);
 + bool ch0_rgmii2_present = false;
 +
 + FPGA_GET_REG(0, fpga_features, fpga_features);
 +
 + /* Turn on Parade DP501 */
 + pca9698_direction_output(0x20, 10, 1);
 +
 + ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 +
 + /* wait for FPGA done */
 + for (k = 0; k  ARRAY_SIZE(mclink_controllers); ++k) {
 + unsigned int ctr = 0;
 +
 + if (i2c_probe(mclink_controllers[k]))
 + continue;
 +
 + while (!(pca953x_get_val(mclink_controllers[k])
 + MCFPGA_DONE)) {
 + udelay(10);
 + if (ctr++  5) {
 + printf(no done for mclink_controller %d\n, 
 k);
 + break;
 + }
 + }
 + }
 +
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
 + bb_miiphy_write);
 + for (mux_ch = 0; mux_ch  MAX_MUX_CHANNELS; ++mux_ch) {
 + if ((mux_ch == 1)  !ch0_rgmii2_present)
 + continue;
 +
 + setup_88e1514(bb_miiphy_buses[0].name, mux_ch);
 + }
 + }
 +
 + /* give slave-PLLs and Parade DP501 some time to be up and running */
 + udelay(50);
 +
 + mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
 + slaves = mclink_probe();
 + mclink_fpgacount = 0;
 +
 + print_fpga_info(0, ch0_rgmii2_present);
 + osd_probe(0);
 + return 0;

 unless this was left in from debugging (in which case it should be
 removed), it implies the remaining code in the fn..:

Oops, you are absolutely rigth this is debugcode. Wonder how that crept in...

 +
 + if (slaves = 0)
 + return 0;
 +
 + mclink_fpgacount = slaves;
 +
 + for (k = 1; k = slaves; ++k) {
 + FPGA_GET_REG(k, fpga_features, fpga_features);
 +
 + print_fpga_info(k, false);
 + osd_probe(k);
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[k].name,
 + bb_miiphy_read, bb_miiphy_write);
 + setup_88e1514(bb_miiphy_buses[k].name, 0);
 + }
 + }
 +
 + return 0;
 +}

 ..is dead code, and therefore not welcome here.

 +int board_early_init_r(void)
 +{
 + unsigned k;
 + unsigned ctr;
 +
 + for (k = 0; k  CONFIG_SYS_FPGA_COUNT; ++k)
 + gd-arch.fpga_state[k] = 0;
 +
 + /*
 +

Re: [U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

2014-11-06 Thread Kim Phillips

On Wed, 29 Oct 2014 16:03:57 +0100
dirk.eib...@gdsys.cc wrote:

 From: Dirk Eibach dirk.eib...@gdsys.cc
 
 The gdsys hrcon board is based on a Freescale MPC8308 SOC.
 It boots from NOR-Flash, kernel and rootfs are stored on
 SD-Card.
 
 On board peripherals include:
 - 1x GbE (optional)
 - Lattice ECP3 FPGA connected via eLBC and PCIe
 
 Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
 ---

sorry for the delay, I bricked a board when going through my queue
lately, and haven't been able to fully recover since.

  arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
  board/gdsys/405ep/iocon.c| 190 +--
  board/gdsys/common/Makefile  |   3 +-
  board/gdsys/common/ihs_mdio.c|  88 +
  board/gdsys/common/ihs_mdio.h|  18 ++
  board/gdsys/common/phy.c | 280 
  board/gdsys/common/phy.h |  14 +

is it me, or should PHY support go under drivers/net/phy/gdsys.c (or
something like that)?  Even if not immediately ported to the Generic
PHY Management layer, still, I think it would be a good idea to get
it in the right vicinity.

Taking a closer look, it looks like at least one of the PHYs
involved here (the Marvell 88E1518) is already implemented in
drivers/phy/marvell.c to a certain degree, so it might be helpful to
define CONFIG_PHY_MARVELL as a first step to migrating to the
generic PHY subsystem.

  board/gdsys/mpc8308/Kconfig  |  12 +
  board/gdsys/mpc8308/MAINTAINERS  |   6 +
  board/gdsys/mpc8308/Makefile |   9 +
  board/gdsys/mpc8308/hrcon.c  | 677 
 +++
  board/gdsys/mpc8308/mpc8308.c| 109 +++
  board/gdsys/mpc8308/mpc8308.h|  10 +
  board/gdsys/mpc8308/sdram.c  |  82 +

  common/Makefile  |   1 +
  common/cmd_ioloop.c  | 295 +

IDK what this is (FPGA io-endpoint looper/reflector?), but I'm
guessing since it's in common/, it should be separated from this
board support patch, otherwise it won't get the intended audience's
attention.

 +int last_stage_init(void)
 +{
 + int slaves;
 + unsigned int k;
 + unsigned int mux_ch;
 + unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
 + u16 fpga_features;
 + bool hw_type_cat = pca9698_get_value(0x20, 20);
 + bool ch0_rgmii2_present = false;
 +
 + FPGA_GET_REG(0, fpga_features, fpga_features);
 +
 + /* Turn on Parade DP501 */
 + pca9698_direction_output(0x20, 10, 1);
 +
 + ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 +
 + /* wait for FPGA done */
 + for (k = 0; k  ARRAY_SIZE(mclink_controllers); ++k) {
 + unsigned int ctr = 0;
 +
 + if (i2c_probe(mclink_controllers[k]))
 + continue;
 +
 + while (!(pca953x_get_val(mclink_controllers[k])
 + MCFPGA_DONE)) {
 + udelay(10);
 + if (ctr++  5) {
 + printf(no done for mclink_controller %d\n, k);
 + break;
 + }
 + }
 + }
 +
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
 + bb_miiphy_write);
 + for (mux_ch = 0; mux_ch  MAX_MUX_CHANNELS; ++mux_ch) {
 + if ((mux_ch == 1)  !ch0_rgmii2_present)
 + continue;
 +
 + setup_88e1514(bb_miiphy_buses[0].name, mux_ch);
 + }
 + }
 +
 + /* give slave-PLLs and Parade DP501 some time to be up and running */
 + udelay(50);
 +
 + mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
 + slaves = mclink_probe();
 + mclink_fpgacount = 0;
 +
 + print_fpga_info(0, ch0_rgmii2_present);
 + osd_probe(0);
 + return 0;

unless this was left in from debugging (in which case it should be
removed), it implies the remaining code in the fn..:

 +
 + if (slaves = 0)
 + return 0;
 +
 + mclink_fpgacount = slaves;
 +
 + for (k = 1; k = slaves; ++k) {
 + FPGA_GET_REG(k, fpga_features, fpga_features);
 +
 + print_fpga_info(k, false);
 + osd_probe(k);
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[k].name,
 + bb_miiphy_read, bb_miiphy_write);
 + setup_88e1514(bb_miiphy_buses[k].name, 0);
 + }
 + }
 +
 + return 0;
 +}

..is dead code, and therefore not welcome here.

 +int board_early_init_r(void)
 +{
 + unsigned k;
 + unsigned ctr;
 +
 + for (k = 0; k  CONFIG_SYS_FPGA_COUNT; ++k)
 + gd-arch.fpga_state[k] = 0;
 +
 + /*
 +  * reset FPGA
 +  */
 + mpc8308_init();
 +
 + mpc8308_set_fpga_reset(1);
 +
 + mpc8308_setup_hw();
 +
 + for (k = 0; k  CONFIG_SYS_FPGA_COUNT; ++k) {
 + ctr = 0;
 + while (!mpc8308_get_fpga_done(k)) {
 +

[U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

2014-10-29 Thread dirk . eibach

From: Dirk Eibach dirk.eib...@gdsys.cc

The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
 board/gdsys/405ep/iocon.c| 190 +--
 board/gdsys/common/Makefile  |   3 +-
 board/gdsys/common/ihs_mdio.c|  88 +
 board/gdsys/common/ihs_mdio.h|  18 ++
 board/gdsys/common/phy.c | 280 
 board/gdsys/common/phy.h |  14 +
 board/gdsys/mpc8308/Kconfig  |  12 +
 board/gdsys/mpc8308/MAINTAINERS  |   6 +
 board/gdsys/mpc8308/Makefile |   9 +
 board/gdsys/mpc8308/hrcon.c  | 677 +++
 board/gdsys/mpc8308/mpc8308.c| 109 +++
 board/gdsys/mpc8308/mpc8308.h|  10 +
 board/gdsys/mpc8308/sdram.c  |  82 +
 common/Makefile  |   1 +
 common/cmd_ioloop.c  | 295 +
 configs/hrcon_defconfig  |   3 +
 include/configs/hrcon.h  | 614 +++
 include/gdsys_fpga.h |  64 +++-
 19 files changed, 2284 insertions(+), 195 deletions(-)
 create mode 100644 board/gdsys/common/ihs_mdio.c
 create mode 100644 board/gdsys/common/ihs_mdio.h
 create mode 100644 board/gdsys/common/phy.c
 create mode 100644 board/gdsys/common/phy.h
 create mode 100644 board/gdsys/mpc8308/Kconfig
 create mode 100644 board/gdsys/mpc8308/MAINTAINERS
 create mode 100644 board/gdsys/mpc8308/Makefile
 create mode 100644 board/gdsys/mpc8308/hrcon.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.h
 create mode 100644 board/gdsys/mpc8308/sdram.c
 create mode 100644 common/cmd_ioloop.c
 create mode 100644 configs/hrcon_defconfig
 create mode 100644 include/configs/hrcon.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 42e0e29..dadff32 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -67,6 +67,9 @@ config TARGET_TUXX1
 config TARGET_TQM834X
bool Support TQM834x
 
+config TARGET_HRCON
+   bool Support hrcon
+
 endchoice
 
 source board/esd/vme8349/Kconfig
@@ -87,5 +90,6 @@ source board/mpc8308_p1m/Kconfig
 source board/sbc8349/Kconfig
 source board/tqc/tqm834x/Kconfig
 source board/ve8313/Kconfig
+source board/gdsys/mpc8308/Kconfig
 
 endmenu
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index fffed73..b9b6ded 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -17,6 +17,7 @@
 
 #include ../common/osd.h
 #include ../common/mclink.h
+#include ../common/phy.h
 
 #include i2c.h
 #include pca953x.h
@@ -98,8 +99,6 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
-static int setup_88e1518(const char *bus, unsigned char addr);
-
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -646,190 +645,3 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
 
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
  sizeof(bb_miiphy_buses[0]);
-
-enum {
-   MIICMD_SET,
-   MIICMD_MODIFY,
-   MIICMD_VERIFY_VALUE,
-   MIICMD_WAIT_FOR_VALUE,
-};
-
-struct mii_setupcmd {
-   u8 token;
-   u8 reg;
-   u16 data;
-   u16 mask;
-   u32 timeout;
-};
-
-/*
- * verify we are talking to a 88e1518
- */
-struct mii_setupcmd verify_88e1518[] = {
-   { MIICMD_SET, 22, 0x },
-   { MIICMD_VERIFY_VALUE, 2, 0x0141, 0x },
-   { MIICMD_VERIFY_VALUE, 3, 0x0dd0, 0xfff0 },
-};
-
-/*
- * workaround for erratum mentioned in 88E1518 release notes
- */
-struct mii_setupcmd fixup_88e1518[] = {
-   { MIICMD_SET, 22, 0x00ff },
-   { MIICMD_SET, 17, 0x214b },
-   { MIICMD_SET, 16, 0x2144 },
-   { MIICMD_SET, 17, 0x0c28 },
-   { MIICMD_SET, 16, 0x2146 },
-   { MIICMD_SET, 17, 0xb233 },
-   { MIICMD_SET, 16, 0x214d },
-   { MIICMD_SET, 17, 0xcc0c },
-   { MIICMD_SET, 16, 0x2159 },
-   { MIICMD_SET, 22, 0x00fb },
-   { MIICMD_SET,  7, 0xc00d },
-   { MIICMD_SET, 22, 0x },
-};
-
-/*
- * default initialization:
- * - set RGMII receive timing to receive clock transition when data stable
- * - set RGMII transmit timing to transmit clock internally delayed
- * - set RGMII output impedance target to 78,8 Ohm
- * - run output impedance calibration
- * - set autonegotiation advertise to 1000FD only
- */
-struct mii_setupcmd default_88e1518[] = {
-   { MIICMD_SET, 22, 0x0002 },
-   { MIICMD_MODIFY, 21, 0x0030, 0x0030 },
-   { MIICMD_MODIFY, 25, 0x, 0x0003 },
-   { MIICMD_MODIFY, 24, 0x8000, 0x8000 },
-   { MIICMD_WAIT_FOR_VALUE, 24, 0x4000, 0x4000, 2000 },
-   { MIICMD_SET, 22, 0x },
-   { MIICMD_MODIFY, 4, 0x, 0x01e0 },
-   {

Re: [U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

Re: [U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

[U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

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