Re: [U-Boot] [PATCH v2] iomux-v3: Add support for mx6sl LVE bit
On 29/04/2014 15:15, Fabio Estevam wrote: > On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL > register that can enable or disable low voltage on the pad. > > LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the > calculation easier we can define it as a flag in bit 1, since this bit is > unused. > > Add support for it. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] iomux-v3: Add support for mx6sl LVE bit
On Tue, Apr 29, 2014 at 10:15 AM, Fabio Estevam wrote: > On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL > register that can enable or disable low voltage on the pad. > > LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the > calculation easier we can define it as a flag in bit 1, since this bit is > unused. > > Add support for it. > > Signed-off-by: Fabio Estevam Tested-by: Otavio Salvador -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] iomux-v3: Add support for mx6sl LVE bit
On mx6sl there is a LVE (Low Voltage Enable) bit in the IOMUXC_SW_PAD_CTL register that can enable or disable low voltage on the pad. LVE is bit 22 of IOMUXC_SW_PAD_CTL register, but in order to make the calculation easier we can define it as a flag in bit 1, since this bit is unused. Add support for it. Signed-off-by: Fabio Estevam --- Changes since v1: - Use bit 1, which is unused. arch/arm/imx-common/iomux-v3.c | 8 arch/arm/include/asm/imx-common/iomux-v3.h | 5 + 2 files changed, 13 insertions(+) diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index b59b802..6e46ea8 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -30,6 +30,14 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; +#if defined CONFIG_MX6SL + /* Check whether LVE bit needs to be set */ + if (pad_ctrl & PAD_CTL_LVE) { + pad_ctrl &= ~PAD_CTL_LVE; + pad_ctrl |= PAD_CTL_LVE_BIT; + } +#endif + if (mux_ctrl_ofs) __raw_writel(mux_mode, base + mux_ctrl_ofs); diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index dec11a1..cca920b 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -111,6 +111,11 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_DSE_40ohm (6 << 3) #define PAD_CTL_DSE_34ohm (7 << 3) +#if defined CONFIG_MX6SL +#define PAD_CTL_LVE(1 << 1) +#define PAD_CTL_LVE_BIT(1 << 22) +#endif + #elif defined(CONFIG_VF610) #define PAD_MUX_MODE_SHIFT 20 -- 1.8.3.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot