Re: [U-Boot] [PATCH v2] mx6ull: Handle the CONFIG_MX6ULL cases correctly

2018-01-02 Thread Peng Fan 
On Mon, Jan 01, 2018 at 10:16:51PM -0200, Fabio Estevam wrote:
>From: Fabio Estevam 
>
>Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
>CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
>take this into consideration in all the checks for CONFIG_MX6UL.
>
>Reported-by: Stefan Agner 
>Signed-off-by: Fabio Estevam 
>Reviewed-by: Stefan Agner 
>---
>Changes since v1:
>- Improve the ordering of the defines (Stefan)
>- Also change arch/arm/mach-imx/mx6/Kconfig (Stefan)
>- Make checkpatch happy
>
> arch/arm/include/asm/arch-mx6/imx-regs.h   | 23 +--
> arch/arm/include/asm/arch-mx6/mx6-ddr.h|  2 +-
> arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
> arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
> arch/arm/include/asm/mach-imx/regs-lcdif.h | 19 +--
> arch/arm/mach-imx/mx6/Kconfig  |  2 +-
> arch/arm/mach-imx/mx6/ddr.c|  2 +-
> drivers/gpio/mxc_gpio.c|  4 ++--
> include/configs/mx6_common.h   |  7 ---
> 9 files changed, 38 insertions(+), 27 deletions(-)
>
>diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
>b/arch/arm/include/asm/arch-mx6/imx-regs.h
>index 7736b6a..4be7aab 100644
>--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
>+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
>@@ -17,7 +17,7 @@
> #define GPU_2D_ARB_END_ADDR 0x02203FFF
> #define OPENVG_ARB_BASE_ADDR0x02204000
> #define OPENVG_ARB_END_ADDR 0x02207FFF
>-#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
>+#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || 
>defined(CONFIG_MX6ULL))
> #define CAAM_ARB_BASE_ADDR  0x0010
> #define CAAM_ARB_END_ADDR   0x00107FFF
> #define GPU_ARB_BASE_ADDR   0x0180
>@@ -46,7 +46,8 @@
> #define MXS_BCH_BASE  (APBH_DMA_ARB_BASE_ADDR + 0x04000)
> 
> /* GPV - PL301 configuration ports */
>-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
>+#if (defined(CONFIG_MX6SX) || \
>+  defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
>   defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
> #define GPV2_BASE_ADDR  0x00D0
> #define GPV3_BASE_ADDR0x00E0
>@@ -88,7 +89,7 @@
> #define QSPI0_AMBA_END 0x6FFF
> #define QSPI1_AMBA_BASE0x7000
> #define QSPI1_AMBA_END 0x7FFF
>-#elif defined(CONFIG_MX6UL)
>+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
> #define WEIM_ARB_BASE_ADDR  0x5000
> #define WEIM_ARB_END_ADDR   0x57FF
> #define QSPI0_AMBA_BASE 0x6000
>@@ -109,7 +110,8 @@
> #endif
> 
> #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
>-  defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
>+  defined(CONFIG_MX6SX) || \
>+  defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
> #define MMDC0_ARB_BASE_ADDR 0x8000
> #define MMDC0_ARB_END_ADDR  0x
> #define MMDC1_ARB_BASE_ADDR 0xC000
>@@ -262,7 +264,7 @@
> #define MMDC_P0_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x3)
> /* i.MX6SL/SLL */
> #define RNGB_IPS_BASE_ADDR  (AIPS2_OFF_BASE_ADDR + 0x34000)
>-#ifdef CONFIG_MX6UL
>+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
> #define ENET2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000)
> #else
> /* i.MX6SX */
>@@ -288,7 +290,7 @@
> #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
> #endif
> #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x5)
>-#ifdef CONFIG_MX6UL
>+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
> #define QSPI0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x6)
> #define UART6_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
> #elif defined(CONFIG_MX6SX)
>@@ -337,7 +339,7 @@
> #define PWM6_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xA8000)
> #define PWM7_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xAC000)
> #define PWM8_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xB)
>-#elif defined(CONFIG_MX6ULL)
>+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
> #define AIPS3_CONFIG_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x7C000)
> #define DCP_BASE_ADDR   (AIPS3_ARB_BASE_ADDR + 0x8)
> #define RNGB_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x84000)
>@@ -354,7 +356,8 @@
> #define MX6SX_LCDIF1_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x2)
> #define MX6SX_WDOG3_BASE_ADDR   (AIPS3_ARB_BASE_ADDR + 0x88000)
> 
>-#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
>+#if !(defined(CONFIG_MX6SX) || \
>+  defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
>   defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
> #define IRAM_SIZE0x0004
> #else
>@@ -573,7 +576,7 @@ struct src {
> #define IOMUXC_GPR12_LOS_LEVEL

Re: [U-Boot] [PATCH v2] mx6ull: Handle the CONFIG_MX6ULL cases correctly

2018-01-02 Thread Breno Matheus Lima 
Hi Fabio,

2018-01-01 22:16 GMT-02:00 Fabio Estevam :
> From: Fabio Estevam 
>
> Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
> CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
> take this into consideration in all the checks for CONFIG_MX6UL.
>
> Reported-by: Stefan Agner 
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Stefan Agner 

Tested-by: Breno Lima 

Thanks,
Breno Lima
___
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[U-Boot] [PATCH v2] mx6ull: Handle the CONFIG_MX6ULL cases correctly

2018-01-01 Thread Fabio Estevam 
From: Fabio Estevam 

Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.

Reported-by: Stefan Agner 
Signed-off-by: Fabio Estevam 
Reviewed-by: Stefan Agner 
---
Changes since v1:
- Improve the ordering of the defines (Stefan)
- Also change arch/arm/mach-imx/mx6/Kconfig (Stefan)
- Make checkpatch happy

 arch/arm/include/asm/arch-mx6/imx-regs.h   | 23 +--
 arch/arm/include/asm/arch-mx6/mx6-ddr.h|  2 +-
 arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
 arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
 arch/arm/include/asm/mach-imx/regs-lcdif.h | 19 +--
 arch/arm/mach-imx/mx6/Kconfig  |  2 +-
 arch/arm/mach-imx/mx6/ddr.c|  2 +-
 drivers/gpio/mxc_gpio.c|  4 ++--
 include/configs/mx6_common.h   |  7 ---
 9 files changed, 38 insertions(+), 27 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 7736b6a..4be7aab 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -17,7 +17,7 @@
 #define GPU_2D_ARB_END_ADDR 0x02203FFF
 #define OPENVG_ARB_BASE_ADDR0x02204000
 #define OPENVG_ARB_END_ADDR 0x02207FFF
-#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || 
defined(CONFIG_MX6ULL))
 #define CAAM_ARB_BASE_ADDR  0x0010
 #define CAAM_ARB_END_ADDR   0x00107FFF
 #define GPU_ARB_BASE_ADDR   0x0180
@@ -46,7 +46,8 @@
 #define MXS_BCH_BASE   (APBH_DMA_ARB_BASE_ADDR + 0x04000)
 
 /* GPV - PL301 configuration ports */
-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+#if (defined(CONFIG_MX6SX) || \
+   defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
 #define GPV2_BASE_ADDR  0x00D0
 #define GPV3_BASE_ADDR 0x00E0
@@ -88,7 +89,7 @@
 #define QSPI0_AMBA_END 0x6FFF
 #define QSPI1_AMBA_BASE0x7000
 #define QSPI1_AMBA_END 0x7FFF
-#elif defined(CONFIG_MX6UL)
+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define WEIM_ARB_BASE_ADDR  0x5000
 #define WEIM_ARB_END_ADDR   0x57FF
 #define QSPI0_AMBA_BASE 0x6000
@@ -109,7 +110,8 @@
 #endif
 
 #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
-   defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+   defined(CONFIG_MX6SX) || \
+   defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define MMDC0_ARB_BASE_ADDR 0x8000
 #define MMDC0_ARB_END_ADDR  0x
 #define MMDC1_ARB_BASE_ADDR 0xC000
@@ -262,7 +264,7 @@
 #define MMDC_P0_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x3)
 /* i.MX6SL/SLL */
 #define RNGB_IPS_BASE_ADDR  (AIPS2_OFF_BASE_ADDR + 0x34000)
-#ifdef CONFIG_MX6UL
+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define ENET2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000)
 #else
 /* i.MX6SX */
@@ -288,7 +290,7 @@
 #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
 #endif
 #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x5)
-#ifdef CONFIG_MX6UL
+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define QSPI0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x6)
 #define UART6_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000)
 #elif defined(CONFIG_MX6SX)
@@ -337,7 +339,7 @@
 #define PWM6_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xA8000)
 #define PWM7_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xAC000)
 #define PWM8_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0xB)
-#elif defined(CONFIG_MX6ULL)
+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define AIPS3_CONFIG_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x7C000)
 #define DCP_BASE_ADDR   (AIPS3_ARB_BASE_ADDR + 0x8)
 #define RNGB_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x84000)
@@ -354,7 +356,8 @@
 #define MX6SX_LCDIF1_BASE_ADDR  (AIPS3_ARB_BASE_ADDR + 0x2)
 #define MX6SX_WDOG3_BASE_ADDR   (AIPS3_ARB_BASE_ADDR + 0x88000)
 
-#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+#if !(defined(CONFIG_MX6SX) || \
+   defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
 #define IRAM_SIZE0x0004
 #else
@@ -573,7 +576,7 @@ struct src {
 #define IOMUXC_GPR12_LOS_LEVEL (0x1f << 4)
 
 struct iomuxc {
-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))