subject:"\[U\-Boot\] \[PATCH v2\] powerpc\/t1040qds\: Add support of SD boot for T1040QDS Board"

Re: [U-Boot] [PATCH v2] powerpc/t1040qds: Add support of SD boot for T1040QDS Board

2015-01-15 Thread York Sun

Vijay,

On 12/19/2014 04:35 AM, Vijay Rai wrote:
 Add support of 2 stage SD boot loader using SPL framework.
 here, PBL initialise the internal SRAM and copy SPL(160KB). This further
 initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR.
 Finally SPL transer control to u-boot.
 
 Initialise/create followings required for SPL framework
   - Add spl.c which defines board_init_f, board_init_r
   - Update tlb and ddr accordingly
 
 Add T1040QDS_SDCARD_defconfig
 Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1
 
 Signed-off-by: Vijay Rai vijay@freescale.com
 ---
 changes from v1:
 -Updated Kconfig to support SPL option for T1040QDS
 
  arch/powerpc/cpu/mpc85xx/Kconfig   |1 +
  board/freescale/t1040qds/MAINTAINERS   |5 ++
  board/freescale/t1040qds/Makefile  |   10 ++-
  board/freescale/t1040qds/ddr.c |5 +-
  board/freescale/t1040qds/spl.c |  155 
 
  board/freescale/t1040qds/t1040_pbi.cfg |   16 +++-
  board/freescale/t1040qds/t1040qds.c|6 +-
  board/freescale/t1040qds/tlb.c |   11 +++
  configs/T1040QDS_SDCARD_defconfig  |5 ++
  include/configs/T1040QDS.h |   79 +---
  10 files changed, 273 insertions(+), 20 deletions(-)
  create mode 100644 board/freescale/t1040qds/spl.c
  create mode 100644 configs/T1040QDS_SDCARD_defconfig
 

snip

 diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
 new file mode 100644
 index 000..b601c95
 --- /dev/null
 +++ b/board/freescale/t1040qds/spl.c
 @@ -0,0 +1,155 @@
 +/* Copyright 2013 Freescale Semiconductor, Inc.

Wrong year.

 + *
 + * SPDX-License-Identifier:GPL-2.0+
 + */
 +
 +#include common.h
 +#include malloc.h
 +#include ns16550.h
 +#include nand.h
 +#include i2c.h
 +#include mmc.h
 +#include fsl_esdhc.h
 +#include spi_flash.h
 +#include ../common/qixis.h
 +#include t1040qds_qixis.h
 +#include asm/mpc85xx_gpio.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +phys_size_t get_effective_memsize(void)
 +{
 + return CONFIG_SYS_L3_SIZE;
 +}
 +
 +unsigned long get_board_sys_clk(void)
 +{
 + u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
 +
 + switch (sysclk_conf  0x0F) {
 + case QIXIS_SYSCLK_64:
 + return 6400;
 + case QIXIS_SYSCLK_83:
 + return 8333;
 + case QIXIS_SYSCLK_100:
 + return 1;
 + case QIXIS_SYSCLK_125:
 + return 12500;
 + case QIXIS_SYSCLK_133:
 + return 1;
 + case QIXIS_SYSCLK_150:
 + return 15000;
 + case QIXIS_SYSCLK_160:
 + return 16000;
 + case QIXIS_SYSCLK_166:
 + return 1;
 + }
 + return ;
 +}
 +
 +unsigned long get_board_ddr_clk(void)
 +{
 + u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
 +
 + switch ((ddrclk_conf  0x30)  4) {
 + case QIXIS_DDRCLK_100:
 + return 1;
 + case QIXIS_DDRCLK_125:
 + return 12500;
 + case QIXIS_DDRCLK_133:
 + return 1;
 + }
 + return ;
 +}
 +
 +#define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF80
 +void board_init_f(ulong bootflag)
 +{
 + u32 plat_ratio, sys_clk, uart_clk;
 +#ifdef CONFIG_SPL_NAND_BOOT
 + u32 porsr1, pinctl;
 +#endif
 + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 +
 +#ifdef CONFIG_SPL_NAND_BOOT
 + /*
 +  * There is T1040 SoC issue where NOR, FPGA are inaccessible during
 +  * NAND boot because IFC signals  IFC_AD7 are not enabled.
 +  * This workaround changes RCW source to make all signals enabled.
 +  */
 + porsr1 = in_be32(gur-porsr1);
 + pinctl = ((porsr1  ~(FSL_CORENET_CCSR_PORSR1_RCW_MASK)) | 0x2480);
 + out_be32((unsigned int *)(CONFIG_SYS_DCSRBAR + 0x2), pinctl);
 +#endif
 +
 + /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
 + memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
 +
 + /* Update GD pointer */
 + gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
 +
 + /* compiler optimization barrier needed for GCC = 3.4 */
 + __asm__ __volatile__( : : : memory);
 +
 + console_init_f();

Please check with deep sleep team to see if you need to silent console for SPL 
boot.

snip

 diff --git a/board/freescale/t1040qds/t1040qds.c 
 b/board/freescale/t1040qds/t1040qds.c
 index 13285be..a086e47 100644
 --- a/board/freescale/t1040qds/t1040qds.c
 +++ b/board/freescale/t1040qds/t1040qds.c
 @@ -279,7 +279,11 @@ void qixis_dump_switch(void)
  
  int board_need_mem_reset(void)
  {
 - return 1;
 +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
 +return 1;
 +#else
 + return 0;
 +#endif
  }
  

The change seems wrong. The original code resets DDR by default. You seem
disabling the reset for NOR boot.

snip

 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
 index 6b396bb..c0ad90e 100644
 ---

[U-Boot] [PATCH v2] powerpc/t1040qds: Add support of SD boot for T1040QDS Board

2014-12-18 Thread Vijay Rai

Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.

Initialise/create followings required for SPL framework
  - Add spl.c which defines board_init_f, board_init_r
  - Update tlb and ddr accordingly

Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1

Signed-off-by: Vijay Rai vijay@freescale.com
---
changes from v1:
-Updated Kconfig to support SPL option for T1040QDS

 arch/powerpc/cpu/mpc85xx/Kconfig   |1 +
 board/freescale/t1040qds/MAINTAINERS   |5 ++
 board/freescale/t1040qds/Makefile  |   10 ++-
 board/freescale/t1040qds/ddr.c |5 +-
 board/freescale/t1040qds/spl.c |  155 
 board/freescale/t1040qds/t1040_pbi.cfg |   16 +++-
 board/freescale/t1040qds/t1040qds.c|6 +-
 board/freescale/t1040qds/tlb.c |   11 +++
 configs/T1040QDS_SDCARD_defconfig  |5 ++
 include/configs/T1040QDS.h |   79 +---
 10 files changed, 273 insertions(+), 20 deletions(-)
 create mode 100644 board/freescale/t1040qds/spl.c
 create mode 100644 configs/T1040QDS_SDCARD_defconfig

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 7501eb4..7177c83 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -120,6 +120,7 @@ config TARGET_T102XRDB
 
 config TARGET_T1040QDS
bool Support T1040QDS
+   select SUPPORT_SPL
 
 config TARGET_T104XRDB
bool Support T104xRDB
diff --git a/board/freescale/t1040qds/MAINTAINERS 
b/board/freescale/t1040qds/MAINTAINERS
index 83f6b3c..44d56b6 100644
--- a/board/freescale/t1040qds/MAINTAINERS
+++ b/board/freescale/t1040qds/MAINTAINERS
@@ -6,6 +6,11 @@ F: include/configs/T1040QDS.h
 F: configs/T1040QDS_defconfig
 F: configs/T1040QDS_D4_defconfig
 
+T1040QDS_SDCARD BOARD
+M: Priyanka Jain  priyanka.j...@freescale.com
+S: Maintained
+F: configs/T1040QDS_SDCARD_defconfig
+
 T1040QDS_SECURE_BOOT BOARD
 M: Aneesh Bansal aneesh.ban...@freescale.com
 S: Maintained
diff --git a/board/freescale/t1040qds/Makefile 
b/board/freescale/t1040qds/Makefile
index 19ed21b..27eed4c 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -4,10 +4,14 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
 obj-y  += t1040qds.o
-obj-y  += ddr.o
+obj-y  += eth.o
 obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_FSL_DIU_FB)   += diu.o
+endif
+obj-y  += ddr.o
 obj-y  += law.o
 obj-y  += tlb.o
-obj-y  += eth.o
-obj-y  += diu.o
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 43f952f..6147430 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -104,13 +104,16 @@ phys_size_t initdram(int board_type)
 {
phys_size_t dram_size;
 
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
puts(Initializingusing SPD\n);
 
dram_size = fsl_ddr_sdram();
 
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
-
puts(DDR: );
+#else
+   dram_size =  fsl_ddr_sdram_size();
+#endif
return dram_size;
 }
diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
new file mode 100644
index 000..b601c95
--- /dev/null
+++ b/board/freescale/t1040qds/spl.c
@@ -0,0 +1,155 @@
+/* Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include ns16550.h
+#include nand.h
+#include i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include spi_flash.h
+#include ../common/qixis.h
+#include t1040qds_qixis.h
+#include asm/mpc85xx_gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+phys_size_t get_effective_memsize(void)
+{
+   return CONFIG_SYS_L3_SIZE;
+}
+
+unsigned long get_board_sys_clk(void)
+{
+   u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+   switch (sysclk_conf  0x0F) {
+   case QIXIS_SYSCLK_64:
+   return 6400;
+   case QIXIS_SYSCLK_83:
+   return 8333;
+   case QIXIS_SYSCLK_100:
+   return 1;
+   case QIXIS_SYSCLK_125:
+   return 12500;
+   case QIXIS_SYSCLK_133:
+   return 1;
+   case QIXIS_SYSCLK_150:
+   return 15000;
+   case QIXIS_SYSCLK_160:
+   return 16000;
+   case QIXIS_SYSCLK_166:
+   return 1;
+   }
+   return ;
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+   u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+
+   switch ((ddrclk_conf  0x30)  4) {
+   case QIXIS_DDRCLK_100:
+   return 1;
+   case QIXIS_DDRCLK_125:
+

Re: [U-Boot] [PATCH v2] powerpc/t1040qds: Add support of SD boot for T1040QDS Board

[U-Boot] [PATCH v2] powerpc/t1040qds: Add support of SD boot for T1040QDS Board

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