A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch now adds
a CPLD version detection for Kilauea and code to reconfigure the EBC
controller (chip select 2) for the new CPLD.
Additionally the CPLD version is printed upon bootup:
Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
Signed-off-by: Stefan Roese s...@denx.de
Cc: Zhang Bao Quan bqzh...@udtech.com.cn
---
v2: Use correct magic value for CPLD version comparision
board/amcc/kilauea/kilauea.c | 40 +++-
include/configs/kilauea.h| 26 ++
2 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c
index 5cd822a..964b2d0 100644
--- a/board/amcc/kilauea/kilauea.c
+++ b/board/amcc/kilauea/kilauea.c
@@ -39,6 +39,37 @@ DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH
chips*/
+static int board_cpld_version(void)
+{
+ u32 cpld;
+
+ cpld = in_be32((void *)CONFIG_SYS_FPGA_FIFO_BASE);
+ if ((cpld CONFIG_SYS_FPGA_MAGIC_MASK) != CONFIG_SYS_FPGA_MAGIC) {
+ /*
+* Magic not found - old CPLD revision which needs
+* the old EBC configuration
+*/
+ mtebc(PB2AP, EBC_BXAP_BME_ENABLED | EBC_BXAP_FWT_ENCODE(5) |
+ EBC_BXAP_BWT_ENCODE(0) | EBC_BXAP_BCE_DISABLE |
+ EBC_BXAP_BCT_2TRANS | EBC_BXAP_CSN_ENCODE(0) |
+ EBC_BXAP_OEN_ENCODE(0) | EBC_BXAP_WBN_ENCODE(3) |
+ EBC_BXAP_WBF_ENCODE(0) | EBC_BXAP_TH_ENCODE(4) |
+ EBC_BXAP_RE_DISABLED | EBC_BXAP_SOR_DELAYED |
+ EBC_BXAP_BEM_WRITEONLY | EBC_BXAP_PEN_DISABLED);
+
+ /*
+* Return 0 for old CPLD version
+*/
+ return 0;
+ }
+
+ /*
+* Magic found - new CPLD revision which needs no new
+* EBC configuration
+*/
+ return (cpld CONFIG_SYS_FPGA_VER_MASK) 8;
+}
+
/*
* Board early initialization function
*/
@@ -209,6 +240,13 @@ int board_early_init_f (void)
mtsdr(SDR0_PFC1, val);
/*
+* The CPLD version detection has to be the first access to
+* the CPLD, so we need to make this access this early and
+* save the CPLD version for later.
+*/
+ gd-board_type = board_cpld_version();
+
+ /*
* Configure FPGA register with PCIe reset
*/
out_be32((void *)CONFIG_SYS_FPGA_BASE, 0xff570cc4); /* assert PCIe
reset */
@@ -276,7 +314,7 @@ int checkboard (void)
puts(, serial# );
puts(s);
}
- putc('\n');
+ printf( (CPLD rev. %ld)\n, gd-board_type);
return (0);
}
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index 965599c..926e385 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -47,6 +47,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1/* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EMAC_COUNT
/*---
@@ -522,9 +523,22 @@
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_NAND_ADDR | 0x1e000)
#endif
-/* Memory Bank 2 (FPGA) initialization
*/
-#define CONFIG_SYS_EBC_PB2AP 0x9400C800
-#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
+/* Memory Bank 2 (FPGA) initialization */
+#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_ENABLED | \
+EBC_BXAP_FWT_ENCODE(6) | \
+EBC_BXAP_BWT_ENCODE(1) | \
+EBC_BXAP_BCE_DISABLE | \
+EBC_BXAP_BCT_2TRANS | \
+EBC_BXAP_CSN_ENCODE(0) | \
+EBC_BXAP_OEN_ENCODE(0) | \
+EBC_BXAP_WBN_ENCODE(3) | \
+EBC_BXAP_WBF_ENCODE(1) | \
+EBC_BXAP_TH_ENCODE(4) |\
+EBC_BXAP_RE_DISABLED | \
+EBC_BXAP_SOR_DELAYED | \
+EBC_BXAP_BEM_WRITEONLY | \
+EBC_BXAP_PEN_DISABLED)
+#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FPGA_BASE | 0x18000)
#define CONFIG_SYS_EBC_CFG 0x7FC0 /* EBC0_CFG */
@@ -573,7 +587,7 @@
* Some Kilauea stuff..., mainly
