Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2014-02-26 Thread Ezaul Zillmer
Thank´s Marc

Error Compile 

How could solve this compilation problem? 
What am I doing wrong? 

Have since I'm Very Grateful!

make Cubieboard2 ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-


arm-linux-gnueabihf-gcc -M -g  -Os   -ffunction-sections -fdata-sections 
-fno-common -ffixed-r9 -msoft-float  -D__KERNEL__ 
-DCONFIG_SYS_TEXT_BASE=0x4a00 
-I/root/cubie-test/util/u-boot-maz-wip-psci/include 
-I/root/cubie-test/util/u-boot-maz-wip-psci/arch/arm/include -fno-builtin 
-ffreestanding -nostdinc -isystem 
/usr/lib/gcc/arm-linux-gnueabihf/4.7/include -pipe  -DCONFIG_ARM -D__ARM__ 
-marm -mno-thumb-interwork -mabi=aapcs-linux -mword-relocations 
-march=armv7-a   -MQ designware.o designware.c .depend.designware
designware.c:21:3: error: #error DesignWare Ether MAC requires PHYLIB - 
missing CONFIG_PHYLIB
make[2]: *** Sem regra para processar o alvo `.depend', necessário por 
`built-in.o'.  Pare.
make[2]: Saindo do diretório 
`/root/cubie-test/util/u-boot-maz-wip-psci/drivers/net'
make[1]: ** [drivers/net/built-in.o] Erro 2
make[1]: Saindo do diretório `/root/cubie-test/util/u-boot-maz-wip-psci'
make: ** [Cubieboard2] Erro 2
root@vbi7:~/cubie-test/util/u-boot-maz-wip-psci#


_





Em terça-feira, 25 de fevereiro de 2014 11h04min55s UTC-3, maz escreveu:

 Hi, 

 On 2014-02-25 13:38, Ezaul Zillmer wrote: 
  Hi Marc Zyngier 
  
  Where could obtain this repository with these alterations to be able 
  to 
  test 
  virtualization with KVM on my cubieboard2'm using Kernel 3.14.rc4 
  
  I appreciate if you help 

 You're looking at an older patch series. The new one can be found 
 there: 
 http://permalink.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7151 

 I also have a repository with this code at: 
 git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci 

 Cheers, 

  M. 
 -- 
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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2014-02-25 Thread Ezaul Zillmer
Hi Marc Zyngier

Where could obtain this repository with these alterations to be able to 
test 
virtualization with KVM on my cubieboard2'm using Kernel 3.14.rc4 

I appreciate if you help 

Thank you
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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2014-02-25 Thread Marc Zyngier

Hi,

On 2014-02-25 13:38, Ezaul Zillmer wrote:

Hi Marc Zyngier

Where could obtain this repository with these alterations to be able 
to

test
virtualization with KVM on my cubieboard2'm using Kernel 3.14.rc4

I appreciate if you help


You're looking at an older patch series. The new one can be found 
there:

http://permalink.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7151

I also have a repository with this code at:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/u-boot.git wip/psci

Cheers,

M.
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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2014-02-13 Thread Albert ARIBAUD
Hi Marc,

On Sat,  7 Dec 2013 11:19:05 +, Marc Zyngier marc.zyng...@arm.com
wrote:

 PSCI is an ARM standard that provides a generic interface that
 supervisory software can use to manage power in the following
 situations:
 - Core idle management
 - CPU hotplug
 - big.LITTLE migration models
 - System shutdown and reset
 
 It basically allows the kernel to offload these tasks to the firmware,
 and rely on common kernel side code.
 
 More importantly, it gives a way to ensure that CPUs enter the kernel
 at the appropriate exception level (ie HYP mode, to allow the use of
 the virtualization extensions), even across events like CPUs being
 powered off/on or suspended.
 
 The main idea here is to turn some of the existing u-boot code into a
 separate section that can live in secure RAM (or a reserved page of
 memory), containing a secure monitor that will implement the PSCI
 operations. This code will still be alive when u-boot is long gone,
 hence the need for a piece of memory that will not be touched by the
 OS.
 
 This patch series contains 4 parts:
 - the first four patches are just bug fixes
 - the next three refactor the HYP/non-secure code to allow relocation
   in secure memory
 - the next three contain the generic PSCI code and DT infrastructure
 - the last three implement the CPU_ON method of the Allwinner A20 (aka sun7i).
 
 I realize the A20 u-boot code is not upstream yet (BTW is anyone
 actively working on that?), but hopefully that should give a good idea
 of how things are structured so far. The patches are against the sunxi
 u-boot tree as of today, and the first 10 patches will directly apply
 to mainline u-boot.
 
 As for using this code, it goes like this:
 sun7i# ext2load mmc 0:1 0x40008000 zImage ; ext2load mmc 0:1 0x6000 
 sun7i-a20-cubietruck.dtb
 2270120 bytes read in 117 ms (18.5 MiB/s)
 9138 bytes read in 3 ms (2.9 MiB/s)
 sun7i# fdt addr 0x6000 ; fdt resize ; fdt set ethernet0 mac-address [5a 
 fe b0 07 b0 07]
 sun7i# setenv bootargs console=ttyS0,115200 earlyprintk ip=dhcp root=/dev/nfs 
 nfsroot=/backup/a20_root,tcp
 sun7i# bootz 0x40008000 - 0x6000
 
 The kernel now boots in HYP mode, finds its secondary CPU without any
 SMP code present in the kernel, and runs KVM out of the box.
 Hopefully, the Xen/ARM guys can do the same fairly easily.
 
 This code has also been tested on a VExpress TC2, running KVM with all
 5 CPUs, in order to make sure there was no obvious regression.
 
 I'm wildly cross-posting this patch series, including to lists I'm not
 subscribed to. Please keep me on Cc for any comment you may have.
 
 Cheers,
 
 M.

There are comments re 01/13 an 07/13. Should I expect a V3 on the
U-Boot ML?

Amicalement,
-- 
Albert.
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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2014-02-13 Thread Marc Zyngier
Hi Albert,

On 13/02/14 10:11, Albert ARIBAUD wrote:
 Hi Marc,
 
 On Sat,  7 Dec 2013 11:19:05 +, Marc Zyngier marc.zyng...@arm.com
 wrote:
 
 PSCI is an ARM standard that provides a generic interface that
 supervisory software can use to manage power in the following
 situations:
 - Core idle management
 - CPU hotplug
 - big.LITTLE migration models
 - System shutdown and reset

 It basically allows the kernel to offload these tasks to the firmware,
 and rely on common kernel side code.

 More importantly, it gives a way to ensure that CPUs enter the kernel
 at the appropriate exception level (ie HYP mode, to allow the use of
 the virtualization extensions), even across events like CPUs being
 powered off/on or suspended.

 The main idea here is to turn some of the existing u-boot code into a
 separate section that can live in secure RAM (or a reserved page of
 memory), containing a secure monitor that will implement the PSCI
 operations. This code will still be alive when u-boot is long gone,
 hence the need for a piece of memory that will not be touched by the
 OS.

 This patch series contains 4 parts:
 - the first four patches are just bug fixes
 - the next three refactor the HYP/non-secure code to allow relocation
   in secure memory
 - the next three contain the generic PSCI code and DT infrastructure
 - the last three implement the CPU_ON method of the Allwinner A20 (aka 
 sun7i).

 I realize the A20 u-boot code is not upstream yet (BTW is anyone
 actively working on that?), but hopefully that should give a good idea
 of how things are structured so far. The patches are against the sunxi
 u-boot tree as of today, and the first 10 patches will directly apply
 to mainline u-boot.

 As for using this code, it goes like this:
 sun7i# ext2load mmc 0:1 0x40008000 zImage ; ext2load mmc 0:1 0x6000 
 sun7i-a20-cubietruck.dtb
 2270120 bytes read in 117 ms (18.5 MiB/s)
 9138 bytes read in 3 ms (2.9 MiB/s)
 sun7i# fdt addr 0x6000 ; fdt resize ; fdt set ethernet0 mac-address [5a 
 fe b0 07 b0 07]
 sun7i# setenv bootargs console=ttyS0,115200 earlyprintk ip=dhcp 
 root=/dev/nfs nfsroot=/backup/a20_root,tcp
 sun7i# bootz 0x40008000 - 0x6000

 The kernel now boots in HYP mode, finds its secondary CPU without any
 SMP code present in the kernel, and runs KVM out of the box.
 Hopefully, the Xen/ARM guys can do the same fairly easily.

 This code has also been tested on a VExpress TC2, running KVM with all
 5 CPUs, in order to make sure there was no obvious regression.

 I'm wildly cross-posting this patch series, including to lists I'm not
 subscribed to. Please keep me on Cc for any comment you may have.

 Cheers,

 M.
 
 There are comments re 01/13 an 07/13. Should I expect a V3 on the
 U-Boot ML?

Yes. As I said yesterday, I plan to address the comments pretty quickly
(during the weekend anyway), and repost a new version on the same
mailing lists.

Thanks,

M.
-- 
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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2013-12-09 Thread Ian Campbell
On Sat, 2013-12-07 at 11:19 +, Marc Zyngier wrote:
 The kernel now boots in HYP mode, finds its secondary CPU without any
 SMP code present in the kernel, and runs KVM out of the box.
 Hopefully, the Xen/ARM guys can do the same fairly easily. 

Indeed, I booted with this series on a cb2 and Xen SMP Just Worked.

Thanks!

Ian.

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Re: [U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2013-12-09 Thread Marc Zyngier
On 09/12/13 10:51, Ian Campbell wrote:
 On Sat, 2013-12-07 at 11:19 +, Marc Zyngier wrote:
 The kernel now boots in HYP mode, finds its secondary CPU without any
 SMP code present in the kernel, and runs KVM out of the box.
 Hopefully, the Xen/ARM guys can do the same fairly easily. 
 
 Indeed, I booted with this series on a cb2 and Xen SMP Just Worked.

Profit! ;-)

Thanks for testing!

M.
-- 
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[U-Boot] [PATCH v2 00/13] ARMv7: add PSCI support to u-boot

2013-12-07 Thread Marc Zyngier
PSCI is an ARM standard that provides a generic interface that
supervisory software can use to manage power in the following
situations:
- Core idle management
- CPU hotplug
- big.LITTLE migration models
- System shutdown and reset

It basically allows the kernel to offload these tasks to the firmware,
and rely on common kernel side code.

More importantly, it gives a way to ensure that CPUs enter the kernel
at the appropriate exception level (ie HYP mode, to allow the use of
the virtualization extensions), even across events like CPUs being
powered off/on or suspended.

The main idea here is to turn some of the existing u-boot code into a
separate section that can live in secure RAM (or a reserved page of
memory), containing a secure monitor that will implement the PSCI
operations. This code will still be alive when u-boot is long gone,
hence the need for a piece of memory that will not be touched by the
OS.

This patch series contains 4 parts:
- the first four patches are just bug fixes
- the next three refactor the HYP/non-secure code to allow relocation
  in secure memory
- the next three contain the generic PSCI code and DT infrastructure
- the last three implement the CPU_ON method of the Allwinner A20 (aka sun7i).

I realize the A20 u-boot code is not upstream yet (BTW is anyone
actively working on that?), but hopefully that should give a good idea
of how things are structured so far. The patches are against the sunxi
u-boot tree as of today, and the first 10 patches will directly apply
to mainline u-boot.

As for using this code, it goes like this:
sun7i# ext2load mmc 0:1 0x40008000 zImage ; ext2load mmc 0:1 0x6000 
sun7i-a20-cubietruck.dtb
2270120 bytes read in 117 ms (18.5 MiB/s)
9138 bytes read in 3 ms (2.9 MiB/s)
sun7i# fdt addr 0x6000 ; fdt resize ; fdt set ethernet0 mac-address [5a fe 
b0 07 b0 07]
sun7i# setenv bootargs console=ttyS0,115200 earlyprintk ip=dhcp root=/dev/nfs 
nfsroot=/backup/a20_root,tcp
sun7i# bootz 0x40008000 - 0x6000

The kernel now boots in HYP mode, finds its secondary CPU without any
SMP code present in the kernel, and runs KVM out of the box.
Hopefully, the Xen/ARM guys can do the same fairly easily.

This code has also been tested on a VExpress TC2, running KVM with all
5 CPUs, in order to make sure there was no obvious regression.

I'm wildly cross-posting this patch series, including to lists I'm not
subscribed to. Please keep me on Cc for any comment you may have.

Cheers,

M.

Marc Zyngier (13):
  ARM: HYP/non-sec: fix alignment requirements for vectors
  ARM: HYP/non-sec: move switch to non-sec to the last boot phase
  ARM: HYP/non-sec: add a barrier after setting SCR.NS==1
  ARM: non-sec: reset CNTVOFF to zero
  ARM: add missing HYP mode constant
  ARM: HYP/non-sec: add separate section for secure code
  ARM: HYP/non-sec: allow relocation to secure RAM
  ARM: HYP/non-sec: add generic ARMv7 PSCI code
  ARM: HYP/non-sec: add the option for a second-stage monitor
  ARM: HYP/non-sec/PSCI: emit DT nodes
  sunxi: fix SRAM_B/SRAM_D memory map
  sunxi: HYP/non-sec: add sun7i PSCI backend
  sunxi: HYP/non-sec: configure CNTFRQ on all CPUs

 arch/arm/cpu/armv7/Makefile  |   5 +
 arch/arm/cpu/armv7/nonsec_virt.S | 168 ---
 arch/arm/cpu/armv7/psci.S| 113 +
 arch/arm/cpu/armv7/sunxi/Makefile|   3 +
 arch/arm/cpu/armv7/sunxi/psci.S  | 124 +++
 arch/arm/cpu/armv7/sunxi/u-boot-psci.lds |  63 
 arch/arm/cpu/armv7/virt-dt.c | 102 +++
 arch/arm/cpu/armv7/virt-v7.c |  59 ---
 arch/arm/cpu/u-boot.lds  |  30 ++
 arch/arm/include/asm/arch-sunxi/cpu.h|   4 +-
 arch/arm/include/asm/armv7.h |  11 +-
 arch/arm/include/asm/proc-armv/ptrace.h  |   2 +
 arch/arm/include/asm/psci.h  |  35 +++
 arch/arm/include/asm/secure.h|  26 +
 arch/arm/lib/bootm.c |  26 ++---
 arch/arm/lib/interrupts.c|   2 +-
 arch/arm/lib/sections.c  |   2 +
 include/configs/sun7i.h  |   7 ++
 18 files changed, 641 insertions(+), 141 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/psci.S
 create mode 100644 arch/arm/cpu/armv7/sunxi/psci.S
 create mode 100644 arch/arm/cpu/armv7/sunxi/u-boot-psci.lds
 create mode 100644 arch/arm/cpu/armv7/virt-dt.c
 create mode 100644 arch/arm/include/asm/psci.h
 create mode 100644 arch/arm/include/asm/secure.h

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