On 5/3/2010 5:03 AM, Tom Rix wrote:
Vipin KUMAR wrote:
SMI driver fails because of low timeout values. Increasing the erase
and write
timeouts to 3 seconds
Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
arch/arm/include/asm/arch-spear/spr_smi.h |6 +++---
drivers/mtd/spr_smi.c |8
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-spear/spr_smi.h
b/arch/arm/include/asm/arch-spear/spr_smi.h
index 06df745..e2e5e8f 100644
--- a/arch/arm/include/asm/arch-spear/spr_smi.h
+++ b/arch/arm/include/asm/arch-spear/spr_smi.h
@@ -108,8 +108,8 @@ struct flash_dev {
ushort sector_count;
};
-#define SFLASH_PAGE_SIZE0x100/* flash page size */
-#define XFER_FINISH_TOUT2/* xfer finish timeout */
-#define WMODE_TOUT2/* write enable timeout */
+#define SFLASH_PAGE_SIZE0x100/* flash page size */
+#define XFER_FINISH_TOUT(3 * CONFIG_SYS_HZ)
+#define WMODE_TOUT(3 * CONFIG_SYS_HZ)
Restore the comments for xfer and write timeouts
OK
#endif
diff --git a/drivers/mtd/spr_smi.c b/drivers/mtd/spr_smi.c
index 9a70a19..189ee6d 100644
--- a/drivers/mtd/spr_smi.c
+++ b/drivers/mtd/spr_smi.c
@@ -60,11 +60,11 @@ static struct flash_dev flash_ids[] = {
*/
static void smi_wait_xfer_finish(int timeout)
{
-while (timeout--) {
+do {
if (readl(smicntl-smi_sr) TFF)
break;
udelay(1000);
-}
+} while (timeout--);
}
Earlier (Jan 11), I recommended that if there is timeout, that this is a
failure
The status of the failure must be passed up.
smi_write_enable checks the timeout
smi_read_id, smi_read_sr does not
Mistake. It should have been done already.
Please find these changes in v3 patch
Why was the logic for the loops changed?
If you want to change the logic, you should also change
smi_wait_till_ready to be consistent.
OK. Please find the changes in v3
Tom
/*
@@ -215,11 +215,11 @@ static int smi_write_enable(int bank)
/* Restore the CTRL REG1 state */
writel(ctrlreg1, smicntl-smi_cr1);
-while (timeout--) {
+do {
if (smi_read_sr(bank) (1 (bank + WM_SHIFT)))
break;
udelay(1000);
-}
+} while (timeout--);
if (timeout)
return 0;
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