Re: [U-Boot] [PATCH v2 10/22] colibri_vf: migrate pinctrl and regulators to dtb/dm
Reviewed-by: Igor Opaniuk
On Mon, Mar 25, 2019 at 6:30 PM Marcel Ziswiler wrote:
>
> From: Marcel Ziswiler
>
> Migrate pinctrl and regulators to device tree resp. driver model: DDR,
> DSPI, ENET, ESDHC, I2C, NFC and UART.
>
> Enable CMD_DM, PINCTRL and DM_REGULATOR.
>
> While at it also update copyright period and sort include files.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
> Changes in v2: None
>
> board/toradex/colibri_vf/colibri_vf.c | 139 ++
> configs/colibri_vf_defconfig | 5 +
> 2 files changed, 16 insertions(+), 128 deletions(-)
>
> diff --git a/board/toradex/colibri_vf/colibri_vf.c
> b/board/toradex/colibri_vf/colibri_vf.c
> index 79f702f2bf..8e0dea2dc2 100644
> --- a/board/toradex/colibri_vf/colibri_vf.c
> +++ b/board/toradex/colibri_vf/colibri_vf.c
> @@ -1,43 +1,36 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright 2015 Toradex, Inc.
> + * Copyright 2015-2019 Toradex, Inc.
> *
> * Based on vf610twr.c:
> * Copyright 2013 Freescale Semiconductor, Inc.
> */
>
> #include
> -#include
> +
> +#include
> +#include
> +#include
> #include
> #include
> -#include
> -#include
> -#include
> -#include
> +#include
> +#include
> #include
> #include
> #include
> +#include
> +#include
> #include
> #include
> +#include
> #include
> #include
> -#include
> -#include
> -#include
> #include
> +
> #include "../common/tdx-common.h"
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
> - PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
> -
> -#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
> - PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE)
> -
> -#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
> - PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
> -
> #define USB_PEN_GPIO 83
> #define USB_CDET_GPIO 102
> #define PTC0_GPIO_45 45
> @@ -89,11 +82,6 @@ static struct ddrmc_cr_setting colibri_vf_cr_settings[] = {
> { 0, -1 }
> };
>
> -static const iomux_v3_cfg_t usb_pads[] = {
> - VF610_PAD_PTD4__GPIO_83,
> - VF610_PAD_PTC29__GPIO_102,
> -};
> -
> int dram_init(void)
> {
> static const struct ddr3_jedec_timings timings = {
> @@ -147,92 +135,12 @@ int dram_init(void)
> .wldqsen = 25,
> };
>
> - ddrmc_setup_iomux(NULL, 0);
> -
> ddrmc_ctrl_init_ddr3(, colibri_vf_cr_settings, NULL, 1, 2);
> gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
>
> return 0;
> }
>
> -static void setup_iomux_uart(void)
> -{
> - static const iomux_v3_cfg_t uart_pads[] = {
> - NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL),
> - };
> -
> - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
> -}
> -
> -static void setup_iomux_enet(void)
> -{
> - static const iomux_v3_cfg_t enet0_pads[] = {
> - NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL),
> - NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL),
> - };
> -
> - imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads));
> -}
> -
> -static void setup_iomux_i2c(void)
> -{
> - static const iomux_v3_cfg_t i2c0_pads[] = {
> - VF610_PAD_PTB14__I2C0_SCL,
> - VF610_PAD_PTB15__I2C0_SDA,
> - };
> -
> - imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads));
> -}
> -
> -#ifdef CONFIG_NAND_VF610_NFC
> -static void setup_iomux_nfc(void)
> -{
> - static const iomux_v3_cfg_t nfc_pads[] = {
> - VF610_PAD_PTD23__NF_IO7,
> - VF610_PAD_PTD22__NF_IO6,
> - VF610_PAD_PTD21__NF_IO5,
> - VF610_PAD_PTD20__NF_IO4,
> - VF610_PAD_PTD19__NF_IO3,
> - VF610_PAD_PTD18__NF_IO2,
> - VF610_PAD_PTD17__NF_IO1,
> - VF610_PAD_PTD16__NF_IO0,
> - VF610_PAD_PTB24__NF_WE_B,
> - VF610_PAD_PTB25__NF_CE0_B,
> -
[U-Boot] [PATCH v2 10/22] colibri_vf: migrate pinctrl and regulators to dtb/dm
From: Marcel Ziswiler
Migrate pinctrl and regulators to device tree resp. driver model: DDR,
DSPI, ENET, ESDHC, I2C, NFC and UART.
Enable CMD_DM, PINCTRL and DM_REGULATOR.
While at it also update copyright period and sort include files.
Signed-off-by: Marcel Ziswiler
---
Changes in v2: None
board/toradex/colibri_vf/colibri_vf.c | 139 ++
configs/colibri_vf_defconfig | 5 +
2 files changed, 16 insertions(+), 128 deletions(-)
diff --git a/board/toradex/colibri_vf/colibri_vf.c
b/board/toradex/colibri_vf/colibri_vf.c
index 79f702f2bf..8e0dea2dc2 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -1,43 +1,36 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2015 Toradex, Inc.
+ * Copyright 2015-2019 Toradex, Inc.
*
* Based on vf610twr.c:
* Copyright 2013 Freescale Semiconductor, Inc.
*/
#include
-#include
+
+#include
+#include
+#include
#include
#include
-#include
-#include
-#include
-#include
+#include
+#include
#include
#include
#include
+#include
+#include
#include
#include
+#include
#include
#include
-#include
-#include
-#include
#include
+
#include "../common/tdx-common.h"
DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
-
-#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
- PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
- PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
-
#define USB_PEN_GPIO 83
#define USB_CDET_GPIO 102
#define PTC0_GPIO_45 45
@@ -89,11 +82,6 @@ static struct ddrmc_cr_setting colibri_vf_cr_settings[] = {
{ 0, -1 }
};
-static const iomux_v3_cfg_t usb_pads[] = {
- VF610_PAD_PTD4__GPIO_83,
- VF610_PAD_PTC29__GPIO_102,
-};
-
int dram_init(void)
{
static const struct ddr3_jedec_timings timings = {
@@ -147,92 +135,12 @@ int dram_init(void)
.wldqsen = 25,
};
- ddrmc_setup_iomux(NULL, 0);
-
ddrmc_ctrl_init_ddr3(, colibri_vf_cr_settings, NULL, 1, 2);
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
return 0;
}
-static void setup_iomux_uart(void)
-{
- static const iomux_v3_cfg_t uart_pads[] = {
- NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-}
-
-static void setup_iomux_enet(void)
-{
- static const iomux_v3_cfg_t enet0_pads[] = {
- NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL),
- NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads));
-}
-
-static void setup_iomux_i2c(void)
-{
- static const iomux_v3_cfg_t i2c0_pads[] = {
- VF610_PAD_PTB14__I2C0_SCL,
- VF610_PAD_PTB15__I2C0_SDA,
- };
-
- imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads));
-}
-
-#ifdef CONFIG_NAND_VF610_NFC
-static void setup_iomux_nfc(void)
-{
- static const iomux_v3_cfg_t nfc_pads[] = {
- VF610_PAD_PTD23__NF_IO7,
- VF610_PAD_PTD22__NF_IO6,
- VF610_PAD_PTD21__NF_IO5,
- VF610_PAD_PTD20__NF_IO4,
- VF610_PAD_PTD19__NF_IO3,
- VF610_PAD_PTD18__NF_IO2,
- VF610_PAD_PTD17__NF_IO1,
- VF610_PAD_PTD16__NF_IO0,
- VF610_PAD_PTB24__NF_WE_B,
- VF610_PAD_PTB25__NF_CE0_B,
- VF610_PAD_PTB27__NF_RE_B,
- VF610_PAD_PTC26__NF_RB_B,
- VF610_PAD_PTC27__NF_ALE,
- VF610_PAD_PTC28__NF_CLE
- };
-
- imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads));
-}
-#endif
-
-#ifdef CONFIG_FSL_DSPI
-static void setup_iomux_dspi(void)
-{
- static const iomux_v3_cfg_t dspi1_pads[] = {
-
