[U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
From: Tien Fong Chee Enhance preloader header with both additional program length and program entry offset attributes, which offset is relative to the start of program header. Signed-off-by: Tien Fong Chee --- arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h index 22d9e7f..33c9368 100644 --- a/arch/arm/mach-socfpga/include/mach/boot0.h +++ b/arch/arm/mach-socfpga/include/mach/boot0.h @@ -11,8 +11,15 @@ .balignl 64,0xf33db33f; .word 0x1337c0d3; /* SoCFPGA preloader validation word */ - .word 0xc01df00d; /* Version, flags, length */ - .word 0xcafec0d3; /* Checksum, zero-pad */ + .word 0xc01df00d; /* Header length(2B),flags(1B),version(1B) */ +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 + .word 0xfeedface; /* Program length(4B) */ + .word 0xf00dcafe; /* +* Program entry offset(4B),relative to +* the start of program header +*/ +#endif + .word 0xcafec0d3; /* Simple checksum(2B),spare offset(2B) */ nop; b reset;/* SoCFPGA jumps here */ -- 2.2.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enhance preloader header with both additional program length and program > entry offset attributes, which offset is relative to the start of program > header. > > Signed-off-by: Tien Fong Chee > --- > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > b/arch/arm/mach-socfpga/include/mach/boot0.h > index 22d9e7f..33c9368 100644 > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > @@ -11,8 +11,15 @@ > .balignl 64,0xf33db33f; > > .word 0x1337c0d3; /* SoCFPGA preloader validation word */ > - .word 0xc01df00d; /* Version, flags, length */ > - .word 0xcafec0d3; /* Checksum, zero-pad */ > + .word 0xc01df00d; /* Header length(2B),flags(1B),version(1B) */ > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > + .word 0xfeedface; /* Program length(4B) */ Keep this indent intact, then it won't generate these crappy - entries. > + .word 0xf00dcafe; /* > + * Program entry offset(4B),relative to > + * the start of program header > + */ > +#endif > + .word 0xcafec0d3; /* Simple checksum(2B),spare offset(2B) */ > nop; > > b reset;/* SoCFPGA jumps here */ > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > From: Tien Fong Chee > > > > Enhance preloader header with both additional program length and > > program > > entry offset attributes, which offset is relative to the start of > > program > > header. > > > > Signed-off-by: Tien Fong Chee > > --- > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > index 22d9e7f..33c9368 100644 > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > @@ -11,8 +11,15 @@ > > .balignl 64,0xf33db33f; > > > > .word 0x1337c0d3; /* SoCFPGA preloader > > validation word */ > > - .word 0xc01df00d; /* Version, flags, length > > */ > > - .word 0xcafec0d3; /* Checksum, zero-pad */ > > + .word 0xc01df00d; /* Header > > length(2B),flags(1B),version(1B) */ > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > + .word 0xfeedface; /* Program length(4B) */ > Keep this indent intact, then it won't generate these crappy - > entries. > Are you saying to keep the comment indent intact, and allign with 1st comment /* SoCFPGA preloader validation word */ ? > > > > + .word 0xf00dcafe; /* > > + * Program entry offset(4B),relative > > to > > + * the start of program header > > + */ > > +#endif > > + .word 0xcafec0d3; /* Simple > > checksum(2B),spare offset(2B) */ > > nop; > > > > b reset;/* SoCFPGA jumps here */ > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: >> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee >>> >>> Enhance preloader header with both additional program length and >>> program >>> entry offset attributes, which offset is relative to the start of >>> program >>> header. >>> >>> Signed-off-by: Tien Fong Chee >>> --- >>> arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- >>> 1 file changed, 9 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h >>> b/arch/arm/mach-socfpga/include/mach/boot0.h >>> index 22d9e7f..33c9368 100644 >>> --- a/arch/arm/mach-socfpga/include/mach/boot0.h >>> +++ b/arch/arm/mach-socfpga/include/mach/boot0.h >>> @@ -11,8 +11,15 @@ >>> .balignl 64,0xf33db33f; >>> >>> .word 0x1337c0d3; /* SoCFPGA preloader >>> validation word */ >>> - .word 0xc01df00d; /* Version, flags, length >>> */ >>> - .word 0xcafec0d3; /* Checksum, zero-pad */ >>> + .word 0xc01df00d; /* Header >>> length(2B),flags(1B),version(1B) */ >>> +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 >>> + .word 0xfeedface; /* Program length(4B) */ >> Keep this indent intact, then it won't generate these crappy - >> entries. >> > Are you saying to keep the comment indent intact, and allign with 1st > comment /* SoCFPGA preloader validation word */ ? Just look at the diff and make sure that it only changes the relevant parts, not extras due to indent changes. >>> >>> + .word 0xf00dcafe; /* >>> + * Program entry offset(4B),relative >>> to >>> + * the start of program header >>> + */ >>> +#endif >>> + .word 0xcafec0d3; /* Simple >>> checksum(2B),spare offset(2B) */ >>> nop; >>> >>> b reset;/* SoCFPGA jumps here */ >>> -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Enhance preloader header with both additional program length > > > > and > > > > program > > > > entry offset attributes, which offset is relative to the start > > > > of > > > > program > > > > header. > > > > > > > > Signed-off-by: Tien Fong Chee > > > > --- > > > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > index 22d9e7f..33c9368 100644 > > > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > @@ -11,8 +11,15 @@ > > > > .balignl 64,0xf33db33f; > > > > > > > > .word 0x1337c0d3; /* SoCFPGA preloader > > > > validation word */ > > > > - .word 0xc01df00d; /* Version, flags, > > > > length > > > > */ > > > > - .word 0xcafec0d3; /* Checksum, zero-pad > > > > */ > > > > + .word 0xc01df00d; /* Header > > > > length(2B),flags(1B),version(1B) */ > > > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > > > + .word 0xfeedface; /* Program length(4B) */ > > > Keep this indent intact, then it won't generate these crappy - > > > entries. > > > > > Are you saying to keep the comment indent intact, and allign with > > 1st > > comment /* SoCFPGA preloader validation word */ ? > Just look at the diff and make sure that it only changes the relevant > parts, not extras due to indent changes. > Not get you, which particular change is due to indent changes only? Some changes are for re-writing more descriptive comment. And some new adding header attributes to support Arria 10. > > > > > > > > > > > > > > > > > + .word 0xf00dcafe; /* > > > > + * Program entry > > > > offset(4B),relative > > > > to > > > > + * the start of program header > > > > + */ > > > > +#endif > > > > + .word 0xcafec0d3; /* Simple > > > > checksum(2B),spare offset(2B) */ > > > > nop; > > > > > > > > b reset;/* SoCFPGA jumps here */ > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On 09/27/2017 05:30 AM, Chee, Tien Fong wrote: > On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: >> On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: >>> >>> On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > From: Tien Fong Chee > > Enhance preloader header with both additional program length > and > program > entry offset attributes, which offset is relative to the start > of > program > header. > > Signed-off-by: Tien Fong Chee > --- > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > b/arch/arm/mach-socfpga/include/mach/boot0.h > index 22d9e7f..33c9368 100644 > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > @@ -11,8 +11,15 @@ > .balignl 64,0xf33db33f; > > .word 0x1337c0d3; /* SoCFPGA preloader > validation word */ > - .word 0xc01df00d; /* Version, flags, > length > */ > - .word 0xcafec0d3; /* Checksum, zero-pad > */ > + .word 0xc01df00d; /* Header > length(2B),flags(1B),version(1B) */ > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > + .word 0xfeedface; /* Program length(4B) */ Keep this indent intact, then it won't generate these crappy - entries. >>> Are you saying to keep the comment indent intact, and allign with >>> 1st >>> comment /* SoCFPGA preloader validation word */ ? >> Just look at the diff and make sure that it only changes the relevant >> parts, not extras due to indent changes. >> > Not get you, which particular change is due to indent changes only? > Some changes are for re-writing more descriptive comment. And some new > adding header attributes to support Arria 10. Aaargh, then don't do two things in one patch. >>> > > > + .word 0xf00dcafe; /* > + * Program entry > offset(4B),relative > to > + * the start of program header > + */ > +#endif > + .word 0xcafec0d3; /* Simple > checksum(2B),spare offset(2B) */ > nop; > > b reset;/* SoCFPGA jumps here */ > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 16/19] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
On Rab, 2017-09-27 at 10:33 +0200, Marek Vasut wrote: > On 09/27/2017 05:30 AM, Chee, Tien Fong wrote: > > > > On Sel, 2017-09-26 at 12:37 +0200, Marek Vasut wrote: > > > > > > On 09/26/2017 06:42 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > > > > > Enhance preloader header with both additional program > > > > > > length > > > > > > and > > > > > > program > > > > > > entry offset attributes, which offset is relative to the > > > > > > start > > > > > > of > > > > > > program > > > > > > header. > > > > > > > > > > > > Signed-off-by: Tien Fong Chee > > > > > > --- > > > > > > arch/arm/mach-socfpga/include/mach/boot0.h | 11 +- > > > > > > - > > > > > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > index 22d9e7f..33c9368 100644 > > > > > > --- a/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > +++ b/arch/arm/mach-socfpga/include/mach/boot0.h > > > > > > @@ -11,8 +11,15 @@ > > > > > > .balignl 64,0xf33db33f; > > > > > > > > > > > > .word 0x1337c0d3; /* SoCFPGA > > > > > > preloader > > > > > > validation word */ > > > > > > - .word 0xc01df00d; /* Version, flags, > > > > > > length > > > > > > */ > > > > > > - .word 0xcafec0d3; /* Checksum, zero- > > > > > > pad > > > > > > */ > > > > > > + .word 0xc01df00d; /* Header > > > > > > length(2B),flags(1B),version(1B) */ > > > > > > +#ifndef CONFIG_TARGET_SOCFPGA_GEN5 > > > > > > + .word 0xfeedface; /* Program length(4B) */ > > > > > Keep this indent intact, then it won't generate these crappy > > > > > - > > > > > entries. > > > > > > > > > Are you saying to keep the comment indent intact, and allign > > > > with > > > > 1st > > > > comment /* SoCFPGA preloader validation word */ ? > > > Just look at the diff and make sure that it only changes the > > > relevant > > > parts, not extras due to indent changes. > > > > > Not get you, which particular change is due to indent changes only? > > Some changes are for re-writing more descriptive comment. And some > > new > > adding header attributes to support Arria 10. > Aaargh, then don't do two things in one patch. > I can split them. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > + .word 0xf00dcafe; /* > > > > > > + * Program entry > > > > > > offset(4B),relative > > > > > > to > > > > > > + * the start of program header > > > > > > + */ > > > > > > +#endif > > > > > > + .word 0xcafec0d3; /* Simple > > > > > > checksum(2B),spare offset(2B) */ > > > > > > nop; > > > > > > > > > > > > b reset;/* SoCFPGA jumps here */ > > > > > > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
