Re: [U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL

2017-01-02 Thread Chee, Tien Fong 
On Jum, 2016-12-30 at 20:04 +0100, Marek Vasut wrote:
> On 12/29/2016 05:54 AM, Chee, Tien Fong wrote:
> > 
> > On Kha, 2016-12-29 at 00:51 +0100, Marek Vasut wrote:
> > > 
> > > On 12/28/2016 07:34 AM, Chee Tien Fong wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > Enhanced defconfig file for Arria10 to enable SPL build and
> > > > supporting
> > > > device tree build for SDMMC.
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > Cc: Marek Vasut 
> > > > Cc: Dinh Nguyen 
> > > > Cc: Chin Liang See 
> > > > Cc: Tien Fong 
> > > > ---
> > > > Changes for V2
> > > > - Removed boot header info setup since it already fixed in
> > > > mainline
> > > > ---
> > > >  configs/socfpga_arria10_defconfig | 18 +-
> > > >  1 file changed, 13 insertions(+), 5 deletions(-)
> > > There's no arria10 defconfig in mainline ?
> > > I only received patches 18/30 and on ?
> > > 
> > patch1 to patch17 are 01-arria10 rebase on u-boot.git, i believe
> > those
> > patches not CC to you orginally. Could you get from U-Boot Digest,
> > Vol
> > 103, Issue 53, or you want me to edit those patches CC to you?
> No, you cannot get them from the digest, it's a digest after all.
> I can get them from the list, but please always CC maintainers on
> relevant patches.
> 
Yeah, i think so. I re-send patch1 to patch17 last week, i believe you 
received all of them already.
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Re: [U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL

2016-12-30 Thread Marek Vasut 
On 12/29/2016 05:54 AM, Chee, Tien Fong wrote:
> On Kha, 2016-12-29 at 00:51 +0100, Marek Vasut wrote:
>> On 12/28/2016 07:34 AM, Chee Tien Fong wrote:
>>>
>>> From: Tien Fong Chee 
>>>
>>> Enhanced defconfig file for Arria10 to enable SPL build and
>>> supporting
>>> device tree build for SDMMC.
>>>
>>> Signed-off-by: Tien Fong Chee 
>>> Cc: Marek Vasut 
>>> Cc: Dinh Nguyen 
>>> Cc: Chin Liang See 
>>> Cc: Tien Fong 
>>> ---
>>> Changes for V2
>>> - Removed boot header info setup since it already fixed in mainline
>>> ---
>>>  configs/socfpga_arria10_defconfig | 18 +-
>>>  1 file changed, 13 insertions(+), 5 deletions(-)
>> There's no arria10 defconfig in mainline ?
>> I only received patches 18/30 and on ?
>>
> patch1 to patch17 are 01-arria10 rebase on u-boot.git, i believe those
> patches not CC to you orginally. Could you get from U-Boot Digest, Vol
> 103, Issue 53, or you want me to edit those patches CC to you?

No, you cannot get them from the digest, it's a digest after all.
I can get them from the list, but please always CC maintainers on
relevant patches.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL

2016-12-28 Thread Marek Vasut 
On 12/28/2016 07:34 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee 
> 
> Enhanced defconfig file for Arria10 to enable SPL build and supporting
> device tree build for SDMMC.
> 
> Signed-off-by: Tien Fong Chee 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Chin Liang See 
> Cc: Tien Fong 
> ---
> Changes for V2
> - Removed boot header info setup since it already fixed in mainline
> ---
>  configs/socfpga_arria10_defconfig | 18 +-
>  1 file changed, 13 insertions(+), 5 deletions(-)

There's no arria10 defconfig in mainline ?
I only received patches 18/30 and on ?

> diff --git a/configs/socfpga_arria10_defconfig 
> b/configs/socfpga_arria10_defconfig
> index 422261b..755bb66 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -3,14 +3,22 @@ CONFIG_ARCH_SOCFPGA=y
>  CONFIG_TARGET_SOCFPGA_ARRIA10=y
>  CONFIG_DM_GPIO=y
>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
> -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk"
> +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
> +CONFIG_IDENT_STRING="socfpga_arria10"
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
>  CONFIG_CMD_GPIO=y
>  CONFIG_DWAPB_GPIO=y
> -CONFIG_DM_ETH=y
> -CONFIG_ETH_DESIGNWARE=y
>  CONFIG_SYS_NS16550=y
> -CONFIG_CADENCE_QSPI=y
> -CONFIG_DESIGNWARE_SPI=y
>  CONFIG_DM_MMC=y
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_CMD_MMC=y
> +CONFIG_USE_TINY_PRINTF=y
> +CONFIG_SPL=y
> +CONFIG_SPL_DM=y
> +CONFIG_SPL_SIMPLE_BUS=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_MMC_SUPPORT=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_OF_LIBFDT=y
> +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
> 


-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH v2 21/30] arm: socfpga: arria10: Enhanced socfpga_arria10_defconfig to support SPL

2016-12-27 Thread Chee Tien Fong 
From: Tien Fong Chee 

Enhanced defconfig file for Arria10 to enable SPL build and supporting
device tree build for SDMMC.

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
Cc: Tien Fong 
---
Changes for V2
- Removed boot header info setup since it already fixed in mainline
---
 configs/socfpga_arria10_defconfig | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/configs/socfpga_arria10_defconfig 
b/configs/socfpga_arria10_defconfig
index 422261b..755bb66 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -3,14 +3,22 @@ CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_ARRIA10=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
-CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk"
+CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
+CONFIG_IDENT_STRING="socfpga_arria10"
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_DWAPB_GPIO=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
-CONFIG_CADENCE_QSPI=y
-CONFIG_DESIGNWARE_SPI=y
 CONFIG_DM_MMC=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_CMD_MMC=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
-- 
2.2.2

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