This is mostly a copy of arm926ejs relocation and known to _not_ work
correctly a.t.m!
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
changes since v1:
- adopted linker script as in patch series v3 arm926ejs: fix linker file for
newer ld support
* move rel.dyn and dynsym after bss
* overlay bss with rel.dyn
- double checked fixup loop in start.S
- there is still an error in relocation fixup loop breaks the boot,
the board hangs after relocation Offset is: 00f8
Dear Albert Aribaud,
can you please have a look for that?
changes since v2:
- add missed parts in branch board_init_r
Dear Albert Aribaud,
still not working, do you have any advice?
arch/arm/cpu/arm920t/start.S| 129 ---
arch/arm/cpu/arm920t/u-boot.lds | 37 +++
2 files changed, 89 insertions(+), 77 deletions(-)
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index d4edde7..c547181 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -77,14 +77,17 @@ _TEXT_BASE:
/*
* These are defined in the board-specific linker script.
+ * Subtracting _start from them lets the linker put their
+ * relative position in the executable instead of leaving
+ * them null.
*/
-.globl _bss_start
-_bss_start:
- .word __bss_start
+.globl _bss_start_ofs
+_bss_start_ofs:
+ .word __bss_start - _start
-.globl _bss_end
-_bss_end:
- .word _end
+.globl _bss_end_ofs
+_bss_end_ofs:
+ .word _bss_end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -103,30 +106,6 @@ FIQ_STACK_START:
IRQ_STACK_START_IN:
.word 0x0badc0de
-.globl _datarel_start
-_datarel_start:
- .word __datarel_start
-
-.globl _datarelrolocal_start
-_datarelrolocal_start:
- .word __datarelrolocal_start
-
-.globl _datarellocal_start
-_datarellocal_start:
- .word __datarellocal_start
-
-.globl _datarelro_start
-_datarelro_start:
- .word __datarelro_start
-
-.globl _got_start
-_got_start:
- .word __got_start
-
-.globl _got_end
-_got_end:
- .word __got_end
-
/*
* the actual start code
*/
@@ -164,7 +143,7 @@ copyex:
# define pWTCON 0x1530
# define INTMSK 0x1448 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
-#else
+# else
# define pWTCON 0x5300
# define INTMSK 0x4A08 /* Interupt-Controller base addresses */
# define INTSUBMSK0x4A1C
@@ -230,9 +209,8 @@ stack_setup:
adr r0, _start
ldr r2, _TEXT_BASE
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 - size of armboot*/
- add r2, r0, r2 /* r2 - source end address */
+ ldr r3, _bss_start_ofs
+ add r2, r0, r3 /* r2 - source end address */
cmp r0, r6
beq clear_bss
@@ -243,35 +221,53 @@ copy_loop:
blo copy_loop
#ifndef CONFIG_PRELOADER
- /* fix got entries */
- ldr r1, _TEXT_BASE /* Text base */
- mov r0, r7 /* reloc addr */
- ldr r2, _got_start /* addr in Flash */
- ldr r3, _got_end/* addr in Flash */
- sub r3, r3, r1
- add r3, r3, r0
- sub r2, r2, r1
- add r2, r2, r0
-
+ /*
+* fix .rel.dyn relocations
+*/
+ ldr r0, _TEXT_BASE /* r0 - Text base */
+ sub r9, r7, r0 /* r9 - relocation offset */
+ ldr r10, _dynsym_start_ofs /* r10 - sym table offset */
+ add r10, r10, r0/* r10 - sym table in FLASH */
+ ldr r2, _rel_dyn_start_ofs /* r2 - rel dyn start offset */
+ add r2, r2, r0 /* r2 - rel dyn start in FLASH */
+ ldr r3, _rel_dyn_end_ofs/* r3 - rel dyn end offset */
+ add r3, r3, r0 /* r3 - rel dyn end in FLASH */
fixloop:
- ldr r4, [r2]
- sub r4, r4, r1
- add r4, r4, r0
- str r4, [r2]
- add r2, r2, #4
+ ldr r0, [r2]/* r0 - location to fix up in FLASH */
+ add r0, r0, r9 /* r0 - location to fix up in RAM */
+ ldr r1, [r2, #4]
+ and r8, r1, #0xff
+ cmp r8, #23 /* relative fixup? */
+ beq fixrel
+ cmp r8, #2 /* absolute fixup? */
+ beq fixabs
+ /* ignore unknown type of fixup */
+ b fixnext
+fixabs:
+ /* absolute fix: set location to (offste) symbol value */
+ mov r1, r1, LSR #4 /* r1 - symbol index in .dynsym */
+ add r1, r10, r1 /* r1 - address of symbol in table */
+ ldr r1, [r1, #4]/* r1 - symbol value */
+ add r1, r9
