Re: [U-Boot] [PATCH v3] nios2: add dma_alloc_coherent

[Scott McNutt]

Applied. Thanks.
--Scott

Thomas Chou wrote:
> This function return cache-line aligned allocation which is mapped
> to uncached io region.
> 
> Signed-off-by: Thomas Chou 
> ---
> arch dir reorganized.
> 
>  arch/nios2/include/asm/dma-mapping.h |   23 +++
>  1 files changed, 23 insertions(+), 0 deletions(-)
>  create mode 100644 arch/nios2/include/asm/dma-mapping.h
> 
> diff --git a/arch/nios2/include/asm/dma-mapping.h 
> b/arch/nios2/include/asm/dma-mapping.h
> new file mode 100644
> index 000..1350e3b
> --- /dev/null
> +++ b/arch/nios2/include/asm/dma-mapping.h
> @@ -0,0 +1,23 @@
> +#ifndef __ASM_NIOS2_DMA_MAPPING_H
> +#define __ASM_NIOS2_DMA_MAPPING_H
> +
> +/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
> + * to uncached io region.
> + *
> + * IO_REGION_BASE should be defined in board config header file
> + *   0x8000 for nommu, 0xe000 for mmu
> + */
> +
> +static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
> +{
> + void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
> + if (!addr)
> + return 0;
> + flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
> + *handle = ((unsigned long)addr +
> +(CONFIG_SYS_DCACHELINE_SIZE - 1)) &
> + ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
> + return (void *)(*handle | IO_REGION_BASE);
> +}
> +
> +#endif /* __ASM_NIOS2_DMA_MAPPING_H */
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[U-Boot] [PATCH v3] nios2: add dma_alloc_coherent

[Thomas Chou]

This function return cache-line aligned allocation which is mapped
to uncached io region.

Signed-off-by: Thomas Chou 
---
arch dir reorganized.

 arch/nios2/include/asm/dma-mapping.h |   23 +++
 1 files changed, 23 insertions(+), 0 deletions(-)
 create mode 100644 arch/nios2/include/asm/dma-mapping.h

diff --git a/arch/nios2/include/asm/dma-mapping.h 
b/arch/nios2/include/asm/dma-mapping.h
new file mode 100644
index 000..1350e3b
--- /dev/null
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_NIOS2_DMA_MAPPING_H
+#define __ASM_NIOS2_DMA_MAPPING_H
+
+/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+ * to uncached io region.
+ *
+ * IO_REGION_BASE should be defined in board config header file
+ *   0x8000 for nommu, 0xe000 for mmu
+ */
+
+static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
+{
+   void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+   if (!addr)
+   return 0;
+   flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
+   *handle = ((unsigned long)addr +
+  (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
+   ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
+   return (void *)(*handle | IO_REGION_BASE);
+}
+
+#endif /* __ASM_NIOS2_DMA_MAPPING_H */
-- 
1.6.6.1

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