Re: [U-Boot] [PATCH v3 07/10] pinctrl: rockchip: Split the common set_pull() func into per Soc【请注意,邮件由u-boot-boun...@lists.denx.de代发】
On 05/07/2019 11:43 AM, Kever Yang wrote: > > On 04/16/2019 09:57 PM, David Wu wrote: >> As the common set_mux func(), implement the feature at the own file >> for each Soc. >> >> Signed-off-by: David Wu > Reviewed-by: Kever Yang Applied to u-boot-rockchip, thanks! > > Thanks, > - Kever >> --- >> >> Change in v3: >> - None >> >> drivers/pinctrl/rockchip/pinctrl-rk3036.c | 23 - >> drivers/pinctrl/rockchip/pinctrl-rk3128.c | 23 - >> drivers/pinctrl/rockchip/pinctrl-rk3188.c | 29 +- >> drivers/pinctrl/rockchip/pinctrl-rk322x.c | 29 +- >> drivers/pinctrl/rockchip/pinctrl-rk3288.c | 40 ++-- >> drivers/pinctrl/rockchip/pinctrl-rk3328.c | 29 +- >> drivers/pinctrl/rockchip/pinctrl-rk3368.c | 40 ++-- >> drivers/pinctrl/rockchip/pinctrl-rk3399.c | 40 ++-- >> .../pinctrl/rockchip/pinctrl-rockchip-core.c | 97 --- >> drivers/pinctrl/rockchip/pinctrl-rockchip.h | 7 +- >> drivers/pinctrl/rockchip/pinctrl-rv1108.c | 30 +- >> 11 files changed, 275 insertions(+), 112 deletions(-) >> >> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c >> b/drivers/pinctrl/rockchip/pinctrl-rk3036.c >> index 8969aea2e3..498b633f22 100644 >> --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c >> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c >> @@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct >> rockchip_pin_bank *bank, >> *bit = pin_num % RK3036_PULL_PINS_PER_REG; >> }; >> >> +static int rk3036_set_pull(struct rockchip_pin_bank *bank, >> + int pin_num, int pull) >> +{ >> +struct regmap *regmap; >> +int reg, ret; >> +u8 bit; >> +u32 data; >> + >> +if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && >> +pull != PIN_CONFIG_BIAS_DISABLE) >> +return -ENOTSUPP; >> + >> +rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); >> +data = BIT(bit + 16); >> +if (pull == PIN_CONFIG_BIAS_DISABLE) >> +data |= BIT(bit); >> +ret = regmap_write(regmap, reg, data); >> + >> +return ret; >> +} >> + >> static struct rockchip_pin_bank rk3036_pin_banks[] = { >> PIN_BANK(0, 32, "gpio0"), >> PIN_BANK(1, 32, "gpio1"), >> @@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = { >> .type = RK3036, >> .grf_mux_offset = 0xa8, >> .set_mux= rk3036_set_mux, >> -.pull_calc_reg = rk3036_calc_pull_reg_and_bit, >> +.set_pull = rk3036_set_pull, >> }; >> >> static const struct udevice_id rk3036_pinctrl_ids[] = { >> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c >> b/drivers/pinctrl/rockchip/pinctrl-rk3128.c >> index de203334c7..104b76c19e 100644 >> --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c >> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c >> @@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct >> rockchip_pin_bank *bank, >> *bit = pin_num % RK3128_PULL_PINS_PER_REG; >> } >> >> +static int rk3128_set_pull(struct rockchip_pin_bank *bank, >> + int pin_num, int pull) >> +{ >> +struct regmap *regmap; >> +int reg, ret; >> +u8 bit; >> +u32 data; >> + >> +if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && >> +pull != PIN_CONFIG_BIAS_DISABLE) >> +return -ENOTSUPP; >> + >> +rk3128_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); >> +data = BIT(bit + 16); >> +if (pull == PIN_CONFIG_BIAS_DISABLE) >> +data |= BIT(bit); >> +ret = regmap_write(regmap, reg, data); >> + >> +return ret; >> +} >> + >> static struct rockchip_pin_bank rk3128_pin_banks[] = { >> PIN_BANK(0, 32, "gpio0"), >> PIN_BANK(1, 32, "gpio1"), >> @@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = { >> .iomux_routes = rk3128_mux_route_data, >> .niomux_routes = ARRAY_SIZE(rk3128_mux_route_data), >> .set_mux= rk3128_set_mux, >> -.pull_calc_reg = rk3128_calc_pull_reg_and_bit, >> +.set_pull = rk3128_set_pull, >> }; >> >> static const struct udevice_id rk3128_pinctrl_ids[] = { >> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c >> b/drivers/pinctrl/rockchip/pinctrl-rk3188.c >> index 617ae28ac8..e09c799e72 100644 >> --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c >> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c >> @@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct >> rockchip_pin_bank *bank, >> } >> } >> >> +static int rk3188_set_pull(struct rockchip_pin_bank *bank, >> + int pin_num, int pull) >> +{ >> +struct regmap *regmap; >> +int reg, ret; >> +u8 bit, type; >> +u32 data; >> + >> +if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT) >> +return -ENOTSUPP; >> + >> +rk3188_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); >> +type = bank->pull_type[pin_num
Re: [U-Boot] [PATCH v3 07/10] pinctrl: rockchip: Split the common set_pull() func into per Soc
On 04/16/2019 09:57 PM, David Wu wrote: > As the common set_mux func(), implement the feature at the own file > for each Soc. > > Signed-off-by: David Wu Reviewed-by: Kever Yang Thanks, - Kever > --- > > Change in v3: > - None > > drivers/pinctrl/rockchip/pinctrl-rk3036.c | 23 - > drivers/pinctrl/rockchip/pinctrl-rk3128.c | 23 - > drivers/pinctrl/rockchip/pinctrl-rk3188.c | 29 +- > drivers/pinctrl/rockchip/pinctrl-rk322x.c | 29 +- > drivers/pinctrl/rockchip/pinctrl-rk3288.c | 40 ++-- > drivers/pinctrl/rockchip/pinctrl-rk3328.c | 29 +- > drivers/pinctrl/rockchip/pinctrl-rk3368.c | 40 ++-- > drivers/pinctrl/rockchip/pinctrl-rk3399.c | 40 ++-- > .../pinctrl/rockchip/pinctrl-rockchip-core.c | 97 --- > drivers/pinctrl/rockchip/pinctrl-rockchip.h | 7 +- > drivers/pinctrl/rockchip/pinctrl-rv1108.c | 30 +- > 11 files changed, 275 insertions(+), 112 deletions(-) > > diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c > b/drivers/pinctrl/rockchip/pinctrl-rk3036.c > index 8969aea2e3..498b633f22 100644 > --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c > +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c > @@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct > rockchip_pin_bank *bank, > *bit = pin_num % RK3036_PULL_PINS_PER_REG; > }; > > +static int rk3036_set_pull(struct rockchip_pin_bank *bank, > +int pin_num, int pull) > +{ > + struct regmap *regmap; > + int reg, ret; > + u8 bit; > + u32 data; > + > + if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && > + pull != PIN_CONFIG_BIAS_DISABLE) > + return -ENOTSUPP; > + > + rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); > + data = BIT(bit + 16); > + if (pull == PIN_CONFIG_BIAS_DISABLE) > + data |= BIT(bit); > + ret = regmap_write(regmap, reg, data); > + > + return ret; > +} > + > static struct rockchip_pin_bank rk3036_pin_banks[] = { > PIN_BANK(0, 32, "gpio0"), > PIN_BANK(1, 32, "gpio1"), > @@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = { > .type = RK3036, > .grf_mux_offset = 0xa8, > .set_mux= rk3036_set_mux, > - .pull_calc_reg = rk3036_calc_pull_reg_and_bit, > + .set_pull = rk3036_set_pull, > }; > > static const struct udevice_id rk3036_pinctrl_ids[] = { > diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c > b/drivers/pinctrl/rockchip/pinctrl-rk3128.c > index de203334c7..104b76c19e 100644 > --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c > +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c > @@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct > rockchip_pin_bank *bank, > *bit = pin_num % RK3128_PULL_PINS_PER_REG; > } > > +static int rk3128_set_pull(struct rockchip_pin_bank *bank, > +int pin_num, int pull) > +{ > + struct regmap *regmap; > + int reg, ret; > + u8 bit; > + u32 data; > + > + if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && > + pull != PIN_CONFIG_BIAS_DISABLE) > + return -ENOTSUPP; > + > + rk3128_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); > + data = BIT(bit + 16); > + if (pull == PIN_CONFIG_BIAS_DISABLE) > + data |= BIT(bit); > + ret = regmap_write(regmap, reg, data); > + > + return ret; > +} > + > static struct rockchip_pin_bank rk3128_pin_banks[] = { > PIN_BANK(0, 32, "gpio0"), > PIN_BANK(1, 32, "gpio1"), > @@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = { > .iomux_routes = rk3128_mux_route_data, > .niomux_routes = ARRAY_SIZE(rk3128_mux_route_data), > .set_mux= rk3128_set_mux, > - .pull_calc_reg = rk3128_calc_pull_reg_and_bit, > + .set_pull = rk3128_set_pull, > }; > > static const struct udevice_id rk3128_pinctrl_ids[] = { > diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c > b/drivers/pinctrl/rockchip/pinctrl-rk3188.c > index 617ae28ac8..e09c799e72 100644 > --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c > +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c > @@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct > rockchip_pin_bank *bank, > } > } > > +static int rk3188_set_pull(struct rockchip_pin_bank *bank, > +int pin_num, int pull) > +{ > + struct regmap *regmap; > + int reg, ret; > + u8 bit, type; > + u32 data; > + > + if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT) > + return -ENOTSUPP; > + > + rk3188_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); > + type = bank->pull_type[pin_num / 8]; > + ret = rockchip_translate_pull_value(type, pull); > + if (ret < 0) { > + debug("unsupported pull setting %d\n", pull); > + ret
[U-Boot] [PATCH v3 07/10] pinctrl: rockchip: Split the common set_pull() func into per Soc
As the common set_mux func(), implement the feature at the own file for each Soc. Signed-off-by: David Wu --- Change in v3: - None drivers/pinctrl/rockchip/pinctrl-rk3036.c | 23 - drivers/pinctrl/rockchip/pinctrl-rk3128.c | 23 - drivers/pinctrl/rockchip/pinctrl-rk3188.c | 29 +- drivers/pinctrl/rockchip/pinctrl-rk322x.c | 29 +- drivers/pinctrl/rockchip/pinctrl-rk3288.c | 40 ++-- drivers/pinctrl/rockchip/pinctrl-rk3328.c | 29 +- drivers/pinctrl/rockchip/pinctrl-rk3368.c | 40 ++-- drivers/pinctrl/rockchip/pinctrl-rk3399.c | 40 ++-- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 97 --- drivers/pinctrl/rockchip/pinctrl-rockchip.h | 7 +- drivers/pinctrl/rockchip/pinctrl-rv1108.c | 30 +- 11 files changed, 275 insertions(+), 112 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c index 8969aea2e3..498b633f22 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c @@ -53,6 +53,27 @@ static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, *bit = pin_num % RK3036_PULL_PINS_PER_REG; }; +static int rk3036_set_pull(struct rockchip_pin_bank *bank, + int pin_num, int pull) +{ + struct regmap *regmap; + int reg, ret; + u8 bit; + u32 data; + + if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && + pull != PIN_CONFIG_BIAS_DISABLE) + return -ENOTSUPP; + + rk3036_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); + data = BIT(bit + 16); + if (pull == PIN_CONFIG_BIAS_DISABLE) + data |= BIT(bit); + ret = regmap_write(regmap, reg, data); + + return ret; +} + static struct rockchip_pin_bank rk3036_pin_banks[] = { PIN_BANK(0, 32, "gpio0"), PIN_BANK(1, 32, "gpio1"), @@ -66,7 +87,7 @@ static struct rockchip_pin_ctrl rk3036_pin_ctrl = { .type = RK3036, .grf_mux_offset = 0xa8, .set_mux= rk3036_set_mux, - .pull_calc_reg = rk3036_calc_pull_reg_and_bit, + .set_pull = rk3036_set_pull, }; static const struct udevice_id rk3036_pinctrl_ids[] = { diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c index de203334c7..104b76c19e 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c @@ -152,6 +152,27 @@ static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, *bit = pin_num % RK3128_PULL_PINS_PER_REG; } +static int rk3128_set_pull(struct rockchip_pin_bank *bank, + int pin_num, int pull) +{ + struct regmap *regmap; + int reg, ret; + u8 bit; + u32 data; + + if (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT && + pull != PIN_CONFIG_BIAS_DISABLE) + return -ENOTSUPP; + + rk3128_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); + data = BIT(bit + 16); + if (pull == PIN_CONFIG_BIAS_DISABLE) + data |= BIT(bit); + ret = regmap_write(regmap, reg, data); + + return ret; +} + static struct rockchip_pin_bank rk3128_pin_banks[] = { PIN_BANK(0, 32, "gpio0"), PIN_BANK(1, 32, "gpio1"), @@ -170,7 +191,7 @@ static struct rockchip_pin_ctrl rk3128_pin_ctrl = { .iomux_routes = rk3128_mux_route_data, .niomux_routes = ARRAY_SIZE(rk3128_mux_route_data), .set_mux= rk3128_set_mux, - .pull_calc_reg = rk3128_calc_pull_reg_and_bit, + .set_pull = rk3128_set_pull, }; static const struct udevice_id rk3128_pinctrl_ids[] = { diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c index 617ae28ac8..e09c799e72 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c @@ -71,6 +71,33 @@ static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, } } +static int rk3188_set_pull(struct rockchip_pin_bank *bank, + int pin_num, int pull) +{ + struct regmap *regmap; + int reg, ret; + u8 bit, type; + u32 data; + + if (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT) + return -ENOTSUPP; + + rk3188_calc_pull_reg_and_bit(bank, pin_num, ®map, ®, &bit); + type = bank->pull_type[pin_num / 8]; + ret = rockchip_translate_pull_value(type, pull); + if (ret < 0) { + debug("unsupported pull setting %d\n", pull); + return ret; + } + + /* enable the write to the equivalent lower bits */ + data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); + data |= (ret << bit); + ret = regmap_write(regmap, reg, data); + +