[U-Boot] [PATCH v3 1/3] apf27: add missing constant to mx27
Add some missing constant (chip select, ...), and a file mxc_nand.h with the NFC constant. Signed-off-by: Philippe Reynes Signed-off-by: Eric Jarrige --- arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34 arch/arm/include/asm/arch-mx27/imx-regs.h | 11 - arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 + 3 files changed, 127 insertions(+), 1 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c index f3a8d7b..b95c58c 100644 --- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c @@ -34,6 +34,7 @@ int main(void) DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1)); DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0)); DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1)); + DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr)); DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0)); DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0)); @@ -41,5 +42,38 @@ int main(void) DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1)); DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc)); + DEFINE(GPCR, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, gpcr)); + DEFINE(FMCR, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, fmcr)); + DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, dscr2)); + DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, dscr3)); + DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, dscr7)); + DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE + + offsetof(struct system_control_regs, dscr10)); + + DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u)); + DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l)); + DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a)); + DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u)); + DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l)); + DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a)); + DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u)); + DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l)); + DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a)); + DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u)); + DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l)); + DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a)); + DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u)); + DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l)); + DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a)); + DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u)); + DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l)); + DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a)); + DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim)); + return 0; } diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 2f6c823..d3a14e1 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -185,7 +185,7 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; - } bank[1]; + } bank[2]; }; struct fuse_bank0_regs { @@ -511,4 +511,13 @@ struct fuse_bank0_regs { #define IIM_ERR_SNSE (1 << 2) #define IIM_ERR_PARITYE(1 << 1) +/* + * Memory areas of the NFC + */ +#define IMX_NFC_BASE(0xD800) +#define IMX_NFC_MAIN_AREA0 (0xD800) +#define IMX_NFC_MAIN_AREA1 (0xD8000200) +#define IMX_NFC_SPARE_AREA0 (0xD8000800) +#define IMX_NFC_REGS(0xD8000E00) + #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h b/arch/arm/include/asm/arch-mx27/mxc_nand.h new file mode 100644 index 000..564419e --- /dev/null +++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h @@ -0,0 +1,83 @@ +/* + * (c) 2012 Philippe Reynes + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty
Re: [U-Boot] [PATCH v3 1/3] apf27: add missing constant to mx27
On 01/12/2012 11:44, Philippe Reynes wrote: > Add some missing constant (chip select, ...), and > a file mxc_nand.h with the NFC constant. > > Signed-off-by: Philippe Reynes > Signed-off-by: Eric Jarrige > --- Hi Philippe, > arch/arm/cpu/arm926ejs/mx27/asm-offsets.c | 34 > arch/arm/include/asm/arch-mx27/imx-regs.h | 11 - > arch/arm/include/asm/arch-mx27/mxc_nand.h | 83 > + > 3 files changed, 127 insertions(+), 1 deletions(-) > create mode 100644 arch/arm/include/asm/arch-mx27/mxc_nand.h > > diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c > b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c > index f3a8d7b..b95c58c 100644 > --- a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c > +++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c > @@ -34,6 +34,7 @@ int main(void) > DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1)); > DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0)); > DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1)); > + DEFINE(CCSR, IMX_PLL_BASE + offsetof(struct pll_regs, ccsr)); > > DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0)); > DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0)); > @@ -41,5 +42,38 @@ int main(void) > DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1)); > DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc)); > > + DEFINE(GPCR, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, gpcr)); > + DEFINE(FMCR, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, fmcr)); > + DEFINE(DSCR2, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, dscr2)); > + DEFINE(DSCR3, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, dscr3)); > + DEFINE(DSCR7, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, dscr7)); > + DEFINE(DSCR10, IMX_SYSTEM_CTL_BASE + > +offsetof(struct system_control_regs, dscr10)); > + > + DEFINE(CS0U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0u)); > + DEFINE(CS0L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0l)); > + DEFINE(CS0A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs0a)); > + DEFINE(CS1U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1u)); > + DEFINE(CS1L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1l)); > + DEFINE(CS1A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs1a)); > + DEFINE(CS2U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2u)); > + DEFINE(CS2L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2l)); > + DEFINE(CS2A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs2a)); > + DEFINE(CS3U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3u)); > + DEFINE(CS3L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3l)); > + DEFINE(CS3A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs3a)); > + DEFINE(CS4U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4u)); > + DEFINE(CS4L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4l)); > + DEFINE(CS4A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs4a)); > + DEFINE(CS5U, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5u)); > + DEFINE(CS5L, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5l)); > + DEFINE(CS5A, IMX_WEIM_BASE + offsetof(struct weim_regs, cs5a)); > + DEFINE(EIM, IMX_WEIM_BASE + offsetof(struct weim_regs, eim)); > + > return 0; > } > diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h > b/arch/arm/include/asm/arch-mx27/imx-regs.h > index 2f6c823..d3a14e1 100644 > --- a/arch/arm/include/asm/arch-mx27/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h > @@ -185,7 +185,7 @@ struct iim_regs { > struct fuse_bank { > u32 fuse_regs[0x20]; > u32 fuse_rsvd[0xe0]; > - } bank[1]; > + } bank[2]; > }; I think the > > struct fuse_bank0_regs { > @@ -511,4 +511,13 @@ struct fuse_bank0_regs { > #define IIM_ERR_SNSE (1 << 2) > #define IIM_ERR_PARITYE (1 << 1) > > +/* > + * Memory areas of the NFC > + */ > +#define IMX_NFC_BASE(0xD800) > +#define IMX_NFC_MAIN_AREA0 (0xD800) > +#define IMX_NFC_MAIN_AREA1 (0xD8000200) > +#define IMX_NFC_SPARE_AREA0 (0xD8000800) > +#define IMX_NFC_REGS(0xD8000E00) > + > #endif /* _IMX_REGS_H */ > diff --git a/arch/arm/include/asm/arch-mx27/mxc_nand.h > b/arch/arm/include/asm/arch-mx27/mxc_nand.h > new file mode 100644 > index 000..564419e > --- /dev/null > +++ b/arch/arm/include/asm/arch-mx27/mxc_nand.h > @@ -0,0 +1,83 @@ > +/* > + * (c) 2012 Philippe Reynes > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either