Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.
Signed-off-by: Tom Warren twar...@nvidia.com
Acked-by: Thierry Reding thierry.red...@avionic-design.de
---
v3: new
board/avionic-design/dts/tegra20-tamonten.dtsi | 489
1 files changed, 489 insertions(+), 0 deletions(-)
create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi
diff --git a/board/avionic-design/dts/tegra20-tamonten.dtsi
b/board/avionic-design/dts/tegra20-tamonten.dtsi
new file mode 100644
index 000..4766aba
--- /dev/null
+++ b/board/avionic-design/dts/tegra20-tamonten.dtsi
@@ -0,0 +1,489 @@
+/include/ tegra20.dtsi
+
+/ {
+ model = Avionic Design Tamonten SOM;
+ compatible = ad,tamonten, nvidia,tegra20;
+
+ memory {
+ reg = 0x 0x2000;
+ };
+
+ host1x {
+ hdmi {
+ vdd-supply = hdmi_vdd_reg;
+ pll-supply = hdmi_pll_reg;
+
+ nvidia,ddc-i2c-bus = hdmi_ddc;
+ nvidia,hpd-gpio = gpio 111 0; /* PN7 */
+ };
+ };
+
+ pinmux {
+ pinctrl-names = default;
+ pinctrl-0 = state_default;
+
+ state_default: pinmux {
+ ata {
+ nvidia,pins = ata;
+ nvidia,function = ide;
+ };
+ atb {
+ nvidia,pins = atb, gma, gme;
+ nvidia,function = sdio4;
+ };
+ atc {
+ nvidia,pins = atc;
+ nvidia,function = nand;
+ };
+ atd {
+ nvidia,pins = atd, ate, gmb, gmd, gpu,
+ spia, spib, spic;
+ nvidia,function = gmi;
+ };
+ cdev1 {
+ nvidia,pins = cdev1;
+ nvidia,function = plla_out;
+ };
+ cdev2 {
+ nvidia,pins = cdev2;
+ nvidia,function = pllp_out4;
+ };
+ crtp {
+ nvidia,pins = crtp;
+ nvidia,function = crt;
+ };
+ csus {
+ nvidia,pins = csus;
+ nvidia,function = vi_sensor_clk;
+ };
+ dap1 {
+ nvidia,pins = dap1;
+ nvidia,function = dap1;
+ };
+ dap2 {
+ nvidia,pins = dap2;
+ nvidia,function = dap2;
+ };
+ dap3 {
+ nvidia,pins = dap3;
+ nvidia,function = dap3;
+ };
+ dap4 {
+ nvidia,pins = dap4;
+ nvidia,function = dap4;
+ };
+ dta {
+ nvidia,pins = dta, dtd;
+ nvidia,function = sdio2;
+ };
+ dtb {
+ nvidia,pins = dtb, dtc, dte;
+ nvidia,function = rsvd1;
+ };
+ dtf {
+ nvidia,pins = dtf;
+ nvidia,function = i2c3;
+ };
+ gmc {
+ nvidia,pins = gmc;
+ nvidia,function = uartd;
+ };
+ gpu7 {
+ nvidia,pins = gpu7;
+ nvidia,function = rtck;
+ };
+ gpv {
+ nvidia,pins = gpv, slxa, slxk;
+ nvidia,function = pcie;
+ };
+ hdint {
+ nvidia,pins = hdint;
+ nvidia,function = hdmi;
+ };
+ i2cp {
+ nvidia,pins = i2cp;
+ nvidia,function = i2cp;
+ };
+ irrx {
+ nvidia,pins = irrx, irtx;
+ nvidia,function = uarta;
+ };
+ kbca {
+ nvidia,pins = kbca, kbcb,