Re: [U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

[Ley Foon Tan]

On Mon, Jan 23, 2017 at 12:19 PM, Marek Vasut  wrote:
> On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
>> From: Tien Fong Chee 
>>
>> Signed-off-by: Tien Fong Chee 
>> Cc: Marek Vasut 
>> Cc: Dinh Nguyen 
>> Cc: Chin Liang See 
>> Cc: Tien Fong 
>> ---
>>  arch/arm/mach-socfpga/include/mach/pinmux.h |  17 +
>>  arch/arm/mach-socfpga/pinmux.c  | 104 
>> 
>>  2 files changed, 121 insertions(+)
>>  create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
>>  create mode 100644 arch/arm/mach-socfpga/pinmux.c
>>
>> diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h 
>> b/arch/arm/mach-socfpga/include/mach/pinmux.h
>> new file mode 100644
>> index 000..ff54caa
>> --- /dev/null
>> +++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
>> @@ -0,0 +1,17 @@
>> +/*
>> + * Copyright (C) 2016 Intel Corporation 
>> + *
>> + * SPDX-License-Identifier:  GPL-2.0
>> + */
>> +
>> +#ifndef  _PINMUX_H_
>> +#define  _PINMUX_H_
>> +
>> +#ifndef __ASSEMBLY__
>> +int config_dedicated_pins(const void *blob);
>> +int config_pins(const void *blob, const char *pin_grp);
>> +#endif
>> +
>> +
>> +
>
> Drop these newlines.
Okay
>
>> +#endif /* _PINMUX_H_ */
>> diff --git a/arch/arm/mach-socfpga/pinmux.c b/arch/arm/mach-socfpga/pinmux.c
>> new file mode 100644
>> index 000..d45722f
>> --- /dev/null
>> +++ b/arch/arm/mach-socfpga/pinmux.c
>> @@ -0,0 +1,104 @@
>> +/*
>> + *  Copyright (C) 2016 Intel Corporation 
>> + *
>> + * SPDX-License-Identifier:  GPL-2.0
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +int config_dedicated_pins(const void *blob);
>> +int config_pins(const void *blob, const char *pin_grp);
>> +static int __do_pinctr_pins(const void *blob, int child, const char 
>> *node_name);
>> +static int do_pinctrl_pins(const void *blob, int node, const char 
>> *child_name);
>
> __function is reserved, avoid using the __ prefix.
Okay.
>
>> +static int __do_pinctr_pins(const void *blob, int child, const char 
>> *node_name)
>> +{
>> + int len;
>> + fdt_addr_t base_addr;
>> + fdt_size_t size;
>> + const u32 *cell;
>> + u32 offset, value;
>> +
>> + base_addr = fdtdec_get_addr_size(blob, child, "reg", );
>> + if (base_addr != FDT_ADDR_T_NONE) {
>> + cell = fdt_getprop(blob, child, "pinctrl-single,pins",
>> + );
>> + if (cell != NULL) {
>> + debug("%p %d\n", cell, len);
>> + for (;len > 0; len -= (2*sizeof(u32))) {
>> + offset = fdt32_to_cpu(*cell++);
>> + value = fdt32_to_cpu(*cell++);
>> + debug("<0x%x 0x%x>\n", offset, value);
>> + writel(value, base_addr + offset);
>> + }
>> + return 0;
>> + }
>> + }
>> + return 1;
>> +}
>> +
>> +static int do_pinctrl_pins(const void *blob, int node, const char 
>> *child_name)
>> +{
>> + int child, len;
>> + const char *node_name;
>> +
>> + child = fdt_first_subnode(blob, node);
>> +
>> + if (child < 0)
>> + return 2;
>
> Use proper error codes from errno.h and propagate errors, fix globally.
Okay.
>
>> + node_name = fdt_get_name(blob, child, );
>> +
>> + while (node_name) {
>> + if (!strcmp(child_name, node_name)) {
>> + __do_pinctr_pins(blob, child, node_name);
>> + return(0);
>> + }
>> + child = fdt_next_subnode(blob, child);
>> +
>> + if (child < 0)
>> + break;
>> +
>> + node_name = fdt_get_name(blob, child, );
>> + }
>> +
>> + return 1;
>> +}
>> +
>> +int config_dedicated_pins(const void *blob)
>> +{
>> + int node;
>> +
>> + node = fdtdec_next_compatible(blob, 0,
>> + COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
>> +
>> + if (node < 0)
>> + return 1;
>> +
>> + if (do_pinctrl_pins(blob, node, "dedicated_cfg"))
>> + return 2;
>> +
>> + if (do_pinctrl_pins(blob, node, "dedicated"))
>> + return 3;
>> +
>> + return 0;
>> +}
>> +
>> +int config_pins(const void *blob, const char *pin_grp)
>> +{
>> + int node;
>> +
>> + node = fdtdec_next_compatible(blob, 0,
>> + COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
>> +
>> + if (node < 0)
>> + return 1;
>> +
>> + if (do_pinctrl_pins(blob, node, pin_grp))
>> + return 2;
>> +
>> + return 0;
>> +}
>>
>
>
> --
> Best regards,
> Marek Vasut
> ___
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Re: [U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

[Marek Vasut]

On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee 
> 
> Signed-off-by: Tien Fong Chee 
> Cc: Marek Vasut 
> Cc: Dinh Nguyen 
> Cc: Chin Liang See 
> Cc: Tien Fong 
> ---
>  arch/arm/mach-socfpga/include/mach/pinmux.h |  17 +
>  arch/arm/mach-socfpga/pinmux.c  | 104 
> 
>  2 files changed, 121 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
>  create mode 100644 arch/arm/mach-socfpga/pinmux.c
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h 
> b/arch/arm/mach-socfpga/include/mach/pinmux.h
> new file mode 100644
> index 000..ff54caa
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
> @@ -0,0 +1,17 @@
> +/*
> + * Copyright (C) 2016 Intel Corporation 
> + *
> + * SPDX-License-Identifier:  GPL-2.0
> + */
> +
> +#ifndef  _PINMUX_H_
> +#define  _PINMUX_H_
> +
> +#ifndef __ASSEMBLY__
> +int config_dedicated_pins(const void *blob);
> +int config_pins(const void *blob, const char *pin_grp);
> +#endif
> +
> +
> +

Drop these newlines.

> +#endif /* _PINMUX_H_ */
> diff --git a/arch/arm/mach-socfpga/pinmux.c b/arch/arm/mach-socfpga/pinmux.c
> new file mode 100644
> index 000..d45722f
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/pinmux.c
> @@ -0,0 +1,104 @@
> +/*
> + *  Copyright (C) 2016 Intel Corporation 
> + *
> + * SPDX-License-Identifier:  GPL-2.0
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +int config_dedicated_pins(const void *blob);
> +int config_pins(const void *blob, const char *pin_grp);
> +static int __do_pinctr_pins(const void *blob, int child, const char 
> *node_name);
> +static int do_pinctrl_pins(const void *blob, int node, const char 
> *child_name);

__function is reserved, avoid using the __ prefix.

> +static int __do_pinctr_pins(const void *blob, int child, const char 
> *node_name)
> +{
> + int len;
> + fdt_addr_t base_addr;
> + fdt_size_t size;
> + const u32 *cell;
> + u32 offset, value;
> +
> + base_addr = fdtdec_get_addr_size(blob, child, "reg", );
> + if (base_addr != FDT_ADDR_T_NONE) {
> + cell = fdt_getprop(blob, child, "pinctrl-single,pins",
> + );
> + if (cell != NULL) {
> + debug("%p %d\n", cell, len);
> + for (;len > 0; len -= (2*sizeof(u32))) {
> + offset = fdt32_to_cpu(*cell++);
> + value = fdt32_to_cpu(*cell++);
> + debug("<0x%x 0x%x>\n", offset, value);
> + writel(value, base_addr + offset);
> + }
> + return 0;
> + }
> + }
> + return 1;
> +}
> +
> +static int do_pinctrl_pins(const void *blob, int node, const char 
> *child_name)
> +{
> + int child, len;
> + const char *node_name;
> +
> + child = fdt_first_subnode(blob, node);
> +
> + if (child < 0)
> + return 2;

Use proper error codes from errno.h and propagate errors, fix globally.

> + node_name = fdt_get_name(blob, child, );
> +
> + while (node_name) {
> + if (!strcmp(child_name, node_name)) {
> + __do_pinctr_pins(blob, child, node_name);
> + return(0);
> + }
> + child = fdt_next_subnode(blob, child);
> +
> + if (child < 0)
> + break;
> +
> + node_name = fdt_get_name(blob, child, );
> + }
> +
> + return 1;
> +}
> +
> +int config_dedicated_pins(const void *blob)
> +{
> + int node;
> +
> + node = fdtdec_next_compatible(blob, 0,
> + COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
> +
> + if (node < 0)
> + return 1;
> +
> + if (do_pinctrl_pins(blob, node, "dedicated_cfg"))
> + return 2;
> +
> + if (do_pinctrl_pins(blob, node, "dedicated"))
> + return 3;
> +
> + return 0;
> +}
> +
> +int config_pins(const void *blob, const char *pin_grp)
> +{
> + int node;
> +
> + node = fdtdec_next_compatible(blob, 0,
> + COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
> +
> + if (node < 0)
> + return 1;
> +
> + if (do_pinctrl_pins(blob, node, pin_grp))
> + return 2;
> +
> + return 0;
> +}
> 


-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

[Chee Tien Fong]

From: Tien Fong Chee 

Signed-off-by: Tien Fong Chee 
Cc: Marek Vasut 
Cc: Dinh Nguyen 
Cc: Chin Liang See 
Cc: Tien Fong 
---
 arch/arm/mach-socfpga/include/mach/pinmux.h |  17 +
 arch/arm/mach-socfpga/pinmux.c  | 104 
 2 files changed, 121 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h
 create mode 100644 arch/arm/mach-socfpga/pinmux.c

diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h 
b/arch/arm/mach-socfpga/include/mach/pinmux.h
new file mode 100644
index 000..ff54caa
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2016 Intel Corporation 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#ifndef_PINMUX_H_
+#define_PINMUX_H_
+
+#ifndef __ASSEMBLY__
+int config_dedicated_pins(const void *blob);
+int config_pins(const void *blob, const char *pin_grp);
+#endif
+
+
+
+#endif /* _PINMUX_H_ */
diff --git a/arch/arm/mach-socfpga/pinmux.c b/arch/arm/mach-socfpga/pinmux.c
new file mode 100644
index 000..d45722f
--- /dev/null
+++ b/arch/arm/mach-socfpga/pinmux.c
@@ -0,0 +1,104 @@
+/*
+ *  Copyright (C) 2016 Intel Corporation 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+int config_dedicated_pins(const void *blob);
+int config_pins(const void *blob, const char *pin_grp);
+static int __do_pinctr_pins(const void *blob, int child, const char 
*node_name);
+static int do_pinctrl_pins(const void *blob, int node, const char *child_name);
+
+static int __do_pinctr_pins(const void *blob, int child, const char *node_name)
+{
+   int len;
+   fdt_addr_t base_addr;
+   fdt_size_t size;
+   const u32 *cell;
+   u32 offset, value;
+
+   base_addr = fdtdec_get_addr_size(blob, child, "reg", );
+   if (base_addr != FDT_ADDR_T_NONE) {
+   cell = fdt_getprop(blob, child, "pinctrl-single,pins",
+   );
+   if (cell != NULL) {
+   debug("%p %d\n", cell, len);
+   for (;len > 0; len -= (2*sizeof(u32))) {
+   offset = fdt32_to_cpu(*cell++);
+   value = fdt32_to_cpu(*cell++);
+   debug("<0x%x 0x%x>\n", offset, value);
+   writel(value, base_addr + offset);
+   }
+   return 0;
+   }
+   }
+   return 1;
+}
+
+static int do_pinctrl_pins(const void *blob, int node, const char *child_name)
+{
+   int child, len;
+   const char *node_name;
+
+   child = fdt_first_subnode(blob, node);
+
+   if (child < 0)
+   return 2;
+
+   node_name = fdt_get_name(blob, child, );
+
+   while (node_name) {
+   if (!strcmp(child_name, node_name)) {
+   __do_pinctr_pins(blob, child, node_name);
+   return(0);
+   }
+   child = fdt_next_subnode(blob, child);
+
+   if (child < 0)
+   break;
+
+   node_name = fdt_get_name(blob, child, );
+   }
+
+   return 1;
+}
+
+int config_dedicated_pins(const void *blob)
+{
+   int node;
+
+   node = fdtdec_next_compatible(blob, 0,
+   COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
+
+   if (node < 0)
+   return 1;
+
+   if (do_pinctrl_pins(blob, node, "dedicated_cfg"))
+   return 2;
+
+   if (do_pinctrl_pins(blob, node, "dedicated"))
+   return 3;
+
+   return 0;
+}
+
+int config_pins(const void *blob, const char *pin_grp)
+{
+   int node;
+
+   node = fdtdec_next_compatible(blob, 0,
+   COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE);
+
+   if (node < 0)
+   return 1;
+
+   if (do_pinctrl_pins(blob, node, pin_grp))
+   return 2;
+
+   return 0;
+}
-- 
2.2.0

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