[U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-15 Thread Dan Murphy
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree.  If the value is not set in the
devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the
driver.

Signed-off-by: Dan Murphy 
---

v6 - Fix build error when DM_ETH is not configured - 
https://patchwork.ozlabs.org/patch/608764/

 drivers/net/phy/ti.c | 87 ++--
 1 file changed, 77 insertions(+), 10 deletions(-)

diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c
index 937426b..4c4f0c1 100644
--- a/drivers/net/phy/ti.c
+++ b/drivers/net/phy/ti.c
@@ -6,6 +6,14 @@
  */
 #include 
 #include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
 
 /* TI DP83867 */
 #define DP83867_DEVADDR0x1f
@@ -71,6 +79,17 @@
 #define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */
 #define MII_MMD_CTRL_INCR_ON_WT0xC000 /* post increment on writes only 
*/
 
+/* User setting - can be taken from DTS */
+#define DEFAULT_RX_ID_DELAYDP83867_RGMIIDCTL_2_25_NS
+#define DEFAULT_TX_ID_DELAYDP83867_RGMIIDCTL_2_75_NS
+#define DEFAULT_FIFO_DEPTH DP83867_PHYCR_FIFO_DEPTH_4_B_NIB
+
+struct dp83867_private {
+   int rx_id_delay;
+   int tx_id_delay;
+   int fifo_depth;
+};
+
 /**
  * phy_read_mmd_indirect - reads data from the MMD registers
  * @phydev: The PHY device bus
@@ -148,16 +167,60 @@ static inline bool phy_interface_is_rgmii(struct 
phy_device *phydev)
phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
 }
 
-/* User setting - can be taken from DTS */
-#define RX_ID_DELAY8
-#define TX_ID_DELAY0xa
-#define FIFO_DEPTH 1
+#if defined(CONFIG_DM_ETH)
+/**
+ * dp83867_data_init - Convenience function for setting PHY specific data
+ *
+ * @phydev: the phy_device struct
+ */
+static int dp83867_of_init(struct phy_device *phydev)
+{
+   struct dp83867_private *dp83867 = phydev->priv;
+   struct udevice *dev = phydev->dev;
+
+   dp83867->rx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+"ti,rx-internal-delay", -1);
+
+   dp83867->tx_id_delay = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+"ti,tx-internal-delay", -1);
+
+   dp83867->fifo_depth = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+"ti,fifo-depth", -1);
+
+   return 0;
+}
+#else
+static int dp83867_of_init(struct phy_device *phydev)
+{
+   struct dp83867_private *dp83867 = phydev->priv;
+
+   dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY;
+   dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY;
+   dp83867->fifo_depth = DEFAULT_FIFO_DEPTH;
+
+   return 0;
+}
+#endif
 
 static int dp83867_config(struct phy_device *phydev)
 {
+   struct dp83867_private *dp83867;
unsigned int val, delay, cfg2;
int ret;
 
+   if (!phydev->priv) {
+   dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL);
+   if (!dp83867)
+   return -ENOMEM;
+
+   phydev->priv = dp83867;
+   ret = dp83867_of_init(phydev);
+   if (ret)
+   goto err_out;
+   } else {
+   dp83867 = (struct dp83867_private *)phydev->priv;
+   }
+
/* Restart the PHY.  */
val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);
phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL,
@@ -166,9 +229,9 @@ static int dp83867_config(struct phy_device *phydev)
if (phy_interface_is_rgmii(phydev)) {
ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,
(DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) |
-   (FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
+   (dp83867->fifo_depth << 
DP83867_PHYCR_FIFO_DEPTH_SHIFT));
if (ret)
-   return ret;
+   goto err_out;
} else {
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR,
  (BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000));
@@ -189,8 +252,8 @@ static int dp83867_config(struct phy_device *phydev)
  DP83867_PHYCTRL_SGMIIEN |
  (DP83867_MDI_CROSSOVER_MDIX <<
  DP83867_MDI_CROSSOVER) |
- (FIFO_DEPTH << DP83867_PHYCTRL_RXFIFO_SHIFT) |
- (FIFO_DEPTH  << DP83867_PHYCTRL_TXFIFO_SHIFT));
+ (dp83867->fifo_depth << DP83867_PHYCTRL_RXFIFO_SHIFT) 
|
+ (dp83867->fifo_depth << 
DP83867_PHYCTRL_TXFIFO_SHIFT));
phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_BISCR, 0x0);
}
 
@@ -212,8 +275,8 @@ static int dp83867_config(struct phy_device *phydev)
phy_w

Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-20 Thread Mugunthan V N
On Friday 15 April 2016 05:57 PM, Dan Murphy wrote:
> Not all devices use the same internal delay or fifo depth.
> Add the ability to set the internal delay for rx or tx and the
> fifo depth via the devicetree.  If the value is not set in the
> devicetree then set the delay to the default.
> 
> If devicetree is not used then use the default defines within the
> driver.
> 
> Signed-off-by: Dan Murphy 

Tested this on dra72 rev C evm

Tested-by: Mugunthan V N 

Regards
Mugutnhan V N
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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-25 Thread Joe Hershberger
On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
> Not all devices use the same internal delay or fifo depth.
> Add the ability to set the internal delay for rx or tx and the
> fifo depth via the devicetree.  If the value is not set in the
> devicetree then set the delay to the default.
>
> If devicetree is not used then use the default defines within the
> driver.
>
> Signed-off-by: Dan Murphy 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-26 Thread Joe Hershberger
On Mon, Apr 25, 2016 at 4:35 PM, Joe Hershberger
 wrote:
> On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
>> Not all devices use the same internal delay or fifo depth.
>> Add the ability to set the internal delay for rx or tx and the
>> fifo depth via the devicetree.  If the value is not set in the
>> devicetree then set the delay to the default.
>>
>> If devicetree is not used then use the default defines within the
>> driver.
>>
>> Signed-off-by: Dan Murphy 
>
> Acked-by: Joe Hershberger 

This patch is not checkpatch.pl clean. Please resubmit.


610950.mbox:140: WARNING: line over 80 characters
610950.mbox:153: WARNING: line over 80 characters
610950.mbox:154: WARNING: line over 80 characters
610950.mbox:165: WARNING: line over 80 characters
total: 0 errors, 4 warnings, 0 checks, 136 lines checked
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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-27 Thread Dan Murphy
Joe

On 04/26/2016 04:44 PM, Joe Hershberger wrote:
> On Mon, Apr 25, 2016 at 4:35 PM, Joe Hershberger
>  wrote:
>> On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
>>> Not all devices use the same internal delay or fifo depth.
>>> Add the ability to set the internal delay for rx or tx and the
>>> fifo depth via the devicetree.  If the value is not set in the
>>> devicetree then set the delay to the default.
>>>
>>> If devicetree is not used then use the default defines within the
>>> driver.
>>>
>>> Signed-off-by: Dan Murphy 
>> Acked-by: Joe Hershberger 
> This patch is not checkpatch.pl clean. Please resubmit.
>
>
> 610950.mbox:140: WARNING: line over 80 characters
> 610950.mbox:153: WARNING: line over 80 characters
> 610950.mbox:154: WARNING: line over 80 characters
> 610950.mbox:165: WARNING: line over 80 characters
> total: 0 errors, 4 warnings, 0 checks, 136 lines checked

How do you want me to rebase these patches on the SGMII work from Michal on the 
ti.c
or off of master?  The patch I submitted was based off of the SGMII patchset.

Need to know how you want to handle this as I see the SGMII code is not in the 
base line
yet.

Dan

-- 
--
Dan Murphy

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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-27 Thread Joe Hershberger
On Wed, Apr 27, 2016 at 10:46 AM, Dan Murphy  wrote:
> Joe
>
> On 04/26/2016 04:44 PM, Joe Hershberger wrote:
>> On Mon, Apr 25, 2016 at 4:35 PM, Joe Hershberger
>>  wrote:
>>> On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
 Not all devices use the same internal delay or fifo depth.
 Add the ability to set the internal delay for rx or tx and the
 fifo depth via the devicetree.  If the value is not set in the
 devicetree then set the delay to the default.

 If devicetree is not used then use the default defines within the
 driver.

 Signed-off-by: Dan Murphy 
>>> Acked-by: Joe Hershberger 
>> This patch is not checkpatch.pl clean. Please resubmit.
>>
>>
>> 610950.mbox:140: WARNING: line over 80 characters
>> 610950.mbox:153: WARNING: line over 80 characters
>> 610950.mbox:154: WARNING: line over 80 characters
>> 610950.mbox:165: WARNING: line over 80 characters
>> total: 0 errors, 4 warnings, 0 checks, 136 lines checked
>
> How do you want me to rebase these patches on the SGMII work from Michal on 
> the ti.c
> or off of master?  The patch I submitted was based off of the SGMII patchset.

I'm pulling in some of Michal's patches this release. Please reference
which patches this depends on (patchwork links).

> Need to know how you want to handle this as I see the SGMII code is not in 
> the base line
> yet.

If the patches you depend on are acceptable (no changes requested)
then definitely base your changes on them, but point them out to me.

Thanks,
-Joe
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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-27 Thread Michal Simek
Hi Joe,

On 28.4.2016 06:52, Joe Hershberger wrote:
> On Wed, Apr 27, 2016 at 10:46 AM, Dan Murphy  wrote:
>> Joe
>>
>> On 04/26/2016 04:44 PM, Joe Hershberger wrote:
>>> On Mon, Apr 25, 2016 at 4:35 PM, Joe Hershberger
>>>  wrote:
 On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
> Not all devices use the same internal delay or fifo depth.
> Add the ability to set the internal delay for rx or tx and the
> fifo depth via the devicetree.  If the value is not set in the
> devicetree then set the delay to the default.
>
> If devicetree is not used then use the default defines within the
> driver.
>
> Signed-off-by: Dan Murphy 
 Acked-by: Joe Hershberger 
>>> This patch is not checkpatch.pl clean. Please resubmit.
>>>
>>>
>>> 610950.mbox:140: WARNING: line over 80 characters
>>> 610950.mbox:153: WARNING: line over 80 characters
>>> 610950.mbox:154: WARNING: line over 80 characters
>>> 610950.mbox:165: WARNING: line over 80 characters
>>> total: 0 errors, 4 warnings, 0 checks, 136 lines checked
>>
>> How do you want me to rebase these patches on the SGMII work from Michal on 
>> the ti.c
>> or off of master?  The patch I submitted was based off of the SGMII patchset.
> 
> I'm pulling in some of Michal's patches this release. Please reference
> which patches this depends on (patchwork links).

NOTE: A lot of my patches (maybe all of them) were already merged to
mainline via Xilinx tree.

Cheers,
Michal
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Re: [U-Boot] [PATCH v6 4/7] net: phy: ti: Allow the driver to be more configurable

2016-04-28 Thread Dan Murphy
Michal

On 04/28/2016 01:26 AM, Michal Simek wrote:
> Hi Joe,
>
> On 28.4.2016 06:52, Joe Hershberger wrote:
>> On Wed, Apr 27, 2016 at 10:46 AM, Dan Murphy  wrote:
>>> Joe
>>>
>>> On 04/26/2016 04:44 PM, Joe Hershberger wrote:
 On Mon, Apr 25, 2016 at 4:35 PM, Joe Hershberger
  wrote:
> On Fri, Apr 15, 2016 at 7:27 AM, Dan Murphy  wrote:
>> Not all devices use the same internal delay or fifo depth.
>> Add the ability to set the internal delay for rx or tx and the
>> fifo depth via the devicetree.  If the value is not set in the
>> devicetree then set the delay to the default.
>>
>> If devicetree is not used then use the default defines within the
>> driver.
>>
>> Signed-off-by: Dan Murphy 
> Acked-by: Joe Hershberger 
 This patch is not checkpatch.pl clean. Please resubmit.


 610950.mbox:140: WARNING: line over 80 characters
 610950.mbox:153: WARNING: line over 80 characters
 610950.mbox:154: WARNING: line over 80 characters
 610950.mbox:165: WARNING: line over 80 characters
 total: 0 errors, 4 warnings, 0 checks, 136 lines checked

Joe fixing these will break readability of the code.
I will document this in the next patch submission


>>> How do you want me to rebase these patches on the SGMII work from Michal on 
>>> the ti.c
>>> or off of master?  The patch I submitted was based off of the SGMII 
>>> patchset.
>> I'm pulling in some of Michal's patches this release. Please reference
>> which patches this depends on (patchwork links).
> NOTE: A lot of my patches (maybe all of them) were already merged to
> mainline via Xilinx tree.

OK latest pull has the SGMII patches on the ti.c.

> Cheers,
> Michal


-- 
--
Dan Murphy

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