Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
Signed-off-by: Nicolas Colombain nicolas.colomb...@armadeus.com
---
MAINTAINERS |5 +
board/armadeus/apf27/Makefile| 30 ++
board/armadeus/apf27/apf27.c | 251 +
board/armadeus/apf27/apf27.h | 489 ++
board/armadeus/apf27/lowlevel_init.S | 168
boards.cfg |1 +
include/configs/apf27.h | 374 ++
7 files changed, 1318 insertions(+), 0 deletions(-)
create mode 100644 board/armadeus/apf27/Makefile
create mode 100644 board/armadeus/apf27/apf27.c
create mode 100644 board/armadeus/apf27/apf27.h
create mode 100644 board/armadeus/apf27/lowlevel_init.S
create mode 100644 include/configs/apf27.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..abf8380 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -716,6 +716,11 @@ Ilko Iliev il...@ronetix.at
PM9263 AT91SAM9263
PM9G45 ARM926EJS (AT91SAM9G45 SoC)
+Eric Jarrige eric.jarr...@armadeus.org
+Philippe Reynes trem...@yahoo.fr
+
+ apf27 ARM926EJS (i.MX27 SoC)
+
Michael Jones michael.jo...@matrix-vision.de
omap3_mvblx ARM ARMV7 (OMAP3xx SoC)
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
new file mode 100644
index 000..ec0cb03
--- /dev/null
+++ b/board/armadeus/apf27/Makefile
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+# (C) Copyright 2012-2013
+# Eric Jarrige eric.jarr...@armadeus.org
+#
+# SPDX-License-Identifier:GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := apf27.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
new file mode 100644
index 000..c0d9c41
--- /dev/null
+++ b/board/armadeus/apf27/apf27.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (C) 2008-2013 Eric Jarrige eric.jarr...@armadeus.org
+ *
+ * based on the files by
+ * Sascha Hauer, Pengutronix
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include environment.h
+#include jffs2/jffs2.h
+#include nand.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/imx-regs.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/errno.h
+#include apf27.h
+#include crc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * customer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
+ */
+static u32 get_board_rev(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+
+ return readl(iim-bank[1].fuse_regs[8]);
+}
+
+/*
+ * Fuse bank 1 row 9 is reserved for future use and therefore available for
+ * customer use. The APF27 board revision 1 uses the bit 0 to permanently store
+ * the presence of the second RAM chip
+ * 0: AFP27 with 1 RAM of 64 MiB
+ * 1: AFP27 with 2 RAM chips of 64 MiB each (128MB)
+ */
+static int get_num_ram_bank(void)
+{
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ int nr_dram_banks = 1;
+
+ if ((get_board_rev() 0) (CONFIG_NR_DRAM_BANKS 1))
+ nr_dram_banks += readl(iim-bank[1].fuse_regs[9]) 0x01;
+ else
+ nr_dram_banks = CONFIG_NR_DRAM_POPULATED;
+
+ return nr_dram_banks;
+}
+
+static void apf27_port_init(int port, u32 gpio_dr, u32 ocr1, u32 ocr2,
+ u32 iconfa1, u32 iconfa2, u32 iconfb1, u32 iconfb2,
+ u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr,
+ u32 puen, u32 gius)
+{
+ struct gpio_port_regs *regs = (struct gpio_port_regs *)IMX_GPIO_BASE;
+
+ writel(gpio_dr, regs-port[port].gpio_dr);
+ writel(ocr1, regs-port[port].ocr1);
+ writel(ocr2, regs-port[port].ocr2);
+ writel(iconfa1, regs-port[port].iconfa1);
+ writel(iconfa2, regs-port[port].iconfa2);
+ writel(iconfb1, regs-port[port].iconfb1);
+ writel(iconfb2, regs-port[port].iconfb2);
+ writel(icr1, regs-port[port].icr1);
+ writel(icr2, regs-port[port].icr2);
+ writel(imr, regs-port[port].imr);
+
