Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Nov 28, 2019 at 11:17:58AM +0100, Marek Vasut wrote:

> The following changes since commit 9a0cbae22a613dfd55e15565785749b74c19fdf0:
> 
>   Merge tag 'u-boot-rockchip-20191124' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2019-11-23
> 20:50:11 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a1a9843a29672be49a5bbb3a07fea8dbc88369ba:
> 
>   ARM: socfpga: Unreset NAND in SPL on Gen5 (2019-11-25 13:12:56 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 9a0cbae22a613dfd55e15565785749b74c19fdf0:

  Merge tag 'u-boot-rockchip-20191124' of
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip (2019-11-23
20:50:11 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a1a9843a29672be49a5bbb3a07fea8dbc88369ba:

  ARM: socfpga: Unreset NAND in SPL on Gen5 (2019-11-25 13:12:56 +0100)


Marek Vasut (5):
  ARM: socfpga: Actually put bridges into reset on Gen5 in bridge
disable
  ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5
  ARM: socfpga: Add ArriaV ST/SX ID
  ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
  ARM: socfpga: Unreset NAND in SPL on Gen5

 Makefile  | 11 +++
 arch/arm/mach-socfpga/misc_gen5.c |  7 ++-
 arch/arm/mach-socfpga/spl_gen5.c  |  7 +++
 3 files changed, 24 insertions(+), 1 deletion(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Nov 22, 2019 at 01:41:09PM +0100, Marek Vasut wrote:

> The following changes since commit 8d8ee47e03ef23b0d0e842ea455a30bf0d2023b9:
> 
>   env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol (2019-11-20 12:24:50 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 0c14bb5ad3311de2c26e66e88f8a6886773b8e0a:
> 
>   arm: socfpga: stratix10: Add alias for gmac0 in S10 dts (2019-11-22
> 03:08:12 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 8d8ee47e03ef23b0d0e842ea455a30bf0d2023b9:

  env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol (2019-11-20 12:24:50 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 0c14bb5ad3311de2c26e66e88f8a6886773b8e0a:

  arm: socfpga: stratix10: Add alias for gmac0 in S10 dts (2019-11-22
03:08:12 +0100)


Ley Foon Tan (2):
  arm: dts: Stratix10: Fix memory node address and size cells
  configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF

Marek Vasut (1):
  ARM: socfpga: Fix default mtdparts

Ooi, Joyce (2):
  arm: dts: Stratix10: change pad skew values for EMAC0 PHY driver
  arm: socfpga: stratix10: Add alias for gmac0 in S10 dts

Simon Goldschmidt (4):
  ddr: socfpga: gen5: constify altera_gen5_sdram_ops
  socfpga: fix include guard in misc.h (arch vs. global)
  timer: dw-apb: add reset handling
  spi: cadence_qspi: support DM_CLK

 arch/arm/dts/socfpga_stratix10_socdk.dts  |  5 -
 arch/arm/mach-socfpga/include/mach/misc.h |  6 +++---
 configs/socfpga_arria5_defconfig  |  2 +-
 configs/socfpga_cyclone5_defconfig|  2 +-
 configs/socfpga_de0_nano_soc_defconfig|  2 +-
 configs/socfpga_is1_defconfig |  2 +-
 configs/socfpga_mcvevk_defconfig  |  2 +-
 configs/socfpga_sockit_defconfig  |  2 +-
 configs/socfpga_socrates_defconfig|  2 +-
 configs/socfpga_sr1500_defconfig  |  2 +-
 configs/socfpga_stratix10_defconfig   |  1 +
 drivers/ddr/altera/sdram_gen5.c   |  2 +-
 drivers/spi/cadence_qspi.c| 21 +++--
 drivers/spi/cadence_qspi.h|  1 +
 drivers/timer/dw-apb-timer.c  | 18 +-
 15 files changed, 54 insertions(+), 16 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 11/15/19 10:44 AM, Simon Goldschmidt wrote:
> On Fri, Nov 15, 2019 at 10:35 AM Marek Vasut wrote:
>>
>> The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:
>>
>>   Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
>> (2019-11-12 13:40:58 -0500)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:
>>
>>   spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)
>>
>> 
>> Ley Foon Tan (2):
>>   arm: dts: Stratix10: Fix memory node address and size cells
>>   configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF
>>
>> Simon Goldschmidt (4):
>>   ddr: socfpga: gen5: constify altera_gen5_sdram_ops
>>   socfpga: fix include guard in misc.h (arch vs. global)
>>   timer: dw-apb: add reset handling
>>   spi: cadence_qspi: support DM_CLK
> 
> Sorry to interfere here, but Vignesh had a comment on this one and I sent v3
> (what you have is v1 or v2- sorrry I wasn't aware of that).
> 
> Since Vignesh claims v3 does still not compile for k2g_evm_defconfig (although
> I cannot reproduce that error) , we should probably defer this patch
> until I have
> checked that Travis builds it correctly.

The one in u-boot-socfpga compiled fine, but OK, dropped.
Tom, ignore this PR.
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

On Fri, Nov 15, 2019 at 10:35 AM Marek Vasut  wrote:
>
> The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:
>
>   Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
> (2019-11-12 13:40:58 -0500)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-socfpga.git master
>
> for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:
>
>   spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)
>
> 
> Ley Foon Tan (2):
>   arm: dts: Stratix10: Fix memory node address and size cells
>   configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF
>
> Simon Goldschmidt (4):
>   ddr: socfpga: gen5: constify altera_gen5_sdram_ops
>   socfpga: fix include guard in misc.h (arch vs. global)
>   timer: dw-apb: add reset handling
>   spi: cadence_qspi: support DM_CLK

Sorry to interfere here, but Vignesh had a comment on this one and I sent v3
(what you have is v1 or v2- sorrry I wasn't aware of that).

Since Vignesh claims v3 does still not compile for k2g_evm_defconfig (although
I cannot reproduce that error) , we should probably defer this patch
until I have
checked that Travis builds it correctly.

Regards,
Simon

>
>  arch/arm/dts/socfpga_stratix10_socdk.dts  |  2 ++
>  arch/arm/mach-socfpga/include/mach/misc.h |  6 +++---
>  configs/socfpga_stratix10_defconfig   |  1 +
>  drivers/ddr/altera/sdram_gen5.c   |  2 +-
>  drivers/spi/cadence_qspi.c| 22 --
>  drivers/timer/dw-apb-timer.c  | 18 +-
>  6 files changed, 44 insertions(+), 7 deletions(-)
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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 3ff1ff3ff76c15efe0451309af084ee6c096c583:

  Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'
(2019-11-12 13:40:58 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 155bf0a09b9b9538f3ef8dc244094e1a45e9e281:

  spi: cadence_qspi: support DM_CLK (2019-11-13 15:47:08 +0100)


Ley Foon Tan (2):
  arm: dts: Stratix10: Fix memory node address and size cells
  configs: Stratix10: Disable CONFIG_SPL_USE_TINY_PRINTF

Simon Goldschmidt (4):
  ddr: socfpga: gen5: constify altera_gen5_sdram_ops
  socfpga: fix include guard in misc.h (arch vs. global)
  timer: dw-apb: add reset handling
  spi: cadence_qspi: support DM_CLK

 arch/arm/dts/socfpga_stratix10_socdk.dts  |  2 ++
 arch/arm/mach-socfpga/include/mach/misc.h |  6 +++---
 configs/socfpga_stratix10_defconfig   |  1 +
 drivers/ddr/altera/sdram_gen5.c   |  2 +-
 drivers/spi/cadence_qspi.c| 22 --
 drivers/timer/dw-apb-timer.c  | 18 +-
 6 files changed, 44 insertions(+), 7 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Tue, Oct 15, 2019 at 01:45:09AM +0200, Marek Vasut wrote:

> The following changes since commit 548aefa5b9e5c31681e0a8bd78e96b66eedd1137:
> 
>   travis: Move keystone 3 (k3) boards into the k2 job (2019-10-09
> 11:44:59 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to e6281b8ab07e0d64be3f5f829d5a3d3a08390daa:
> 
>   ARM: socfpga: vining_fpga: Extract eth1 MAC from EEPROM (2019-10-09
> 22:57:41 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 548aefa5b9e5c31681e0a8bd78e96b66eedd1137:

  travis: Move keystone 3 (k3) boards into the k2 job (2019-10-09
11:44:59 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to e6281b8ab07e0d64be3f5f829d5a3d3a08390daa:

  ARM: socfpga: vining_fpga: Extract eth1 MAC from EEPROM (2019-10-09
22:57:41 +0200)


Marek Vasut (5):
  ARM: socfpga: vining_fpga: Rename VINING|FPGA
  ARM: socfpga: vining_fpga: Update DT
  ARM: socfpga: vining_fpga: Update generated headers
  ARM: socfpga: vining_fpga: Update environment
  ARM: socfpga: vining_fpga: Extract eth1 MAC from EEPROM

 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi |   2 +-
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts |  17 ++---
 arch/arm/mach-socfpga/Kconfig |  10 +++---
 board/{samtec => softing}/vining_fpga/MAINTAINERS |   0
 board/{samtec => softing}/vining_fpga/Makefile|   0
 board/{samtec => softing}/vining_fpga/qts/iocsr_config.h  | 140
+--
 board/{samtec => softing}/vining_fpga/qts/pinmux_config.h |   6 ++--
 board/{samtec => softing}/vining_fpga/qts/pll_config.h|  12 ++-
 board/{samtec => softing}/vining_fpga/qts/sdram_config.h  |  12 +++
 board/{samtec => softing}/vining_fpga/socfpga.c   |   2 ++
 configs/socfpga_vining_fpga_defconfig |   8 ++---
 include/configs/socfpga_vining_fpga.h | 118
+++
 12 files changed, 195 insertions(+), 132 deletions(-)
 rename board/{samtec => softing}/vining_fpga/MAINTAINERS (100%)
 rename board/{samtec => softing}/vining_fpga/Makefile (100%)
 rename board/{samtec => softing}/vining_fpga/qts/iocsr_config.h (89%)
 rename board/{samtec => softing}/vining_fpga/qts/pinmux_config.h (98%)
 rename board/{samtec => softing}/vining_fpga/qts/pll_config.h (88%)
 rename board/{samtec => softing}/vining_fpga/qts/sdram_config.h (96%)
 rename board/{samtec => softing}/vining_fpga/socfpga.c (95%)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sat, Aug 17, 2019 at 02:19:58PM +0200, Marek Vasut wrote:

> The following changes since commit df33f8646855e65b8e7232c7fd5739e1ae1eb58b:
> 
>   configs: Resync with savedefconfig (2019-08-14 08:11:27 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a89441a74f6df1f75b942f6906724620fad2e8e1:
> 
>   arm: socfpga: gen5: don't zero bss in board_init_f() (2019-08-15
> 08:50:02 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit df33f8646855e65b8e7232c7fd5739e1ae1eb58b:

  configs: Resync with savedefconfig (2019-08-14 08:11:27 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a89441a74f6df1f75b942f6906724620fad2e8e1:

  arm: socfpga: gen5: don't zero bss in board_init_f() (2019-08-15
08:50:02 +0200)


Dalon Westergreen (1):
  ARM: socfpga: update CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img

Ley Foon Tan (1):
  arm: socfpga: Fix SYSRESET_SOCFPGA_S10 config name

Simon Goldschmidt (1):
  arm: socfpga: gen5: don't zero bss in board_init_f()

 arch/arm/Kconfig | 2 +-
 arch/arm/mach-socfpga/spl_gen5.c | 2 --
 include/configs/socfpga_common.h | 2 +-
 3 files changed, 2 insertions(+), 4 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Mon, Jul 29, 2019 at 02:34:43PM +0200, Marek Vasut wrote:

> The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2:
> 
>   Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a89c2adc3d2834a7c79c1685155a8b8952cf77f4:
> 
>   fpga: arria10: Fix error in fpga pin configuration (2019-07-21
> 12:47:13 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 0de815356474912ef5bef9a69f0327a5a93bb2c2:

  Merge branch '2019-07-17-master-imports' (2019-07-18 11:31:37 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a89c2adc3d2834a7c79c1685155a8b8952cf77f4:

  fpga: arria10: Fix error in fpga pin configuration (2019-07-21
12:47:13 +0200)


Dalon Westergreen (1):
  fpga: arria10: Fix error in fpga pin configuration

Simon Goldschmidt (7):
  arm: socfpga: fix 3 boards missing env var
"socfpga_legacy_reset_compat"
  dm: ddr: socfpga: fix gen5 ddr driver to not use bss
  arm: socfpga: rst: add register definition for cold reset
  sysreset: socfpga: gen5: add sysreset driver
  sysreset: socfpga: stratix10: add sysreset driver
  sysreset: add support for socfpga sysreset
  spl: kconfig: separate sysreset and firmware drivers from misc

 MAINTAINERS|1 +
 arch/arm/Kconfig   |4 +
 arch/arm/mach-socfpga/Makefile |1 -
 arch/arm/mach-socfpga/include/mach/reset_manager.h |1 +
 arch/arm/mach-socfpga/reset_manager.c  |   41 -
 configs/evb-rk3036_defconfig   |1 +
 configs/kylin-rk3036_defconfig |1 +
 configs/sandbox_spl_defconfig  |1 +
 drivers/Makefile   |6 +-
 drivers/ddr/altera/sequencer.c | 1346
+++
 drivers/ddr/altera/sequencer.h |   36 +++-
 drivers/firmware/Kconfig   |7 +-
 drivers/fpga/socfpga_arria10.c |9 +-
 drivers/reset/reset-socfpga.c  |   19 ++
 drivers/sysreset/Kconfig   |   15 ++
 drivers/sysreset/Makefile  |2 +
 drivers/sysreset/sysreset_socfpga.c|   56 ++
 drivers/sysreset/sysreset_socfpga_s10.c|   29 +++
 include/configs/socfpga_dbm_soc1.h |3 +-
 include/configs/socfpga_stratix10_socdk.h  |3 +-
 include/configs/socfpga_vining_fpga.h  |1 +
 21 files changed, 889 insertions(+), 694 deletions(-)
 delete mode 100644 arch/arm/mach-socfpga/reset_manager.c
 create mode 100644 drivers/sysreset/sysreset_socfpga.c
 create mode 100644 drivers/sysreset/sysreset_socfpga_s10.c
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Jun 14, 2019 at 12:45:12PM +0200, Marek Vasut wrote:

> SPL size check for Gen5, i2c enablement for S10
> 
> The following changes since commit c2ea87883ef309570c8903e6de4b8b78685d73d0:
> 
>   Merge tag 'efi-2019-07-rc5' of git://git.denx.de/u-boot-efi
> (2019-06-12 07:15:38 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to d6d383ca27c8121f19cb5fe1b047de330833ce6f:
> 
>   arm: socfpga: provide default SPL_SIZE_LIMIT for gen5 (2019-06-14
> 12:41:26 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

SPL size check for Gen5, i2c enablement for S10

The following changes since commit c2ea87883ef309570c8903e6de4b8b78685d73d0:

  Merge tag 'efi-2019-07-rc5' of git://git.denx.de/u-boot-efi
(2019-06-12 07:15:38 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to d6d383ca27c8121f19cb5fe1b047de330833ce6f:

  arm: socfpga: provide default SPL_SIZE_LIMIT for gen5 (2019-06-14
12:41:26 +0200)


Ley Foon Tan (1):
  arm: dts: Stratix10: Enable i2c

Simon Goldschmidt (1):
  arm: socfpga: provide default SPL_SIZE_LIMIT for gen5

 arch/arm/dts/socfpga_stratix10_socdk.dts | 5 +
 arch/arm/mach-socfpga/Kconfig| 8 
 2 files changed, 13 insertions(+)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Mon, May 27, 2019 at 01:11:36AM +0200, Marek Vasut wrote:

> SoCFPGA PL310 cleanup + A10 fix, A10 DT cleanup, DW GPIO fix.
> 
> The following changes since commit 40920bdecc4e1b7096de6f546d7b5c2185554ba6:
> 
>   Merge tag 'dm-pull-22may19' of git://git.denx.de/u-boot-dm (2019-05-22
> 12:58:58 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to ca9387e8b1e276e17244010620319cc8bbd1c655:
> 
>   Arm: dts: socfpga: Remove invalid property from chose node (2019-05-24
> 14:29:51 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

SoCFPGA PL310 cleanup + A10 fix, A10 DT cleanup, DW GPIO fix.

The following changes since commit 40920bdecc4e1b7096de6f546d7b5c2185554ba6:

  Merge tag 'dm-pull-22may19' of git://git.denx.de/u-boot-dm (2019-05-22
12:58:58 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to ca9387e8b1e276e17244010620319cc8bbd1c655:

  Arm: dts: socfpga: Remove invalid property from chose node (2019-05-24
14:29:51 +0200)


Marek Vasut (2):
  ARM: socfpga: Pull PL310 clearing into common code
  ARM: socfpga: Clear PL310 early in SPL

Simon Goldschmidt (1):
  gpio: dwapb_gpio: fix broken dev->node

Tien Fong Chee (1):
  Arm: dts: socfpga: Remove invalid property from chose node

 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi |  4 
 arch/arm/mach-socfpga/include/mach/misc.h |  1 +
 arch/arm/mach-socfpga/misc.c  | 54
++
 arch/arm/mach-socfpga/spl_a10.c   |  1 +
 arch/arm/mach-socfpga/spl_gen5.c  | 57
-
 drivers/gpio/dwapb_gpio.c |  5 ++---
 6 files changed, 58 insertions(+), 64 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, May 16, 2019 at 12:53:07AM +0200, Marek Vasut wrote:

> SoCFPGA DT and reset cleanup, AE MCVEVK board support.
> 
> The following changes since commit 90176e3be63802bc8630bab651d169993f0f0763:
> 
>   Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efi
> (2019-05-13 07:13:28 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 9e6ed1a3466ea35d98e074187abcbcfee550b448:
> 
>   ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT (2019-05-14
> 19:53:16 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

SoCFPGA DT and reset cleanup, AE MCVEVK board support.

The following changes since commit 90176e3be63802bc8630bab651d169993f0f0763:

  Merge tag 'efi-2019-07-rc3' of git://git.denx.de/u-boot-efi
(2019-05-13 07:13:28 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 9e6ed1a3466ea35d98e074187abcbcfee550b448:

  ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT (2019-05-14
19:53:16 +0200)


Marek Vasut (2):
  ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files
  ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT

Simon Goldschmidt (2):
  arm: socfpga: remove re-added ad-hoc reset code
  arm: sofcpga: s10: remove unused ad-hoc reset code

Wolfgang Grandegger (1):
  arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board

 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi|  91
++
 arch/arm/dts/socfpga_arria10_socdk.dtsi |   3 +-
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts|   2 +
 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi   |  17 
 arch/arm/dts/socfpga_cyclone5_mcv.dtsi  |  22 +
 arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi|  34 +++
 arch/arm/dts/socfpga_cyclone5_mcvevk.dts|  81

 arch/arm/mach-socfpga/Kconfig   |   7 ++
 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h |   1 -
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h  |   1 -
 arch/arm/mach-socfpga/reset_manager_gen5.c  |   8 --
 arch/arm/mach-socfpga/reset_manager_s10.c   |  11 ---
 arch/arm/mach-socfpga/spl_gen5.c|   3 +-
 board/aries/mcvevk/MAINTAINERS  |   9 ++
 board/aries/mcvevk/Makefile |   7 ++
 board/aries/mcvevk/qts/iocsr_config.h   | 659
+++
 board/aries/mcvevk/qts/pinmux_config.h  | 218

 board/aries/mcvevk/qts/pll_config.h |  84
+
 board/aries/mcvevk/qts/sdram_config.h   | 343

 board/aries/mcvevk/socfpga.c|   5 +
 configs/socfpga_mcvevk_defconfig|  59 
 include/configs/socfpga_mcvevk.h| 103
+
 23 files changed, 1728 insertions(+), 41 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_arria10_handoff_u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_mcv.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_mcvevk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_mcvevk.dts
 create mode 100644 board/aries/mcvevk/MAINTAINERS
 create mode 100644 board/aries/mcvevk/Makefile
 create mode 100644 board/aries/mcvevk/qts/iocsr_config.h
 create mode 100644 board/aries/mcvevk/qts/pinmux_config.h
 create mode 100644 board/aries/mcvevk/qts/pll_config.h
 create mode 100644 board/aries/mcvevk/qts/sdram_config.h
 create mode 100644 board/aries/mcvevk/socfpga.c
 create mode 100644 configs/socfpga_mcvevk_defconfig
 create mode 100644 include/configs/socfpga_mcvevk.h
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sun, May 12, 2019 at 01:56:20AM +0200, Marek Vasut wrote:

> A10 FPGA programming support, Gen5 livetree conversion
> 
> The following changes since commit 82da478b8f8ed41ed8bdbd0269da36ef6aaef7e8:
> 
>   Merge branch '2019-05-10-master-imports' (2019-05-10 11:08:48 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 1b898ffc040b5977a07af755b8ba3aa151914800:
> 
>   gpio: dwapb_gpio: convert to livetree (2019-05-10 22:48:11 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

A10 FPGA programming support, Gen5 livetree conversion

The following changes since commit 82da478b8f8ed41ed8bdbd0269da36ef6aaef7e8:

  Merge branch '2019-05-10-master-imports' (2019-05-10 11:08:48 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 1b898ffc040b5977a07af755b8ba3aa151914800:

  gpio: dwapb_gpio: convert to livetree (2019-05-10 22:48:11 +0200)


Ley Foon Tan (1):
  configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORS

Simon Goldschmidt (6):
  timer: dw-apb: remove unused DECLARE_GLOBAL_DATA_PTR
  spi: cadence_qspi: convert to livetree
  spi: designware: convert to livetree
  serial: altera_uart: convert to livetree
  reset: socfpga: convert to livetree
  gpio: dwapb_gpio: convert to livetree

Tien Fong Chee (9):
  ARM: socfpga: Description on FPGA bitstream type and file name for
Arria 10
  ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
  ARM: socfpga: Cleaning up and ensuring consistent format messages
in driver
  ARM: socfpga: Moving the watchdog reset to the for-loop status polling
  ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
  ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
  spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
  ARM: socfpga: Synchronize the configuration for A10 SoCDK
  ARM: socfpga: Increase Malloc pool size to support FAT filesystem
in SPL

 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts  |  17 +
 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h |  40
+-
 arch/arm/mach-socfpga/spl_a10.c   |  31
+++-
 board/altera/arria10-socdk/fit_spl_fpga.its   |  38
++
 configs/socfpga_arria10_defconfig |  23 +-
 configs/socfpga_stratix10_defconfig   |   1 -
 doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt |  26 ++-
 drivers/fpga/socfpga_arria10.c| 514
+++--
 drivers/gpio/dwapb_gpio.c |  25 +++
 drivers/reset/reset-socfpga.c |   4 +-
 drivers/serial/altera_uart.c  |   5 +-
 drivers/spi/cadence_qspi.c|  39
+-
 drivers/spi/designware_spi.c  |   8 +-
 drivers/timer/dw-apb-timer.c  |   2 -
 include/configs/socfpga_arria10_socdk.h   |   5 +-
 include/image.h   |   4 +
 16 files changed, 702 insertions(+), 80 deletions(-)
 create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Tue, May 07, 2019 at 05:43:29AM +0200, Marek Vasut wrote:

> The following changes since commit 86f578ee85a697afb980233312f9aac1d98816df:
> 
>   Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips
> (2019-05-04 20:02:42 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 32e308dd796f34f85d1c088e3218fa3403a9080f:
> 
>   ARM: socfpga: stratix10: Probe FPGA status before bridge enable
> (2019-05-06 12:44:45 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 86f578ee85a697afb980233312f9aac1d98816df:

  Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips
(2019-05-04 20:02:42 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 32e308dd796f34f85d1c088e3218fa3403a9080f:

  ARM: socfpga: stratix10: Probe FPGA status before bridge enable
(2019-05-06 12:44:45 +0200)


Ang, Chee Hong (2):
  ARM: socfpga: stratix10: Disable FPGA2SOC reset
  ARM: socfpga: stratix10: Probe FPGA status before bridge enable

Ley Foon Tan (3):
  ddr: altera: Compile ALTERA SDRAM in SPL only
  arm: dts: Stratix10: Add SDRAM node
  arm: socfpga: Move Stratix 10 SDRAM driver to DM

 Makefile
|   2 +-
 arch/arm/dts/socfpga_stratix10.dtsi
|   9 +
 arch/arm/mach-socfpga/Kconfig
|   4 +-
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
|   2 +
 arch/arm/mach-socfpga/misc_s10.c
|  12 ++
 arch/arm/mach-socfpga/reset_manager_s10.c
|   7 ++--
 arch/arm/mach-socfpga/spl_s10.c
|  16 +---
 configs/socfpga_stratix10_defconfig
|   1 +
 drivers/Makefile
|   2 +-
 drivers/ddr/altera/Kconfig
|  11 +++---
 drivers/ddr/altera/Makefile
|   2 +-
 drivers/ddr/altera/sdram_s10.c
| 243

 {arch/arm/mach-socfpga/include/mach => drivers/ddr/altera}/sdram_s10.h
|   4 --
 include/configs/socfpga_stratix10_socdk.h
|   5 ---
 14 files changed, 218 insertions(+), 102 deletions(-)
 rename {arch/arm/mach-socfpga/include/mach =>
drivers/ddr/altera}/sdram_s10.h (97%)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, May 03, 2019 at 05:10:53PM +0200, Marek Vasut wrote:

> The following changes since commit 6aebc0d11a10f48a54146c5e71bbef15a1a458fc:
> 
>   Revert "fs: btrfs: fix false negatives in ROOT_ITEM search"
> (2019-04-27 11:35:44 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 7110259f550ce2c300f6f2c1760576c180705f4e:
> 
>   dts: arm: socfpga: fix socfpga_de10_nano console (2019-04-29 20:33:23
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 6aebc0d11a10f48a54146c5e71bbef15a1a458fc:

  Revert "fs: btrfs: fix false negatives in ROOT_ITEM search"
(2019-04-27 11:35:44 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 7110259f550ce2c300f6f2c1760576c180705f4e:

  dts: arm: socfpga: fix socfpga_de10_nano console (2019-04-29 20:33:23
+0200)


Marek Vasut (8):
  ARM: socfpga: Factor out handoff register configuration
  ARM: socfpga: Disable bridges in SPL unless booting from FPGA
  ARM: socfpga: Fully unmap the FPGA bridges from L3 space
  ARM: socfpga: Add support for selecting bridges in bridge command
  mmc: dw_mmc: Calculate timeout from transfer length
  mmc: dw_mmc: Handle return value from bounce_buffer_start()
  mmc: dw_mmc: Round up descriptor end to nearest multiple of
cacheline size
  ARM: socfpga: Remove socfpga_sdram_apply_static_cfg()

Simon Goldschmidt (1):
  dts: arm: socfpga: fix socfpga_de10_nano console

 arch/arm/dts/socfpga_cyclone5_de10_nano.dts |  1 +
 arch/arm/mach-socfpga/include/mach/misc.h   |  2 +-
 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h |  1 +
 arch/arm/mach-socfpga/misc.c| 17
+++--
 arch/arm/mach-socfpga/misc_arria10.c|  2 +-
 arch/arm/mach-socfpga/misc_gen5.c   | 41
++---
 arch/arm/mach-socfpga/misc_s10.c|  2 +-
 arch/arm/mach-socfpga/reset_manager_gen5.c  | 28
+---
 arch/arm/mach-socfpga/spl_gen5.c|  8 +++-
 drivers/mmc/dw_mmc.c| 38
+++---
 10 files changed, 85 insertions(+), 55 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Apr 26, 2019 at 11:31:09AM +0200, Marek Vasut wrote:

> The following changes since commit 3fbd2dce351ab5d40d3244f26bd713caa4f826e2:
> 
>   Merge branch '2019-04-22-master-imports' (2019-04-24 09:04:23 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to bf068c7643f23c3f0936e3d1d292cc537acaf3bb:
> 
>   arm: socfpga: mailbox: Fix off-by-one error on command length checking
> (2019-04-25 00:00:49 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 3fbd2dce351ab5d40d3244f26bd713caa4f826e2:

  Merge branch '2019-04-22-master-imports' (2019-04-24 09:04:23 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to bf068c7643f23c3f0936e3d1d292cc537acaf3bb:

  arm: socfpga: mailbox: Fix off-by-one error on command length checking
(2019-04-25 00:00:49 +0200)


Ley Foon Tan (1):
  arm: socfpga: mailbox: Fix off-by-one error on command length checking

Simon Goldschmidt (15):
  socfpga: add Simon Goldschmidt as co-custodian
  eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUS
  Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used
without DM_I2C_COMPAT"
  i2c: designware: fix reset handling on socfpga gen5
  rtc: m41t62: add compatible for m41t82
  arm: socfpga: socrates: make rtc work
  configs: socfpga: socrates: enable rtc support
  arm: socfpga: fix comment about SPL memory layout
  arm: socfpga: put initial U-Boot stack into DDR
  arm: socfpga: imply/default common config options
  arm: socfpga: gen5: reduce SPL pre-reloc malloc
  arm: socfpga: move vining_fpga to DM_I2C
  arm: socfpga: clean up socfpga_common.h
  arm: socfpga: remove CONFIG_SYS_BOOTMAPSZ
  arm: socfpga: clean up board config files

 MAINTAINERS  |   1 +
 arch/arm/Kconfig |   2 ++
 arch/arm/mach-socfpga/Kconfig|  23 +++
 arch/arm/mach-socfpga/mailbox_s10.c  |   4 ++--
 board/ebv/socrates/qts/iocsr_config.h|   2 +-
 board/samtec/vining_fpga/socfpga.c   |   9 +
 cmd/Kconfig  |   1 -
 cmd/eeprom.c |  23 +++
 configs/socfpga_arria10_defconfig|   6 --
 configs/socfpga_arria5_defconfig |  10 --
 configs/socfpga_cyclone5_defconfig   |  10 --
 configs/socfpga_dbm_soc1_defconfig   |  10 --
 configs/socfpga_de0_nano_soc_defconfig   |  10 --
 configs/socfpga_de10_nano_defconfig  |  10 --
 configs/socfpga_de1_soc_defconfig|  10 --
 configs/socfpga_is1_defconfig|   8 
 configs/socfpga_sockit_defconfig |  10 --
 configs/socfpga_socrates_defconfig   |  12 ++--
 configs/socfpga_sr1500_defconfig |  10 --
 configs/socfpga_stratix10_defconfig  |   2 --
 configs/socfpga_vining_fpga_defconfig|  18 +++---
 doc/git-mailrc   |   3 ++-
 drivers/i2c/designware_i2c.c |  20 ++--
 drivers/rtc/m41t62.c |  11 +++
 include/configs/socfpga_arria10_socdk.h  |   6 --
 include/configs/socfpga_arria5_socdk.h   |   2 --
 include/configs/socfpga_common.h | 116
+++-
 include/configs/socfpga_cyclone5_socdk.h |   2 --
 include/configs/socfpga_de0_nano_soc.h   |   2 --
 include/configs/socfpga_de10_nano.h  |   2 --
 include/configs/socfpga_de1_soc.h|   2 --
 include/configs/socfpga_is1.h|   2 --
 include/configs/socfpga_sockit.h |   2 --
 include/configs/socfpga_socrates.h   |   2 --
 include/configs/socfpga_sr1500.h |  11 ---
 include/configs/socfpga_vining_fpga.h|  18 --
 36 files changed, 104 insertions(+), 288 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sun, Apr 21, 2019 at 09:38:17PM +0200, Marek Vasut wrote:

> The following changes since commit 75ce8c938d39bd22460be66e6bf318bd2410c17b:
> 
>   Merge tag 'u-boot-imx-20190415' of git://git.denx.de/u-boot-imx
> (2019-04-15 07:31:14 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to e09c1a133155724d3369e150f3ab7b63c875101c:
> 
>   timer: dw-apb: Add missing 64bit up-conversion (2019-04-17 22:20:18 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 75ce8c938d39bd22460be66e6bf318bd2410c17b:

  Merge tag 'u-boot-imx-20190415' of git://git.denx.de/u-boot-imx
(2019-04-15 07:31:14 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to e09c1a133155724d3369e150f3ab7b63c875101c:

  timer: dw-apb: Add missing 64bit up-conversion (2019-04-17 22:20:18 +0200)


Ley Foon Tan (7):
  ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
  ddr: altera: Stratix10: Add multi-banks DRAM size check
  configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
  arm: dts: Stratix10: Modify stratix10 socdk memory node
  arm: socfpga: stratix10: Add cpu_has_been_warmreset()
  ddr: altera: Stratix10: Add ECC memory scrubbing
  arm: dts: Stratix10: Add QSPI node

Marek Vasut (1):
  timer: dw-apb: Add missing 64bit up-conversion

Simon Goldschmidt (9):
  arm: socfpga: gen5: sync devicetrees to Linux
  arm: socfpga: gen5: add reset & sdr node to SPL devicetrees
  reset: socfpga: rename membase ptr to modrst_base
  arm: socfpga: gen5: deassert peripheral reset by default
  reset: socfpga: add reset handling for old kernels
  arm: socfpga: move gen5 SDR driver to DM
  mtd: rawnand: denali: add reset handling
  spi: cadence_qspi: add reset handling
  arm: socfpga: implement proper peripheral reset

 arch/arm/dts/socfpga-common-u-boot.dtsi|  19
++
 arch/arm/dts/socfpga.dtsi  |  23
++
 arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi  |   6 ++
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts |   5 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi |   6 ++
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts|   5 +
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts  |   5 +
 arch/arm/dts/socfpga_cyclone5_is1.dts  |   5 +
 arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi|   6 ++
 arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi   |   6 ++
 arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi |   6 ++
 arch/arm/dts/socfpga_cyclone5_socrates.dts |   2 --
 arch/arm/dts/socfpga_cyclone5_sr1500.dts   |   5 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi  |   6 ++
 arch/arm/dts/socfpga_stratix10.dtsi|  13 
 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi   |  25
+++
 arch/arm/dts/socfpga_stratix10_socdk.dts   |  39
+++-
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h |   3 +++
 arch/arm/mach-socfpga/include/mach/sdram_gen5.h|   4 
 arch/arm/mach-socfpga/include/mach/sdram_s10.h |   9 +
 arch/arm/mach-socfpga/misc_gen5.c  |  10 --
 arch/arm/mach-socfpga/reset_manager_s10.c  |   9 +
 arch/arm/mach-socfpga/spl_gen5.c   |  38
++-
 arch/arm/mach-socfpga/spl_s10.c|  11 ---
 configs/socfpga_stratix10_defconfig|   2 +-
 drivers/ddr/altera/Kconfig |   2 ++
 drivers/ddr/altera/sdram_gen5.c| 143
++--
 drivers/ddr/altera/sdram_s10.c | 136
+++--
 drivers/ddr/altera/sequencer.c |   9 -
 drivers/ddr/altera/sequencer.h |  35
+
 drivers/mtd/nand/raw/denali.h  |   2 ++
 drivers/mtd/nand/raw/denali_dt.c   |  15 ++
 drivers/reset/reset-socfpga.c  |  55
++-
 drivers/spi/cadence_qspi.c |  17

 drivers/spi/cadence_qspi.h |   4 
 drivers/timer/dw-apb-timer.c   |   2 +-
 include/configs/socfpga_common.h   |   1 +
 37 files changed, 560 insertions(+), 129 deletions(-)
 create mode 100644 arch/arm/dts/socfpga-common-u-boot.dtsi
 mode change 100644 => 100755 arch/arm/dts/socfpga_stratix10.dtsi
 create mode 100755 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
 mode change 100644 => 100755 arch/arm/dts/socfpga_stratix10_socdk.dts
___
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 4/19/19 10:47 PM, Simon Goldschmidt wrote:
> 
> 
> Marek Vasut mailto:ma...@denx.de>> schrieb am Di., 16.
> Apr. 2019, 23:14:
> 
> On 4/16/19 10:08 PM, Simon Goldschmidt wrote:
> > Hi Marek,
> >
> > Am 12.04.2019 um 12:31 schrieb Marek Vasut:
> >> On 4/11/19 10:07 PM, Simon Goldschmidt wrote:
> >>>
> >>>
> >>> Marek Vasut mailto:ma...@denx.de>
> >> schrieb am Do., 11.
> >>> Apr. 2019, 21:59:
> >>>
> >>>  On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
> >>>  >
> >>>  >
> >>>  > On 11.04.19 21:03, Tom Rini wrote:
> >>>  >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt
> >>> wrote:
> >>>  >>>
> >>>  >>>
> >>>  >>> On 11.04.19 20:20, Tom Rini wrote:
> >>>   On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut
> wrote:
> >>>  > On 4/11/19 8:17 PM, Tom Rini wrote:
> >>>  >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek
> Vasut wrote:
> >>>  >>
> >>>  >>> The following changes since commit
> >>>  >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
> >>>  >>>
> >>>  >>>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> >>>  >>>
> >>>  >>> are available in the Git repository at:
> >>>  >>>
> >>>  >>>    git://git.denx.de/u-boot-socfpga.git
> 
> >>>   master
> >>>  >>>
> >>>  >>> for you to fetch changes up to
> >>>  >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
> >>>  >>>
> >>>  >>>    arm: dts: Stratix10: Add QSPI node (2019-04-09
> 13:11:06
> >>>  +0200)
> >>>  >>>
> >>>  >>
> >>>  >> Arg, sorry I didn't see this sooner:
> >>>  >>     arm:  w+   socfpga_arria10
> >>>  >> +(socfpga_arria10)
> >>>  >> +(socfpga_arria10) WARNING: unmet direct dependencies
> >>>  detected for
> >>>  >> ALTERA_SDRAM
> >>>  >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
> >>>  >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10
> [=y])
> >>>  >> +(socfpga_arria10)   Selected by [y]:
> >>>  >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y]
> && ARM
> >>> [=y] &&
> >>>  >> ARCH_SOCFPGA [=y]
> >>>  >
> >>>  > Is this coming from this PR or not ?
> >>>  
> >>>   Yes, this PR.  Top of tree + this PR only.
> >>>  >>>
> >>>  >>> It's not only top of tree + this PR, it also fails for pure
> >>>  >>> u-boot-socfpga/master.
> >>>  >>>
> >>>  >>> Seems like this bug has been introduced when I made the
> gen5
> >>> driver
> >>>  >>> depend
> >>>  >>> on RAM. Unfortunately, all the drivers use one Kconfig item
> >>>  (although
> >>>  >>> these
> >>>  >>> are totally different drivers) but now only gen5 depends on
> >>> RAM. Is
> >>>  >>> there
> >>>  >>> any Kconfig magic to fix this without duplicating the
> config
> >>> item
> >>>  >>> entries?
> >>>  >>
> >>>  >> I think you may want something more like:
> >>>  >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >>>  >> index 04a207c9403e..4a23e327dfb4 100644
> >>>  >> --- a/arch/arm/Kconfig
> >>>  >> +++ b/arch/arm/Kconfig
> >>>  >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
> >>>  >>   select DM_SERIAL
> >>>  >>   select ENABLE_ARM_SOC_BOOT0_HOOK if
> TARGET_SOCFPGA_GEN5 ||
> >>>  >> TARGET_SOCFPGA_ARRIA10
> >>>  >>   select OF_CONTROL
> >>>  >> -    select RAM if TARGET_SOCFPGA_GEN5
> >>>  >>   select SPL_DM_RESET if DM_RESET
> >>>  >>   select SPL_DM_SERIAL
> >>>  >>   select SPL_LIBCOMMON_SUPPORT
> >>>  >>   select SPL_LIBGENERIC_SUPPORT
> >>>  >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >>>  >>   select SPL_OF_CONTROL
> >>>  >> -    select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>>  >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
> >>>  >>   select SPL_SERIAL_SUPPORT
> >>>  >>   select SPL_WATCHDOG_SUPPORT
> >>>  >> diff --git a/drivers/ddr/altera/Kconfig
> >>> b/drivers/ddr/altera/Kconfig
> >>>  >> index 7370d4133a67..8f60b56eb848 100644
> >>>  >> --- a/drivers/ddr/altera/Kconfig
> >>>  >> +++ b/drivers/ddr/altera/Kconfig
> >>>  >> @@ -1,6 +1,7 @@
> >>>  >>   config ALTERA_SDRAM
> >>>  >>   bool "SoCFPGA DDR SDRAM driver"
> >>>  >> -    depends on RAM
> >>>  

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

Marek Vasut  schrieb am Di., 16. Apr. 2019, 23:14:

> On 4/16/19 10:08 PM, Simon Goldschmidt wrote:
> > Hi Marek,
> >
> > Am 12.04.2019 um 12:31 schrieb Marek Vasut:
> >> On 4/11/19 10:07 PM, Simon Goldschmidt wrote:
> >>>
> >>>
> >>> Marek Vasut mailto:ma...@denx.de>> schrieb am Do., 11.
> >>> Apr. 2019, 21:59:
> >>>
> >>>  On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
> >>>  >
> >>>  >
> >>>  > On 11.04.19 21:03, Tom Rini wrote:
> >>>  >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt
> >>> wrote:
> >>>  >>>
> >>>  >>>
> >>>  >>> On 11.04.19 20:20, Tom Rini wrote:
> >>>   On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> >>>  > On 4/11/19 8:17 PM, Tom Rini wrote:
> >>>  >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut
> wrote:
> >>>  >>
> >>>  >>> The following changes since commit
> >>>  >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
> >>>  >>>
> >>>  >>>Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> >>>  >>>
> >>>  >>> are available in the Git repository at:
> >>>  >>>
> >>>  >>>git://git.denx.de/u-boot-socfpga.git
> >>>   master
> >>>  >>>
> >>>  >>> for you to fetch changes up to
> >>>  >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
> >>>  >>>
> >>>  >>>arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06
> >>>  +0200)
> >>>  >>>
> >>>  >>
> >>>  >> Arg, sorry I didn't see this sooner:
> >>>  >> arm:  w+   socfpga_arria10
> >>>  >> +(socfpga_arria10)
> >>>  >> +(socfpga_arria10) WARNING: unmet direct dependencies
> >>>  detected for
> >>>  >> ALTERA_SDRAM
> >>>  >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
> >>>  >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
> >>>  >> +(socfpga_arria10)   Selected by [y]:
> >>>  >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM
> >>> [=y] &&
> >>>  >> ARCH_SOCFPGA [=y]
> >>>  >
> >>>  > Is this coming from this PR or not ?
> >>>  
> >>>   Yes, this PR.  Top of tree + this PR only.
> >>>  >>>
> >>>  >>> It's not only top of tree + this PR, it also fails for pure
> >>>  >>> u-boot-socfpga/master.
> >>>  >>>
> >>>  >>> Seems like this bug has been introduced when I made the gen5
> >>> driver
> >>>  >>> depend
> >>>  >>> on RAM. Unfortunately, all the drivers use one Kconfig item
> >>>  (although
> >>>  >>> these
> >>>  >>> are totally different drivers) but now only gen5 depends on
> >>> RAM. Is
> >>>  >>> there
> >>>  >>> any Kconfig magic to fix this without duplicating the config
> >>> item
> >>>  >>> entries?
> >>>  >>
> >>>  >> I think you may want something more like:
> >>>  >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >>>  >> index 04a207c9403e..4a23e327dfb4 100644
> >>>  >> --- a/arch/arm/Kconfig
> >>>  >> +++ b/arch/arm/Kconfig
> >>>  >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
> >>>  >>   select DM_SERIAL
> >>>  >>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5
> ||
> >>>  >> TARGET_SOCFPGA_ARRIA10
> >>>  >>   select OF_CONTROL
> >>>  >> -select RAM if TARGET_SOCFPGA_GEN5
> >>>  >>   select SPL_DM_RESET if DM_RESET
> >>>  >>   select SPL_DM_SERIAL
> >>>  >>   select SPL_LIBCOMMON_SUPPORT
> >>>  >>   select SPL_LIBGENERIC_SUPPORT
> >>>  >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >>>  >>   select SPL_OF_CONTROL
> >>>  >> -select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>>  >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
> >>>  >>   select SPL_SERIAL_SUPPORT
> >>>  >>   select SPL_WATCHDOG_SUPPORT
> >>>  >> diff --git a/drivers/ddr/altera/Kconfig
> >>> b/drivers/ddr/altera/Kconfig
> >>>  >> index 7370d4133a67..8f60b56eb848 100644
> >>>  >> --- a/drivers/ddr/altera/Kconfig
> >>>  >> +++ b/drivers/ddr/altera/Kconfig
> >>>  >> @@ -1,6 +1,7 @@
> >>>  >>   config ALTERA_SDRAM
> >>>  >>   bool "SoCFPGA DDR SDRAM driver"
> >>>  >> -depends on RAM
> >>>  >>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
> >>>  >> +select RAM if TARGET_SOCFPGA_GEN5
> >>>  >> +select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>>  >>   help
> >>>  >> Enable DDR SDRAM controller for the SoCFPGA devices.
> >>>  >>
> >>>  >> But I didn't test anything other than socfpga_arria10/arria5 as
> >>>  >> building.
> >>>  >
> >>>  > Tom,
> >>>  > Thanks for the hint. I did just that and it works for me
> >>> (cyclone5).
> >>>  > As only this platform is affected by this patch, it should be
> >>> fine.
> >>>  >
> >>>  > Marek,
> >>>  

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 4/16/19 10:08 PM, Simon Goldschmidt wrote:
> Hi Marek,
> 
> Am 12.04.2019 um 12:31 schrieb Marek Vasut:
>> On 4/11/19 10:07 PM, Simon Goldschmidt wrote:
>>>
>>>
>>> Marek Vasut mailto:ma...@denx.de>> schrieb am Do., 11.
>>> Apr. 2019, 21:59:
>>>
>>>  On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
>>>  >
>>>  >
>>>  > On 11.04.19 21:03, Tom Rini wrote:
>>>  >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt
>>> wrote:
>>>  >>>
>>>  >>>
>>>  >>> On 11.04.19 20:20, Tom Rini wrote:
>>>   On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
>>>  > On 4/11/19 8:17 PM, Tom Rini wrote:
>>>  >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
>>>  >>
>>>  >>> The following changes since commit
>>>  >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
>>>  >>>
>>>  >>>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
>>>  >>>
>>>  >>> are available in the Git repository at:
>>>  >>>
>>>  >>>    git://git.denx.de/u-boot-socfpga.git
>>>   master
>>>  >>>
>>>  >>> for you to fetch changes up to
>>>  >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
>>>  >>>
>>>  >>>    arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06
>>>  +0200)
>>>  >>>
>>>  >>
>>>  >> Arg, sorry I didn't see this sooner:
>>>  >>     arm:  w+   socfpga_arria10
>>>  >> +(socfpga_arria10)
>>>  >> +(socfpga_arria10) WARNING: unmet direct dependencies
>>>  detected for
>>>  >> ALTERA_SDRAM
>>>  >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
>>>  >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
>>>  >> +(socfpga_arria10)   Selected by [y]:
>>>  >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM
>>> [=y] &&
>>>  >> ARCH_SOCFPGA [=y]
>>>  >
>>>  > Is this coming from this PR or not ?
>>>  
>>>   Yes, this PR.  Top of tree + this PR only.
>>>  >>>
>>>  >>> It's not only top of tree + this PR, it also fails for pure
>>>  >>> u-boot-socfpga/master.
>>>  >>>
>>>  >>> Seems like this bug has been introduced when I made the gen5
>>> driver
>>>  >>> depend
>>>  >>> on RAM. Unfortunately, all the drivers use one Kconfig item
>>>  (although
>>>  >>> these
>>>  >>> are totally different drivers) but now only gen5 depends on
>>> RAM. Is
>>>  >>> there
>>>  >>> any Kconfig magic to fix this without duplicating the config
>>> item
>>>  >>> entries?
>>>  >>
>>>  >> I think you may want something more like:
>>>  >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>>  >> index 04a207c9403e..4a23e327dfb4 100644
>>>  >> --- a/arch/arm/Kconfig
>>>  >> +++ b/arch/arm/Kconfig
>>>  >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
>>>  >>   select DM_SERIAL
>>>  >>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 ||
>>>  >> TARGET_SOCFPGA_ARRIA10
>>>  >>   select OF_CONTROL
>>>  >> -    select RAM if TARGET_SOCFPGA_GEN5
>>>  >>   select SPL_DM_RESET if DM_RESET
>>>  >>   select SPL_DM_SERIAL
>>>  >>   select SPL_LIBCOMMON_SUPPORT
>>>  >>   select SPL_LIBGENERIC_SUPPORT
>>>  >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
>>>  >>   select SPL_OF_CONTROL
>>>  >> -    select SPL_RAM if TARGET_SOCFPGA_GEN5
>>>  >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
>>>  >>   select SPL_SERIAL_SUPPORT
>>>  >>   select SPL_WATCHDOG_SUPPORT
>>>  >> diff --git a/drivers/ddr/altera/Kconfig
>>> b/drivers/ddr/altera/Kconfig
>>>  >> index 7370d4133a67..8f60b56eb848 100644
>>>  >> --- a/drivers/ddr/altera/Kconfig
>>>  >> +++ b/drivers/ddr/altera/Kconfig
>>>  >> @@ -1,6 +1,7 @@
>>>  >>   config ALTERA_SDRAM
>>>  >>   bool "SoCFPGA DDR SDRAM driver"
>>>  >> -    depends on RAM
>>>  >>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
>>>  >> +    select RAM if TARGET_SOCFPGA_GEN5
>>>  >> +    select SPL_RAM if TARGET_SOCFPGA_GEN5
>>>  >>   help
>>>  >>     Enable DDR SDRAM controller for the SoCFPGA devices.
>>>  >>
>>>  >> But I didn't test anything other than socfpga_arria10/arria5 as
>>>  >> building.
>>>  >
>>>  > Tom,
>>>  > Thanks for the hint. I did just that and it works for me
>>> (cyclone5).
>>>  > As only this platform is affected by this patch, it should be
>>> fine.
>>>  >
>>>  > Marek,
>>>  > how should we proceed? I pushed the change as suggested by Tom
>>> to:
>>>  >
>>>  > https://github.com/goldsimon/u-boot.git
>>>  >
>>>  > or I could send v5 of the series that broke arria10...?
>>>
>>>  Send me a single patch on top of u-boot-socfpga/master, I'll add

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

Hi Marek,

Am 12.04.2019 um 12:31 schrieb Marek Vasut:

On 4/11/19 10:07 PM, Simon Goldschmidt wrote:



Marek Vasut mailto:ma...@denx.de>> schrieb am Do., 11.
Apr. 2019, 21:59:

 On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
 >
 >
 > On 11.04.19 21:03, Tom Rini wrote:
 >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:
 >>>
 >>>
 >>> On 11.04.19 20:20, Tom Rini wrote:
  On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
 > On 4/11/19 8:17 PM, Tom Rini wrote:
 >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
 >>
 >>> The following changes since commit
 >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
 >>>
 >>>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
 >>>
 >>> are available in the Git repository at:
 >>>
 >>>    git://git.denx.de/u-boot-socfpga.git
  master
 >>>
 >>> for you to fetch changes up to
 >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
 >>>
 >>>    arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06
 +0200)
 >>>
 >>
 >> Arg, sorry I didn't see this sooner:
 >>     arm:  w+   socfpga_arria10
 >> +(socfpga_arria10)
 >> +(socfpga_arria10) WARNING: unmet direct dependencies
 detected for
 >> ALTERA_SDRAM
 >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
 >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
 >> +(socfpga_arria10)   Selected by [y]:
 >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] &&
 >> ARCH_SOCFPGA [=y]
 >
 > Is this coming from this PR or not ?
 
  Yes, this PR.  Top of tree + this PR only.
 >>>
 >>> It's not only top of tree + this PR, it also fails for pure
 >>> u-boot-socfpga/master.
 >>>
 >>> Seems like this bug has been introduced when I made the gen5 driver
 >>> depend
 >>> on RAM. Unfortunately, all the drivers use one Kconfig item
 (although
 >>> these
 >>> are totally different drivers) but now only gen5 depends on RAM. Is
 >>> there
 >>> any Kconfig magic to fix this without duplicating the config item
 >>> entries?
 >>
 >> I think you may want something more like:
 >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 >> index 04a207c9403e..4a23e327dfb4 100644
 >> --- a/arch/arm/Kconfig
 >> +++ b/arch/arm/Kconfig
 >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
 >>   select DM_SERIAL
 >>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 ||
 >> TARGET_SOCFPGA_ARRIA10
 >>   select OF_CONTROL
 >> -    select RAM if TARGET_SOCFPGA_GEN5
 >>   select SPL_DM_RESET if DM_RESET
 >>   select SPL_DM_SERIAL
 >>   select SPL_LIBCOMMON_SUPPORT
 >>   select SPL_LIBGENERIC_SUPPORT
 >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
 >>   select SPL_OF_CONTROL
 >> -    select SPL_RAM if TARGET_SOCFPGA_GEN5
 >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
 >>   select SPL_SERIAL_SUPPORT
 >>   select SPL_WATCHDOG_SUPPORT
 >> diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
 >> index 7370d4133a67..8f60b56eb848 100644
 >> --- a/drivers/ddr/altera/Kconfig
 >> +++ b/drivers/ddr/altera/Kconfig
 >> @@ -1,6 +1,7 @@
 >>   config ALTERA_SDRAM
 >>   bool "SoCFPGA DDR SDRAM driver"
 >> -    depends on RAM
 >>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 >> +    select RAM if TARGET_SOCFPGA_GEN5
 >> +    select SPL_RAM if TARGET_SOCFPGA_GEN5
 >>   help
 >>     Enable DDR SDRAM controller for the SoCFPGA devices.
 >>
 >> But I didn't test anything other than socfpga_arria10/arria5 as
 >> building.
 >
 > Tom,
 > Thanks for the hint. I did just that and it works for me (cyclone5).
 > As only this platform is affected by this patch, it should be fine.
 >
 > Marek,
 > how should we proceed? I pushed the change as suggested by Tom to:
 >
 > https://github.com/goldsimon/u-boot.git
 >
 > or I could send v5 of the series that broke arria10...?

 Send me a single patch on top of u-boot-socfpga/master, I'll add it and
 that should take care of it. It would also make things well documented
 for other people who run into this.


To make it clear, patch 6/12 of this PR is ok for gen5 but breaks
arria10. This is not something anyone could run into as it's new. I'd
rather fix the patches before merging them to master (keep things
bisectable for a10).

Unfortunately, I'll be more or less offline until Tuesday. If my github
branch isn't enough, I'll send something when I'm back with PC access.


I can squash the patch(es), that's fine. 

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 4/11/19 10:07 PM, Simon Goldschmidt wrote:
> 
> 
> Marek Vasut mailto:ma...@denx.de>> schrieb am Do., 11.
> Apr. 2019, 21:59:
> 
> On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
> >
> >
> > On 11.04.19 21:03, Tom Rini wrote:
> >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:
> >>>
> >>>
> >>> On 11.04.19 20:20, Tom Rini wrote:
>  On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> > On 4/11/19 8:17 PM, Tom Rini wrote:
> >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
> >>
> >>> The following changes since commit
> >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
> >>>
> >>>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> >>>
> >>> are available in the Git repository at:
> >>>
> >>>    git://git.denx.de/u-boot-socfpga.git
>  master
> >>>
> >>> for you to fetch changes up to
> >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
> >>>
> >>>    arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06
> +0200)
> >>>
> >>
> >> Arg, sorry I didn't see this sooner:
> >>     arm:  w+   socfpga_arria10
> >> +(socfpga_arria10)
> >> +(socfpga_arria10) WARNING: unmet direct dependencies
> detected for
> >> ALTERA_SDRAM
> >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
> >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
> >> +(socfpga_arria10)   Selected by [y]:
> >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] &&
> >> ARCH_SOCFPGA [=y]
> >
> > Is this coming from this PR or not ?
> 
>  Yes, this PR.  Top of tree + this PR only.
> >>>
> >>> It's not only top of tree + this PR, it also fails for pure
> >>> u-boot-socfpga/master.
> >>>
> >>> Seems like this bug has been introduced when I made the gen5 driver
> >>> depend
> >>> on RAM. Unfortunately, all the drivers use one Kconfig item
> (although
> >>> these
> >>> are totally different drivers) but now only gen5 depends on RAM. Is
> >>> there
> >>> any Kconfig magic to fix this without duplicating the config item
> >>> entries?
> >>
> >> I think you may want something more like:
> >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >> index 04a207c9403e..4a23e327dfb4 100644
> >> --- a/arch/arm/Kconfig
> >> +++ b/arch/arm/Kconfig
> >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
> >>   select DM_SERIAL
> >>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 ||
> >> TARGET_SOCFPGA_ARRIA10
> >>   select OF_CONTROL
> >> -    select RAM if TARGET_SOCFPGA_GEN5
> >>   select SPL_DM_RESET if DM_RESET
> >>   select SPL_DM_SERIAL
> >>   select SPL_LIBCOMMON_SUPPORT
> >>   select SPL_LIBGENERIC_SUPPORT
> >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >>   select SPL_OF_CONTROL
> >> -    select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
> >>   select SPL_SERIAL_SUPPORT
> >>   select SPL_WATCHDOG_SUPPORT
> >> diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
> >> index 7370d4133a67..8f60b56eb848 100644
> >> --- a/drivers/ddr/altera/Kconfig
> >> +++ b/drivers/ddr/altera/Kconfig
> >> @@ -1,6 +1,7 @@
> >>   config ALTERA_SDRAM
> >>   bool "SoCFPGA DDR SDRAM driver"
> >> -    depends on RAM
> >>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
> >> +    select RAM if TARGET_SOCFPGA_GEN5
> >> +    select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>   help
> >>     Enable DDR SDRAM controller for the SoCFPGA devices.
> >>
> >> But I didn't test anything other than socfpga_arria10/arria5 as
> >> building.
> >
> > Tom,
> > Thanks for the hint. I did just that and it works for me (cyclone5).
> > As only this platform is affected by this patch, it should be fine.
> >
> > Marek,
> > how should we proceed? I pushed the change as suggested by Tom to:
> >
> > https://github.com/goldsimon/u-boot.git
> >
> > or I could send v5 of the series that broke arria10...?
> 
> Send me a single patch on top of u-boot-socfpga/master, I'll add it and
> that should take care of it. It would also make things well documented
> for other people who run into this.
> 
> 
> To make it clear, patch 6/12 of this PR is ok for gen5 but breaks
> arria10. This is not something anyone could run into as it's new. I'd
> rather fix the patches before merging them to master (keep things
> bisectable for a10).
> 
> Unfortunately, I'll be more or less offline until Tuesday. If my github
> branch isn't enough, I'll send 

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

Marek Vasut  schrieb am Do., 11. Apr. 2019, 21:59:

> On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
> >
> >
> > On 11.04.19 21:03, Tom Rini wrote:
> >> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:
> >>>
> >>>
> >>> On 11.04.19 20:20, Tom Rini wrote:
>  On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> > On 4/11/19 8:17 PM, Tom Rini wrote:
> >> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
> >>
> >>> The following changes since commit
> >>> 3c99166441bf3ea325af2da83cfe65430b49c066:
> >>>
> >>>Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> >>>
> >>> are available in the Git repository at:
> >>>
> >>>git://git.denx.de/u-boot-socfpga.git master
> >>>
> >>> for you to fetch changes up to
> >>> ef8679b24ec6226b7198e06747ff047a16030ca4:
> >>>
> >>>arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
> >>>
> >>
> >> Arg, sorry I didn't see this sooner:
> >> arm:  w+   socfpga_arria10
> >> +(socfpga_arria10)
> >> +(socfpga_arria10) WARNING: unmet direct dependencies detected for
> >> ALTERA_SDRAM
> >> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
> >> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
> >> +(socfpga_arria10)   Selected by [y]:
> >> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] &&
> >> ARCH_SOCFPGA [=y]
> >
> > Is this coming from this PR or not ?
> 
>  Yes, this PR.  Top of tree + this PR only.
> >>>
> >>> It's not only top of tree + this PR, it also fails for pure
> >>> u-boot-socfpga/master.
> >>>
> >>> Seems like this bug has been introduced when I made the gen5 driver
> >>> depend
> >>> on RAM. Unfortunately, all the drivers use one Kconfig item (although
> >>> these
> >>> are totally different drivers) but now only gen5 depends on RAM. Is
> >>> there
> >>> any Kconfig magic to fix this without duplicating the config item
> >>> entries?
> >>
> >> I think you may want something more like:
> >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >> index 04a207c9403e..4a23e327dfb4 100644
> >> --- a/arch/arm/Kconfig
> >> +++ b/arch/arm/Kconfig
> >> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
> >>   select DM_SERIAL
> >>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 ||
> >> TARGET_SOCFPGA_ARRIA10
> >>   select OF_CONTROL
> >> -select RAM if TARGET_SOCFPGA_GEN5
> >>   select SPL_DM_RESET if DM_RESET
> >>   select SPL_DM_SERIAL
> >>   select SPL_LIBCOMMON_SUPPORT
> >>   select SPL_LIBGENERIC_SUPPORT
> >>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >>   select SPL_OF_CONTROL
> >> -select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
> >>   select SPL_SERIAL_SUPPORT
> >>   select SPL_WATCHDOG_SUPPORT
> >> diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
> >> index 7370d4133a67..8f60b56eb848 100644
> >> --- a/drivers/ddr/altera/Kconfig
> >> +++ b/drivers/ddr/altera/Kconfig
> >> @@ -1,6 +1,7 @@
> >>   config ALTERA_SDRAM
> >>   bool "SoCFPGA DDR SDRAM driver"
> >> -depends on RAM
> >>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
> >> +select RAM if TARGET_SOCFPGA_GEN5
> >> +select SPL_RAM if TARGET_SOCFPGA_GEN5
> >>   help
> >> Enable DDR SDRAM controller for the SoCFPGA devices.
> >>
> >> But I didn't test anything other than socfpga_arria10/arria5 as
> >> building.
> >
> > Tom,
> > Thanks for the hint. I did just that and it works for me (cyclone5).
> > As only this platform is affected by this patch, it should be fine.
> >
> > Marek,
> > how should we proceed? I pushed the change as suggested by Tom to:
> >
> > https://github.com/goldsimon/u-boot.git
> >
> > or I could send v5 of the series that broke arria10...?
>
> Send me a single patch on top of u-boot-socfpga/master, I'll add it and
> that should take care of it. It would also make things well documented
> for other people who run into this.
>

To make it clear, patch 6/12 of this PR is ok for gen5 but breaks arria10.
This is not something anyone could run into as it's new. I'd rather fix the
patches before merging them to master (keep things bisectable for a10).

Unfortunately, I'll be more or less offline until Tuesday. If my github
branch isn't enough, I'll send something when I'm back with PC access.

Regards,
Simo,

>
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 4/11/19 9:30 PM, Simon Goldschmidt wrote:
> 
> 
> On 11.04.19 21:03, Tom Rini wrote:
>> On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:
>>>
>>>
>>> On 11.04.19 20:20, Tom Rini wrote:
 On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> On 4/11/19 8:17 PM, Tom Rini wrote:
>> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
>>
>>> The following changes since commit
>>> 3c99166441bf3ea325af2da83cfe65430b49c066:
>>>
>>>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
>>>
>>> are available in the Git repository at:
>>>
>>>    git://git.denx.de/u-boot-socfpga.git master
>>>
>>> for you to fetch changes up to
>>> ef8679b24ec6226b7198e06747ff047a16030ca4:
>>>
>>>    arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
>>>
>>
>> Arg, sorry I didn't see this sooner:
>>     arm:  w+   socfpga_arria10
>> +(socfpga_arria10)
>> +(socfpga_arria10) WARNING: unmet direct dependencies detected for
>> ALTERA_SDRAM
>> +(socfpga_arria10)   Depends on [n]: RAM [=n] &&
>> (TARGET_SOCFPGA_GEN5 [=n] || TARGET_SOCFPGA_ARRIA10 [=y])
>> +(socfpga_arria10)   Selected by [y]:
>> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] &&
>> ARCH_SOCFPGA [=y]
>
> Is this coming from this PR or not ?

 Yes, this PR.  Top of tree + this PR only.
>>>
>>> It's not only top of tree + this PR, it also fails for pure
>>> u-boot-socfpga/master.
>>>
>>> Seems like this bug has been introduced when I made the gen5 driver
>>> depend
>>> on RAM. Unfortunately, all the drivers use one Kconfig item (although
>>> these
>>> are totally different drivers) but now only gen5 depends on RAM. Is
>>> there
>>> any Kconfig magic to fix this without duplicating the config item
>>> entries?
>>
>> I think you may want something more like:
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index 04a207c9403e..4a23e327dfb4 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -821,14 +821,12 @@ config ARCH_SOCFPGA
>>   select DM_SERIAL
>>   select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 ||
>> TARGET_SOCFPGA_ARRIA10
>>   select OF_CONTROL
>> -    select RAM if TARGET_SOCFPGA_GEN5
>>   select SPL_DM_RESET if DM_RESET
>>   select SPL_DM_SERIAL
>>   select SPL_LIBCOMMON_SUPPORT
>>   select SPL_LIBGENERIC_SUPPORT
>>   select SPL_NAND_SUPPORT if SPL_NAND_DENALI
>>   select SPL_OF_CONTROL
>> -    select SPL_RAM if TARGET_SOCFPGA_GEN5
>>   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
>>   select SPL_SERIAL_SUPPORT
>>   select SPL_WATCHDOG_SUPPORT
>> diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
>> index 7370d4133a67..8f60b56eb848 100644
>> --- a/drivers/ddr/altera/Kconfig
>> +++ b/drivers/ddr/altera/Kconfig
>> @@ -1,6 +1,7 @@
>>   config ALTERA_SDRAM
>>   bool "SoCFPGA DDR SDRAM driver"
>> -    depends on RAM
>>   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
>> +    select RAM if TARGET_SOCFPGA_GEN5
>> +    select SPL_RAM if TARGET_SOCFPGA_GEN5
>>   help
>>     Enable DDR SDRAM controller for the SoCFPGA devices.
>>
>> But I didn't test anything other than socfpga_arria10/arria5 as
>> building.
> 
> Tom,
> Thanks for the hint. I did just that and it works for me (cyclone5).
> As only this platform is affected by this patch, it should be fine.
> 
> Marek,
> how should we proceed? I pushed the change as suggested by Tom to:
> 
> https://github.com/goldsimon/u-boot.git
> 
> or I could send v5 of the series that broke arria10...?

Send me a single patch on top of u-boot-socfpga/master, I'll add it and
that should take care of it. It would also make things well documented
for other people who run into this.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

On 11.04.19 21:03, Tom Rini wrote:

On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:



On 11.04.19 20:20, Tom Rini wrote:

On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:

On 4/11/19 8:17 PM, Tom Rini wrote:

On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:


The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:

   Prepare v2019.04 (2019-04-08 21:40:40 -0400)

are available in the Git repository at:

   git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:

   arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)



Arg, sorry I didn't see this sooner:
arm:  w+   socfpga_arria10
+(socfpga_arria10)
+(socfpga_arria10) WARNING: unmet direct dependencies detected for ALTERA_SDRAM
+(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] || 
TARGET_SOCFPGA_ARRIA10 [=y])
+(socfpga_arria10)   Selected by [y]:
+(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && ARCH_SOCFPGA 
[=y]


Is this coming from this PR or not ?


Yes, this PR.  Top of tree + this PR only.


It's not only top of tree + this PR, it also fails for pure
u-boot-socfpga/master.

Seems like this bug has been introduced when I made the gen5 driver depend
on RAM. Unfortunately, all the drivers use one Kconfig item (although these
are totally different drivers) but now only gen5 depends on RAM. Is there
any Kconfig magic to fix this without duplicating the config item entries?


I think you may want something more like:
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 04a207c9403e..4a23e327dfb4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -821,14 +821,12 @@ config ARCH_SOCFPGA
select DM_SERIAL
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || 
TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
-   select RAM if TARGET_SOCFPGA_GEN5
select SPL_DM_RESET if DM_RESET
select SPL_DM_SERIAL
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
-   select SPL_RAM if TARGET_SOCFPGA_GEN5
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
select SPL_SERIAL_SUPPORT
select SPL_WATCHDOG_SUPPORT
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 7370d4133a67..8f60b56eb848 100644
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,6 +1,7 @@
  config ALTERA_SDRAM
bool "SoCFPGA DDR SDRAM driver"
-   depends on RAM
depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
+   select RAM if TARGET_SOCFPGA_GEN5
+   select SPL_RAM if TARGET_SOCFPGA_GEN5
help
  Enable DDR SDRAM controller for the SoCFPGA devices.

But I didn't test anything other than socfpga_arria10/arria5 as
building.


Tom,
Thanks for the hint. I did just that and it works for me (cyclone5).
As only this platform is affected by this patch, it should be fine.

Marek,
how should we proceed? I pushed the change as suggested by Tom to:

https://github.com/goldsimon/u-boot.git

or I could send v5 of the series that broke arria10...?

Regards,
Simon
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Apr 11, 2019 at 08:49:38PM +0200, Simon Goldschmidt wrote:
> 
> 
> On 11.04.19 20:20, Tom Rini wrote:
> >On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> >>On 4/11/19 8:17 PM, Tom Rini wrote:
> >>>On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
> >>>
> The following changes since commit 
> 3c99166441bf3ea325af2da83cfe65430b49c066:
> 
>    Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> 
> are available in the Git repository at:
> 
>    git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:
> 
>    arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
> 
> >>>
> >>>Arg, sorry I didn't see this sooner:
> >>>arm:  w+   socfpga_arria10
> >>>+(socfpga_arria10)
> >>>+(socfpga_arria10) WARNING: unmet direct dependencies detected for 
> >>>ALTERA_SDRAM
> >>>+(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] 
> >>>|| TARGET_SOCFPGA_ARRIA10 [=y])
> >>>+(socfpga_arria10)   Selected by [y]:
> >>>+(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && 
> >>>ARCH_SOCFPGA [=y]
> >>
> >>Is this coming from this PR or not ?
> >
> >Yes, this PR.  Top of tree + this PR only.
> 
> It's not only top of tree + this PR, it also fails for pure
> u-boot-socfpga/master.
> 
> Seems like this bug has been introduced when I made the gen5 driver depend
> on RAM. Unfortunately, all the drivers use one Kconfig item (although these
> are totally different drivers) but now only gen5 depends on RAM. Is there
> any Kconfig magic to fix this without duplicating the config item entries?

I think you may want something more like:
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 04a207c9403e..4a23e327dfb4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -821,14 +821,12 @@ config ARCH_SOCFPGA
select DM_SERIAL
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || 
TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
-   select RAM if TARGET_SOCFPGA_GEN5
select SPL_DM_RESET if DM_RESET
select SPL_DM_SERIAL
select SPL_LIBCOMMON_SUPPORT
select SPL_LIBGENERIC_SUPPORT
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
-   select SPL_RAM if TARGET_SOCFPGA_GEN5
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
select SPL_SERIAL_SUPPORT
select SPL_WATCHDOG_SUPPORT
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 7370d4133a67..8f60b56eb848 100644
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,6 +1,7 @@
 config ALTERA_SDRAM
bool "SoCFPGA DDR SDRAM driver"
-   depends on RAM
depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
+   select RAM if TARGET_SOCFPGA_GEN5
+   select SPL_RAM if TARGET_SOCFPGA_GEN5
help
  Enable DDR SDRAM controller for the SoCFPGA devices.

But I didn't test anything other than socfpga_arria10/arria5 as
building.

-- 
Tom


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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Simon Goldschmidt]

On 11.04.19 20:20, Tom Rini wrote:

On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:

On 4/11/19 8:17 PM, Tom Rini wrote:

On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:


The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:

   Prepare v2019.04 (2019-04-08 21:40:40 -0400)

are available in the Git repository at:

   git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:

   arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)



Arg, sorry I didn't see this sooner:
arm:  w+   socfpga_arria10
+(socfpga_arria10)
+(socfpga_arria10) WARNING: unmet direct dependencies detected for ALTERA_SDRAM
+(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] || 
TARGET_SOCFPGA_ARRIA10 [=y])
+(socfpga_arria10)   Selected by [y]:
+(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && ARCH_SOCFPGA 
[=y]


Is this coming from this PR or not ?


Yes, this PR.  Top of tree + this PR only.


It's not only top of tree + this PR, it also fails for pure 
u-boot-socfpga/master.


Seems like this bug has been introduced when I made the gen5 driver 
depend on RAM. Unfortunately, all the drivers use one Kconfig item 
(although these are totally different drivers) but now only gen5 depends 
on RAM. Is there any Kconfig magic to fix this without duplicating the 
config item entries?


Regards,
Simon
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Apr 11, 2019 at 08:19:38PM +0200, Marek Vasut wrote:
> On 4/11/19 8:17 PM, Tom Rini wrote:
> > On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
> > 
> >> The following changes since commit 
> >> 3c99166441bf3ea325af2da83cfe65430b49c066:
> >>
> >>   Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> >>
> >> are available in the Git repository at:
> >>
> >>   git://git.denx.de/u-boot-socfpga.git master
> >>
> >> for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:
> >>
> >>   arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
> >>
> > 
> > Arg, sorry I didn't see this sooner:
> >arm:  w+   socfpga_arria10
> > +(socfpga_arria10)
> > +(socfpga_arria10) WARNING: unmet direct dependencies detected for 
> > ALTERA_SDRAM
> > +(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] 
> > || TARGET_SOCFPGA_ARRIA10 [=y])
> > +(socfpga_arria10)   Selected by [y]:
> > +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && 
> > ARCH_SOCFPGA [=y]
> 
> Is this coming from this PR or not ?

Yes, this PR.  Top of tree + this PR only.

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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 4/11/19 8:17 PM, Tom Rini wrote:
> On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:
> 
>> The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:
>>
>>   Prepare v2019.04 (2019-04-08 21:40:40 -0400)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:
>>
>>   arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
>>
> 
> Arg, sorry I didn't see this sooner:
>arm:  w+   socfpga_arria10
> +(socfpga_arria10)
> +(socfpga_arria10) WARNING: unmet direct dependencies detected for 
> ALTERA_SDRAM
> +(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] || 
> TARGET_SOCFPGA_ARRIA10 [=y])
> +(socfpga_arria10)   Selected by [y]:
> +(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && 
> ARCH_SOCFPGA [=y]

Is this coming from this PR or not ?

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Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Wed, Apr 10, 2019 at 04:46:28PM +0200, Marek Vasut wrote:

> The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:
> 
>   Prepare v2019.04 (2019-04-08 21:40:40 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:
> 
>   arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)
> 

Arg, sorry I didn't see this sooner:
   arm:  w+   socfpga_arria10
+(socfpga_arria10)
+(socfpga_arria10) WARNING: unmet direct dependencies detected for ALTERA_SDRAM
+(socfpga_arria10)   Depends on [n]: RAM [=n] && (TARGET_SOCFPGA_GEN5 [=n] || 
TARGET_SOCFPGA_ARRIA10 [=y])
+(socfpga_arria10)   Selected by [y]:
+(socfpga_arria10)   - TARGET_SOCFPGA_ARRIA10 [=y] && ARM [=y] && ARCH_SOCFPGA 
[=y]

-- 
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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 3c99166441bf3ea325af2da83cfe65430b49c066:

  Prepare v2019.04 (2019-04-08 21:40:40 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to ef8679b24ec6226b7198e06747ff047a16030ca4:

  arm: dts: Stratix10: Add QSPI node (2019-04-09 13:11:06 +0200)


Ley Foon Tan (7):
  ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
  ddr: altera: Stratix10: Add multi-banks DRAM size check
  configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
  arm: dts: Stratix10: Modify stratix10 socdk memory node
  arm: socfpga: stratix10: Add cpu_has_been_warmreset()
  ddr: altera: Stratix10: Add ECC memory scrubbing
  arm: dts: Stratix10: Add QSPI node

Simon Goldschmidt (9):
  arm: socfpga: gen5: sync devicetrees to Linux
  arm: socfpga: gen5: add reset & sdr node to SPL devicetrees
  reset: socfpga: rename membase ptr to modrst_base
  arm: socfpga: gen5: deassert peripheral reset by default
  reset: socfpga: add reset handling for old kernels
  arm: socfpga: move gen5 SDR driver to DM
  mtd: rawnand: denali: add reset handling
  spi: cadence_qspi: add reset handling
  arm: socfpga: implement proper peripheral reset

 arch/arm/Kconfig   |   2 ++
 arch/arm/dts/socfpga-common-u-boot.dtsi|  19
++
 arch/arm/dts/socfpga.dtsi  |  23
++
 arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi  |   6 ++
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts |   5 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi |   6 ++
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts|   5 +
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts  |   5 +
 arch/arm/dts/socfpga_cyclone5_is1.dts  |   5 +
 arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi|   6 ++
 arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi   |   6 ++
 arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi |   6 ++
 arch/arm/dts/socfpga_cyclone5_socrates.dts |   2 --
 arch/arm/dts/socfpga_cyclone5_sr1500.dts   |   5 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi  |   6 ++
 arch/arm/dts/socfpga_stratix10.dtsi|  13 
 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi   |  25
+++
 arch/arm/dts/socfpga_stratix10_socdk.dts   |  39
+++-
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h |   3 +++
 arch/arm/mach-socfpga/include/mach/sdram_gen5.h|   4 
 arch/arm/mach-socfpga/include/mach/sdram_s10.h |   9 +
 arch/arm/mach-socfpga/misc_gen5.c  |  10 --
 arch/arm/mach-socfpga/reset_manager_s10.c  |   9 +
 arch/arm/mach-socfpga/spl_gen5.c   |  38
++-
 arch/arm/mach-socfpga/spl_s10.c|  11 ---
 configs/socfpga_stratix10_defconfig|   2 +-
 drivers/ddr/altera/Kconfig |   1 +
 drivers/ddr/altera/sdram_gen5.c| 143
++--
 drivers/ddr/altera/sdram_s10.c | 136
+++--
 drivers/ddr/altera/sequencer.c |   9 -
 drivers/ddr/altera/sequencer.h |  35
+
 drivers/mtd/nand/raw/denali.h  |   2 ++
 drivers/mtd/nand/raw/denali_dt.c   |  15 ++
 drivers/reset/reset-socfpga.c  |  55
++-
 drivers/spi/cadence_qspi.c |  17

 drivers/spi/cadence_qspi.h |   4 
 include/configs/socfpga_common.h   |   1 +
 37 files changed, 560 insertions(+), 128 deletions(-)
 create mode 100644 arch/arm/dts/socfpga-common-u-boot.dtsi
 mode change 100644 => 100755 arch/arm/dts/socfpga_stratix10.dtsi
 create mode 100755 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
 mode change 100644 => 100755 arch/arm/dts/socfpga_stratix10_socdk.dts
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Tue, Mar 26, 2019 at 06:44:14PM +0100, Marek Vasut wrote:

> The following changes since commit cfb3e102c4bdf96a41cbd3eeb1d3a9a56c69c46c:
> 
>   Merge branch '2019-03-22-master-imports' (2019-03-22 19:09:58 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 3d0cc01d101abc3efd5feabe85f22a42ebcbcca2:
> 
>   configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF (2019-03-25 20:26:45
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit cfb3e102c4bdf96a41cbd3eeb1d3a9a56c69c46c:

  Merge branch '2019-03-22-master-imports' (2019-03-22 19:09:58 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 3d0cc01d101abc3efd5feabe85f22a42ebcbcca2:

  configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF (2019-03-25 20:26:45
+0100)


Ley Foon Tan (1):
  configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF

 configs/socfpga_stratix10_defconfig | 1 -
 1 file changed, 1 deletion(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Mar 21, 2019 at 04:42:01PM +0100, Marek Vasut wrote:

> The following changes since commit a00d15757d7a513e410f15f2f910cb5261a3:
> 
>   Merge git://git.denx.de/u-boot-marvell (2019-03-19 19:58:48 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to e3ada91e49848ddcd3293a737cf08e48b2d72e42:
> 
>   ARM: socfpga: Build sfp image only for Gen5 and Arria10 devices
> (2019-03-21 03:31:01 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit a00d15757d7a513e410f15f2f910cb5261a3:

  Merge git://git.denx.de/u-boot-marvell (2019-03-19 19:58:48 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to e3ada91e49848ddcd3293a737cf08e48b2d72e42:

  ARM: socfpga: Build sfp image only for Gen5 and Arria10 devices
(2019-03-21 03:31:01 +0100)


Dalon Westergreen (1):
  ARM: socfpga: Build sfp image only for Gen5 and Arria10 devices

 Kconfig  | 3 ++-
 scripts/Makefile.spl | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Mon, Mar 18, 2019 at 04:08:48AM +0100, Marek Vasut wrote:

> The following changes since commit 9659eb46af6249b6e4b3712e60a1eb2e87fc48a1:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-samsung (2019-03-14
> 11:37:11 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 92a47459bb85ba3e835b11ddbdcdfb571280614f:
> 
>   arm: socfpga: make SPL_TEXT_BASE overridable (2019-03-16 13:30:09 +0100)
> 

Applied to u-boot/master, thanks!

-- 
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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 9659eb46af6249b6e4b3712e60a1eb2e87fc48a1:

  Merge branch 'master' of git://git.denx.de/u-boot-samsung (2019-03-14
11:37:11 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 92a47459bb85ba3e835b11ddbdcdfb571280614f:

  arm: socfpga: make SPL_TEXT_BASE overridable (2019-03-16 13:30:09 +0100)


Ley Foon Tan (1):
  ARM: dts: socfpga: Add missing altr,sysmgr-syscon for EMAC

Simon Goldschmidt (1):
  arm: socfpga: make SPL_TEXT_BASE overridable

 arch/arm/dts/socfpga_stratix10.dtsi | 3 +++
 include/configs/socfpga_common.h| 2 ++
 2 files changed, 5 insertions(+)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sun, Mar 10, 2019 at 02:27:31PM +0100, Marek Vasut wrote:

> Arria10 DRAM fixes and Gen5 cache fixes.
> 
> The following changes since commit e8e3f2d2d48f97b2c79b698eccedce8f4f880993:
> 
>   Merge branch '2019-03-08-master-imports' (2019-03-08 18:04:13 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 88c3bb49e1bf2b808cbad1fbdeda09480ae580a7:
> 
>   ddr: socfpga: Clean up ddr_setup() (2019-03-09 23:25:19 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

Arria10 DRAM fixes and Gen5 cache fixes.

The following changes since commit e8e3f2d2d48f97b2c79b698eccedce8f4f880993:

  Merge branch '2019-03-08-master-imports' (2019-03-08 18:04:13 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 88c3bb49e1bf2b808cbad1fbdeda09480ae580a7:

  ddr: socfpga: Clean up ddr_setup() (2019-03-09 23:25:19 +0100)


Dinh Nguyen (1):
  ARM: socfpga: fix data and tag latency values for pl310 cache
controller

Marek Vasut (9):
  ddr: socfpga: Fix IO in Arria10 DDR driver
  ddr: socfpga: Fix newline in debug print on A10
  ARM: socfpga: Disable D cache in SPL
  ARM: socfpga: Drop CONFIG_SYS_NAND_BAD_BLOCK_POS
  ARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset
  ARM: socfpga: Fix A10 SoCDK Kconfig
  ddr: socfpga: Fix EMIF clear timeout
  ddr: socfpga: Clean up EMIF reset
  ddr: socfpga: Clean up ddr_setup()

 arch/arm/mach-socfpga/misc.c|   4 ++--
 arch/arm/mach-socfpga/spl_a10.c |   2 ++
 board/altera/arria10-socdk/Kconfig  |   2 +-
 drivers/ddr/altera/sdram_arria10.c  | 107
---
 include/configs/socfpga_arria10_socdk.h |   2 --
 include/configs/socfpga_common.h|   9 -
 6 files changed, 49 insertions(+), 77 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Feb 28, 2019 at 10:24:23PM +0100, Marek Vasut wrote:

> SoCFPGA cache/gpio fixes:
> 
> The following changes since commit afd46c5f13d0c93c44008bd7040227d0b84e31b9:
> 
>   Merge branch '2019-02-22-master-imports' (2019-02-22 22:40:24 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 4a9743f73c10a4b3801be3b662a892f61617256e:
> 
>   ARM: socfpga: Clear PL310 early in SPL (2019-02-25 16:07:36 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

SoCFPGA cache/gpio fixes:

The following changes since commit afd46c5f13d0c93c44008bd7040227d0b84e31b9:

  Merge branch '2019-02-22-master-imports' (2019-02-22 22:40:24 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 4a9743f73c10a4b3801be3b662a892f61617256e:

  ARM: socfpga: Clear PL310 early in SPL (2019-02-25 16:07:36 +0100)


Julien Béraud (1):
  gpio: altera_pio: fix get_value

Marek Vasut (3):
  ARM: cache: Fix incorrect bitwise operation
  ARM: socfpga: Configure PL310 latencies
  ARM: socfpga: Clear PL310 early in SPL

 arch/arm/lib/cache-pl310.c   |  2 +-
 arch/arm/mach-socfpga/misc.c |  3 +++
 arch/arm/mach-socfpga/spl_gen5.c | 58
++
 drivers/gpio/altera_pio.c|  2 +-
 4 files changed, 63 insertions(+), 2 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Tue, Feb 19, 2019 at 03:48:03AM +0100, Marek Vasut wrote:

> The following changes since commit b89074f65047c4058741ed2bf3e6ff0c5af4c5bc:
> 
>   Merge tag 'u-boot-imx-2019-02-16' of git://git.denx.de/u-boot-imx
> (2019-02-16 08:31:05 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 5097ba6177bad8c7e09b50149cacd6fd5020f0c8:
> 
>   ARM: socfpga: stratix10: Return valid error code from FPGA driver
> (2019-02-18 13:00:54 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit b89074f65047c4058741ed2bf3e6ff0c5af4c5bc:

  Merge tag 'u-boot-imx-2019-02-16' of git://git.denx.de/u-boot-imx
(2019-02-16 08:31:05 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 5097ba6177bad8c7e09b50149cacd6fd5020f0c8:

  ARM: socfpga: stratix10: Return valid error code from FPGA driver
(2019-02-18 13:00:54 +0100)


Ang, Chee Hong (1):
  ARM: socfpga: stratix10: Return valid error code from FPGA driver

Ley Foon Tan (1):
  mmc: dwmmc: Poll for iDMAC TX/RX interrupt

Simon Goldschmidt (3):
  net: designware: socfpga: adapt to Gen5
  arm: socfpga: gen5 enable designware_socfpga
  arm: socfpga: gen5: remove hacked ETH RST handling

 arch/arm/mach-socfpga/include/mach/reset_manager.h |  2 --
 arch/arm/mach-socfpga/misc.c   | 65
-
 arch/arm/mach-socfpga/misc_gen5.c  | 44
+---
 drivers/fpga/stratix10.c   | 17 ++---
 drivers/mmc/dw_mmc.c   | 19 +++
 drivers/net/Kconfig|  3 +++
 drivers/net/dwmac_socfpga.c| 87
+--
 include/dwmmc.h|  7 +++
 8 files changed, 69 insertions(+), 175 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Jan 11, 2019 at 03:52:29PM +0100, Marek Vasut wrote:

> The following changes since commit 64abfc9b6bb3721621d5132e112ae2e91c57d8bb:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2019-01-10
> 09:28:28 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 70cae47014c270515b2e60b81094b219eb693add:
> 
>   ARM: dts: socfpga: Add missing SDMMC reset (2019-01-11 15:51:38 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 64abfc9b6bb3721621d5132e112ae2e91c57d8bb:

  Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2019-01-10
09:28:28 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 70cae47014c270515b2e60b81094b219eb693add:

  ARM: dts: socfpga: Add missing SDMMC reset (2019-01-11 15:51:38 +0100)


Tien Fong Chee (1):
  ARM: dts: socfpga: Add missing SDMMC reset

 arch/arm/dts/socfpga_arria10.dtsi | 1 +
 1 file changed, 1 insertion(+)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Dec 21, 2018 at 01:42:50PM +0100, Marek Vasut wrote:

> The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
> 
>   Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to bd5581716d0407272cfde624b484e530665b0a2f:
> 
>   arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration
> (2018-12-20 17:12:25 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:

  Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to bd5581716d0407272cfde624b484e530665b0a2f:

  arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration
(2018-12-20 17:12:25 +0100)


Ang, Chee Hong (5):
  arm: socfpga: stratix10: Add generic FPGA reconfig mailbox API for S10
  arm: socfpga: stratix10: Add macros for mailbox's arguments
  arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
  arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
  arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration

 arch/arm/mach-socfpga/Kconfig|   1 +
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h |   9 -
 arch/arm/mach-socfpga/include/mach/misc.h|   4 +-
 arch/arm/mach-socfpga/mailbox_s10.c  |  48
+++
 arch/arm/mach-socfpga/misc.c |  26 +
 arch/arm/mach-socfpga/misc_arria10.c |  23 ++-
 arch/arm/mach-socfpga/misc_gen5.c|  22 ++-
 arch/arm/mach-socfpga/misc_s10.c |  22 +++
 drivers/fpga/Kconfig |  11 ++
 drivers/fpga/Makefile|   1 +
 drivers/fpga/altera.c|   6 +++
 drivers/fpga/stratix10.c | 288
++
 include/altera.h |   8 
 13 files changed, 440 insertions(+), 29 deletions(-)
 create mode 100644 drivers/fpga/stratix10.c
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Mon, Dec 10, 2018 at 05:52:22AM +0100, Marek Vasut wrote:

> The following changes since commit 57dbc151437b36cc1105857d222df28b095236d7:
> 
>   rockchip: rk3399: Add MAINTAINERS entry (2018-12-06 10:24:12 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a9024dc18e9e864437a456f6c0144764dbee57d4:
> 
>   arm: socfpga: imply SPL options instead of select (2018-12-07 16:32:01
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 57dbc151437b36cc1105857d222df28b095236d7:

  rockchip: rk3399: Add MAINTAINERS entry (2018-12-06 10:24:12 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a9024dc18e9e864437a456f6c0144764dbee57d4:

  arm: socfpga: imply SPL options instead of select (2018-12-07 16:32:01
+0100)


Simon Goldschmidt (1):
  arm: socfpga: imply SPL options instead of select

 arch/arm/Kconfig | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Nov 29, 2018 at 09:18:39PM +0100, Marek Vasut wrote:

> The following changes since commit 67cf22cbdef8c62ffa28b4caf935825fe410c68d:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-usb (2018-11-27
> 14:01:45 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 30bade20a67a8205e10d006d8e1ac66552c1b137:
> 
>   arm: socfpga: fix SPL booting from fpga OnChip RAM (2018-11-29
> 12:45:15 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 67cf22cbdef8c62ffa28b4caf935825fe410c68d:

  Merge branch 'master' of git://git.denx.de/u-boot-usb (2018-11-27
14:01:45 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 30bade20a67a8205e10d006d8e1ac66552c1b137:

  arm: socfpga: fix SPL booting from fpga OnChip RAM (2018-11-29
12:45:15 +0100)


Simon Goldschmidt (6):
  arm: socfpga: make config structs const
  gpio: dwapb_gpio: fix binding without bank-name property
  spi: cadence_qspi: use "cdns,qspi-nor" as compatible
  dts: arm: socfpga: merge gen5 devicetrees from linux
  arm: socfpga: make socfpga_socrates_defconfig boot from QSPI
  arm: socfpga: fix SPL booting from fpga OnChip RAM

 arch/arm/dts/keystone-k2g.dtsi |   2 +-
 arch/arm/dts/socfpga.dtsi  | 404

 arch/arm/dts/socfpga_arria10.dtsi  |   2 +-
 arch/arm/dts/socfpga_arria5.dtsi   |  11 ++--
 arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi  |  56
+++
 arch/arm/dts/socfpga_arria5_socdk.dts  |  97
+++-
 arch/arm/dts/socfpga_cyclone5.dtsi |   9 +--
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts |  17 +-
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi |  46
+++
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  69
++-
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts|  16 ++
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts  |  16 ++
 arch/arm/dts/socfpga_cyclone5_is1.dts  |   8 +++
 arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi|  72

 arch/arm/dts/socfpga_cyclone5_socdk.dts|  88
++---
 arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi   |  56
+++
 arch/arm/dts/socfpga_cyclone5_sockit.dts   | 149
+++--
 arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi |  60

 arch/arm/dts/socfpga_cyclone5_socrates.dts |  87
+++--
 arch/arm/dts/socfpga_cyclone5_sr1500.dts   |  12 
 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi  |  60

 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  | 222
++--
 arch/arm/dts/stv0991.dts   |   2 +-
 arch/arm/mach-socfpga/include/mach/base_addr_ac5.h |   1 +
 arch/arm/mach-socfpga/include/mach/misc.h  |   9 +++
 arch/arm/mach-socfpga/misc_gen5.c  |   9 ++-
 arch/arm/mach-socfpga/spl_gen5.c   |  10 +++-
 arch/arm/mach-socfpga/wrap_sdram_config.c  |   4 +-
 doc/device-tree-bindings/spi/spi-cadence.txt   |   2 +-
 drivers/gpio/dwapb_gpio.c  |   7 +++
 drivers/spi/cadence_qspi.c |   2 +-
 31 files changed, 1264 insertions(+), 341 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_arria5_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_de0_nano_soc-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_sockit-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_socrates-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Wed, Oct 31, 2018 at 09:36:12PM +0100, Marek Vasut wrote:

> The following changes since commit 454cf76184c65426b68033a23da086e73663f2fc:
> 
>   Prepare v2018.11-rc3 (2018-10-29 16:04:26 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to f48db4ede07b52290477e188de714e327e4954de:
> 
>   arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
> (2018-10-31 01:41:10 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 454cf76184c65426b68033a23da086e73663f2fc:

  Prepare v2018.11-rc3 (2018-10-29 16:04:26 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to f48db4ede07b52290477e188de714e327e4954de:

  arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
(2018-10-31 01:41:10 +0100)


Simon Goldschmidt (2):
  arm: socfpga: fpga: fix type of local variable
  arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION

Stefan Roese (1):
  arm: socfpga: Fix bootcounter located at the end of internal SRAM

 arch/arm/Kconfig |  2 +-
 drivers/fpga/socfpga_arria10.c   |  2 +-
 drivers/fpga/socfpga_gen5.c  |  2 +-
 include/configs/socfpga_common.h | 13 +
 4 files changed, 16 insertions(+), 3 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 10/19/2018 04:12 PM, Tom Rini wrote:
> On Fri, Oct 19, 2018 at 12:29:43PM +0200, Marek Vasut wrote:
> 
>> The following changes since commit 6e7a186dc5d50f563e224e9ae7be70defff7ee0d:
>>
>>   Merge tag 'arc-more-updates-for-2018.11-rc2-2' of
>> git://git.denx.de/u-boot-arc (2018-10-15 07:20:07 -0400)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to 0baff8a1ed56314f779a2f13b432f9c340956838:
>>
>>   socfpga: clean up sfp generation (2018-10-16 11:23:24 +0200)
>>
>> 
>> Ang, Chee Hong (5):
> [snip]
>>   arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
> 
> NAK.  This causes:
> +(socfpga_stratix10) *resp_count++;
> +(socfpga_stratix10) ^
> +(socfpga_stratix10) args[1] = (u32)rbf_data;
> +(socfpga_stratix10)   ^
> w+(socfpga_stratix10) ../drivers/fpga/stratix10.c: In function 'get_resp_hdr':
> w+(socfpga_stratix10) ../drivers/fpga/stratix10.c:138:4: warning: value 
> computed is not used [-Wunused-value]
> w+(socfpga_stratix10) ../drivers/fpga/stratix10.c: In function 
> 'send_reconfig_data':
> w+(socfpga_stratix10) ../drivers/fpga/stratix10.c:188:14: warning: cast from 
> pointer to integer of different size [-Wpointer-to-int-cast]
> 
CCing Intel people, I'm waiting for a patch.

-- 
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Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Oct 19, 2018 at 12:29:43PM +0200, Marek Vasut wrote:

> The following changes since commit 6e7a186dc5d50f563e224e9ae7be70defff7ee0d:
> 
>   Merge tag 'arc-more-updates-for-2018.11-rc2-2' of
> git://git.denx.de/u-boot-arc (2018-10-15 07:20:07 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 0baff8a1ed56314f779a2f13b432f9c340956838:
> 
>   socfpga: clean up sfp generation (2018-10-16 11:23:24 +0200)
> 
> 
> Ang, Chee Hong (5):
[snip]
>   arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver

NAK.  This causes:
+(socfpga_stratix10) *resp_count++;
+(socfpga_stratix10) ^
+(socfpga_stratix10) args[1] = (u32)rbf_data;
+(socfpga_stratix10)   ^
w+(socfpga_stratix10) ../drivers/fpga/stratix10.c: In function 'get_resp_hdr':
w+(socfpga_stratix10) ../drivers/fpga/stratix10.c:138:4: warning: value 
computed is not used [-Wunused-value]
w+(socfpga_stratix10) ../drivers/fpga/stratix10.c: In function 
'send_reconfig_data':
w+(socfpga_stratix10) ../drivers/fpga/stratix10.c:188:14: warning: cast from 
pointer to integer of different size [-Wpointer-to-int-cast]

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 6e7a186dc5d50f563e224e9ae7be70defff7ee0d:

  Merge tag 'arc-more-updates-for-2018.11-rc2-2' of
git://git.denx.de/u-boot-arc (2018-10-15 07:20:07 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 0baff8a1ed56314f779a2f13b432f9c340956838:

  socfpga: clean up sfp generation (2018-10-16 11:23:24 +0200)


Ang, Chee Hong (5):
  arm: socfpga: stratix10: Add generic FPGA reconfig mailbox API for S10
  arm: socfpga: stratix10: Add macros for mailbox's arguments
  arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
  arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
  arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration

Dalon Westergreen (1):
  socfpga: clean up sfp generation

Simon Goldschmidt (3):
  arm: socfpga: make socfpga_socrates_defconfig boot from QSPI
  arm: socfpga: fix SPL booting from fpga OnChip RAM
  arm: socfpga: fpga: fix type of local variable

 Makefile   |  11 --
 arch/arm/dts/socfpga_cyclone5_socrates.dts |   2 +
 arch/arm/mach-socfpga/include/mach/base_addr_ac5.h |   1 +
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h   |   9 -
 arch/arm/mach-socfpga/include/mach/misc.h  |   9 +
 arch/arm/mach-socfpga/mailbox_s10.c|  48
+++
 arch/arm/mach-socfpga/misc.c   |  22 +++
 arch/arm/mach-socfpga/misc_gen5.c  |   9 -
 arch/arm/mach-socfpga/misc_s10.c   |   2 +
 arch/arm/mach-socfpga/spl_gen5.c   |  10 +++--
 configs/socfpga_stratix10_defconfig|   1 +
 drivers/fpga/Kconfig   |  11 ++
 drivers/fpga/Makefile  |   1 +
 drivers/fpga/altera.c  |   6 +++
 drivers/fpga/socfpga_arria10.c |   2 +-
 drivers/fpga/socfpga_gen5.c|   2 +-
 drivers/fpga/stratix10.c   | 288

 include/altera.h   |   8 
 scripts/Makefile.spl   |  12 --
 19 files changed, 432 insertions(+), 22 deletions(-)
 create mode 100644 drivers/fpga/stratix10.c
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Oct 05, 2018 at 11:26:55PM +0200, Marek Vasut wrote:

> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02
> 17:01:46 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 8be11fb3c1d8d89ff6b60bd3937efcea2dc9c91d:
> 
>   arm: socfpga: stratix10: add sgmii in phymode setup (2018-10-03
> 12:56:50 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:

  Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02
17:01:46 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 8be11fb3c1d8d89ff6b60bd3937efcea2dc9c91d:

  arm: socfpga: stratix10: add sgmii in phymode setup (2018-10-03
12:56:50 +0200)


Atsushi Nemoto (1):
  tools: socfpga: fix sfp_verify_header

Ley Foon Tan (2):
  gpio: dwapb_gpio: Change to use devm_kcalloc()
  arm: socfpga: Remove unused function socfpga_emac_manage_reset()

Ooi, Joyce (1):
  arm: socfpga: stratix10: add sgmii in phymode setup

 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h |  2 --
 arch/arm/mach-socfpga/misc_s10.c   |  5 +++--
 arch/arm/mach-socfpga/reset_manager_s10.c  | 35
---
 drivers/gpio/dwapb_gpio.c  | 11 ++-
 tools/socfpgaimage.c   |  1 +
 5 files changed, 6 insertions(+), 48 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sat, Sep 15, 2018 at 9:12 PM, Marek Vasut  wrote:

> The following changes since commit ecb10a41c9adf2c499c3d19fff96a0
> 8bb9ad2aef:
>
>   Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
> (2018-09-14 13:52:15 -0400)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-socfpga.git master
>
> for you to fetch changes up to f6d600b39bfc9a9402bcb393e706407b109d00e7:
>
>   arm: socfpga: stratix10: Add CONFIG_OF_EMBED (2018-09-15 03:17:01 +0200)
>
> 
> Dalon Westergreen (4):
>   common: add spl/u-boot-spl.hex target
>   arm: socfpga: stratix10: add CONFIG_SPL_TARGET
>   socfpga: stratix10: fix sdram_calculate_size
>   arm: socfpga: stratix10: Add CONFIG_OF_EMBED
>
> Ley Foon Tan (3):
>   gpio: dwapb_gpio: Enable get_function support
>   gpio: dwapb_gpio: Add reset ctrl to driver
>   gpio: dwapb_gpio: Change to use dev_read_addr()
>
>  Makefile   |  5 +
>  arch/arm/mach-socfpga/include/mach/sdram_s10.h |  2 +-
>  configs/socfpga_stratix10_defconfig|  1 +
>  drivers/ddr/altera/sdram_s10.c |  4 ++--
>  drivers/gpio/dwapb_gpio.c  | 67
> ---
>  include/configs/socfpga_stratix10_socdk.h  |  3 ++-
>  6 files changed, 75 insertions(+), 7 deletions(-)
>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit ecb10a41c9adf2c499c3d19fff96a08bb9ad2aef:

  Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
(2018-09-14 13:52:15 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to f6d600b39bfc9a9402bcb393e706407b109d00e7:

  arm: socfpga: stratix10: Add CONFIG_OF_EMBED (2018-09-15 03:17:01 +0200)


Dalon Westergreen (4):
  common: add spl/u-boot-spl.hex target
  arm: socfpga: stratix10: add CONFIG_SPL_TARGET
  socfpga: stratix10: fix sdram_calculate_size
  arm: socfpga: stratix10: Add CONFIG_OF_EMBED

Ley Foon Tan (3):
  gpio: dwapb_gpio: Enable get_function support
  gpio: dwapb_gpio: Add reset ctrl to driver
  gpio: dwapb_gpio: Change to use dev_read_addr()

 Makefile   |  5 +
 arch/arm/mach-socfpga/include/mach/sdram_s10.h |  2 +-
 configs/socfpga_stratix10_defconfig|  1 +
 drivers/ddr/altera/sdram_s10.c |  4 ++--
 drivers/gpio/dwapb_gpio.c  | 67
---
 include/configs/socfpga_stratix10_socdk.h  |  3 ++-
 6 files changed, 75 insertions(+), 7 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Aug 24, 2018 at 08:25:33PM +0200, Marek Vasut wrote:

> The following changes since commit 2418734ed429058b396d2aeb6b91f875cdc8e4ce:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-tegra (2018-08-22
> 22:36:08 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a029f540c54c39847c329fc70b1b2e0ab6dedbcd:
> 
>   ARM: dts: socfpga: Add missing NAND reset (2018-08-24 12:05:21 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 2418734ed429058b396d2aeb6b91f875cdc8e4ce:

  Merge branch 'master' of git://git.denx.de/u-boot-tegra (2018-08-22
22:36:08 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a029f540c54c39847c329fc70b1b2e0ab6dedbcd:

  ARM: dts: socfpga: Add missing NAND reset (2018-08-24 12:05:21 +0200)


Ley Foon Tan (2):
  arm: socfpga: stratix10: Enable EMAC to FPGA bridge based on handoff
  arm: socfpga: stratix10: Fix mailbox urgent command with urgent
register

Marek Vasut (6):
  ARM: socfpga: Reorder Arria10 SPL
  timer: dw-apb: Add Designware APB timer driver
  ARM: dts: socfpga: Flag timer clock as pre-reloc
  ARM: socfpga: Convert Arria10 to timer framework
  ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
  ARM: dts: socfpga: Add missing NAND reset

 arch/arm/dts/socfpga_arria10.dtsi  | 11 +++
 arch/arm/dts/socfpga_arria10_socdk.dtsi| 13
-
 arch/arm/mach-socfpga/Makefile |  1 -
 arch/arm/mach-socfpga/board.c  |  8 
 arch/arm/mach-socfpga/clock_manager_arria10.c  | 11 ---
 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h |  3 ++-
 arch/arm/mach-socfpga/include/mach/misc.h  |  5 +
 arch/arm/mach-socfpga/mailbox_s10.c| 15
+++
 arch/arm/mach-socfpga/misc_arria10.c   | 25
+
 arch/arm/mach-socfpga/spl_a10.c| 28

 arch/arm/mach-socfpga/spl_s10.c|  2 +-
 configs/socfpga_arria10_defconfig  |  3 +++
 drivers/timer/Kconfig  |  7 +++
 drivers/timer/Makefile |  1 +
 drivers/timer/dw-apb-timer.c   | 90
++
 include/configs/socfpga_common.h   |  2 ++
 16 files changed, 158 insertions(+), 67 deletions(-)
 create mode 100644 drivers/timer/dw-apb-timer.c
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Aug 17, 2018 at 12:08:59PM +0200, Marek Vasut wrote:

> The following changes since commit a032e0a6aed208977f48e78d2cc497b91543beaf:
> 
>   travis: give every job a name (2018-08-10 13:50:30 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to b0c0a715f90690a7dd4f33cb5b5c21960be26d3c:
> 
>   arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask (2018-08-15 12:41:09
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit a032e0a6aed208977f48e78d2cc497b91543beaf:

  travis: give every job a name (2018-08-10 13:50:30 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to b0c0a715f90690a7dd4f33cb5b5c21960be26d3c:

  arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask (2018-08-15 12:41:09
+0200)


Ley Foon Tan (1):
  arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask

Marek Vasut (20):
  ARM: socfpga: Register the FPGA on A10 in SPL again
  ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
  ARM: dts: socfpga: Add missing UART resets
  ARM: dts: socfpga: Fix Arria10 GMAC resets
  ARM: dts: socfpga: Add missing I2C resets
  ARM: dts: socfpga: Add i2c alias to A10 SoCDK
  ARM: socfpga: Enable DM reset framework on A10
  ARM: socfpga: Enable DM I2C framework on A10
  ARM: socfpga: Zap all the UART handling complexity
  net: designware: socfpga: Add Arria10 extras
  ARM: socfpga: Zap unused reset code
  ARM: socfpga: Remove adhoc ethernet reset and configuration
  ARM: socfpga: Enable DM ethernet on A10
  ARM: socfpga: clk: Obtain handoff base clock via DM
  ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
  ARM: socfpga: clk: Drop unused variables on Arria10
  ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
  clk: socfpga: Add initial Arria10 clock driver
  mmc: socfpga: Add clock framework support
  ARM: socfpga: clk: Convert to clock framework

Simon Goldschmidt (5):
  arm: socfpga: fix SPL on gen5 after moving to DM serial
  arm: socfpga: spl_gen5: clean up malloc_base assignment
  arm: socfpga: cyclone5: handle debug uart
  arm: socfpga: fix device trees to work with DM serial
  arm: socfpga: gen5: combine some init code for SPL and U-Boot

 arch/arm/Kconfig   |   2 +-
 arch/arm/dts/socfpga_arria10.dtsi  |  32
++--
 arch/arm/dts/socfpga_arria10_socdk.dtsi|  26 ++
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts   |  17 ++
 arch/arm/dts/socfpga_arria5_socdk.dts  |   5 ++
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts |   5 ++
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |   5 ++
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts|   5 ++
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts  |   5 ++
 arch/arm/dts/socfpga_cyclone5_is1.dts  |   5 ++
 arch/arm/dts/socfpga_cyclone5_socdk.dts|   5 ++
 arch/arm/dts/socfpga_cyclone5_sockit.dts   |   5 ++
 arch/arm/dts/socfpga_cyclone5_socrates.dts |   5 ++
 arch/arm/dts/socfpga_cyclone5_sr1500.dts   |   2 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  |   5 ++
 arch/arm/mach-socfpga/Kconfig  |  10 
 arch/arm/mach-socfpga/clock_manager.c  |   2 +
 arch/arm/mach-socfpga/clock_manager_arria10.c  | 306

 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h |   6 ---
 arch/arm/mach-socfpga/include/mach/misc.h  |   6 +--
 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h |   4 --
 arch/arm/mach-socfpga/include/mach/system_manager_s10.h|   6 +--
 arch/arm/mach-socfpga/misc_arria10.c   | 176
--
 arch/arm/mach-socfpga/misc_gen5.c  |  29
++-
 arch/arm/mach-socfpga/reset_manager_arria10.c  | 135

 arch/arm/mach-socfpga/spl_a10.c|   9 ++--
 arch/arm/mach-socfpga/spl_gen5.c   |  44
+---
 configs/socfpga_arria10_defconfig  |   2 +
 drivers/clk/Makefile   |   1 +
 drivers/clk/altera/Makefile|   7 +++
 drivers/clk/altera/clk-arria10.c   | 363

 drivers/mmc/socfpga_dw_mmc.c   |  40
++
 drivers/net/Kconfig|   8 +++
 drivers/net/Makefile   |   1 +
 drivers/net/dwmac_socfpga.c| 143
+++
 35 files changed, 800 insertions(+), 627 deletions(-)
 create mode 100644 drivers/clk/altera/Makefile
 create mode 100644 drivers/clk/altera/clk-arria10.c
 create mode 

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Jul 26, 2018 at 09:36:26AM +0200, Marek Vasut wrote:

> The following changes since commit 323a73adc9a1bf2de43fe03bdd9c3038ce7c2784:
> 
>   mtd: nand: add new enum for storing ECC algorithm (2018-07-23 14:33:21
> -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 64eeb1585428b71e29022e22d1aae86b65b9e052:
> 
>   ARM: dts: socfpga: Adjust NAND register layout on Arria10 (2018-07-25
> 00:13:32 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 323a73adc9a1bf2de43fe03bdd9c3038ce7c2784:

  mtd: nand: add new enum for storing ECC algorithm (2018-07-23 14:33:21
-0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 64eeb1585428b71e29022e22d1aae86b65b9e052:

  ARM: dts: socfpga: Adjust NAND register layout on Arria10 (2018-07-25
00:13:32 +0200)


Ley Foon Tan (1):
  arm: socfpga: Fixes: Rename CONFIG_SPL_RESET_SUPPORT to
CONFIG_SPL_DM_RESET

Marek Vasut (3):
  ARM: socfpga: Assure correct CPACR configuration
  ARM: socfpga: Init missing security policies on A10
  ARM: dts: socfpga: Adjust NAND register layout on Arria10

 arch/arm/Kconfig |  2 +-
 arch/arm/dts/socfpga_arria10.dtsi|  4 ++--
 arch/arm/mach-socfpga/board.c|  4 +++-
 arch/arm/mach-socfpga/misc_arria10.c | 13 +
 4 files changed, 19 insertions(+), 4 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Jul 13, 2018 at 11:04:36AM +0200, Marek Vasut wrote:

> The following changes since commit 1612ff0dfba57b1002d8c7a54778eb553ace98f4:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-mips (2018-07-11
> 21:55:20 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to aa529663368e97663d7ec16d6997cb69a2dd8afb:
> 
>   arm: socfpga: Fixes: include  (2018-07-12 16:03:35 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 1612ff0dfba57b1002d8c7a54778eb553ace98f4:

  Merge branch 'master' of git://git.denx.de/u-boot-mips (2018-07-11
21:55:20 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to aa529663368e97663d7ec16d6997cb69a2dd8afb:

  arm: socfpga: Fixes: include  (2018-07-12 16:03:35 +0200)


Ley Foon Tan (16):
  spi: cadence_qspi: Fix compilation warning
  spi: cadence_qspi: Fix warning cast from pointer to integer of
different size
  arm: socfpga: misc: Move bridge command to misc common
  arm: socfpga: stratix10: Add misc support for Stratix10 SoC
  arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
  arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
  arm: socfpga: Restructure the SPL file
  arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
  arm: socfpga: stratix10: Add timer support for Stratix10 SoC
  ddr: altera: stratix10: Add DDR support for Stratix10 SoC
  board: altera: stratix10: Add socdk board support for Stratix10 SoC
  arm: socfpga: stratix10: Enable Stratix10 SoC build
  arm: socfpga: Add do_bridge_reset for Arria 10
  arm: dts: socfpga: stratix10: Fix memory node
  arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
  arm: socfpga: Fixes: include 

Marek Vasut (5):
  ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10
  ddr: altera: Add ECC DRAM scrubbing support for Arria10
  ARM: socfpga: Pull DRAM size from DT
  ARM: socfpga: Make DRAM node available in SPL
  ARM: socfpga: Assure correct ACTLR configuration

 arch/arm/Kconfig  |  10 ++--
 arch/arm/dts/socfpga_arria10_socdk.dtsi   |   1 +
 arch/arm/dts/socfpga_stratix10_socdk.dts  |   4 +-
 arch/arm/mach-socfpga/Kconfig |  13 +
 arch/arm/mach-socfpga/Makefile|  16 +-
 arch/arm/mach-socfpga/board.c |  15 +-
 arch/arm/mach-socfpga/include/mach/firewall_s10.h | 120
+++
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h  | 144
+++
 arch/arm/mach-socfpga/include/mach/misc.h |   2 +
 arch/arm/mach-socfpga/include/mach/sdram_s10.h| 183
+
 arch/arm/mach-socfpga/mailbox_s10.c   | 380
++
 arch/arm/mach-socfpga/misc.c  |  35 -
 arch/arm/mach-socfpga/misc_arria10.c  |   9 
 arch/arm/mach-socfpga/misc_gen5.c |  26 ++
 arch/arm/mach-socfpga/misc_s10.c  | 133
+++
 arch/arm/mach-socfpga/mmu-arm64_s10.c |  71
+
 arch/arm/mach-socfpga/spl_a10.c   | 105
+
 arch/arm/mach-socfpga/{spl.c => spl_gen5.c}   |  62
--
 arch/arm/mach-socfpga/spl_s10.c   | 200
+++
 arch/arm/mach-socfpga/timer_s10.c |  26 ++
 board/altera/stratix10-socdk/MAINTAINERS  |   7 +++
 board/altera/stratix10-socdk/Makefile |   7 +++
 board/altera/stratix10-socdk/socfpga.c|   7 +++
 configs/socfpga_stratix10_defconfig   |  56

 drivers/ddr/altera/Makefile   |   1 +
 drivers/ddr/altera/sdram_arria10.c|  52 ++-
 drivers/ddr/altera/sdram_s10.c| 388
+
 drivers/spi/cadence_qspi.c|   2 +-
 drivers/spi/cadence_qspi_apb.c|   4 +-
 include/configs/socfpga_stratix10_socdk.h | 222
++
 30 files changed, 2189 insertions(+), 112 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h
 create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c
 create mode 100644 arch/arm/mach-socfpga/misc_s10.c
 create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c
 create mode 100644 arch/arm/mach-socfpga/spl_a10.c
 rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (81%)
 create mode 100644 arch/arm/mach-socfpga/spl_s10.c
 create mode 100644 arch/arm/mach-socfpga/timer_s10.c
 create mode 100644 

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 06/01/2018 10:03 AM, Ley Foon Tan wrote:
> On Fri, Jun 1, 2018 at 3:49 PM, Marek Vasut  wrote:
>> On 06/01/2018 09:30 AM, Ley Foon Tan wrote:
>>> On Fri, Jun 1, 2018 at 2:31 PM, Marek Vasut  wrote:
 On 06/01/2018 02:23 AM, Tom Rini wrote:
> On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:
>
>> The following changes since commit 
>> c3c863880479edeb5b08226e622d13c91326e4a7:
>>
>>   add FIT data-position & data-offset property support (2018-05-26
>> 18:19:19 -0400)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:
>>
>>   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
>> 18:34:39 +0200)
>>
>
> NAK.  This adds warnings (which are errors in travis):
> https://travis-ci.org/trini/u-boot/jobs/386306955#L866

 Ley, can you send me a fix ?

>>> Do you mean this one?
>>>
>>> +arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
>>> +arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
>>> +make[1]: *** [u-boot] Error 1
>>
>> There's that and the cadence qspi error, yes.
>>
> Okay, I will send in patch for do_bridge. For QSPI warning, here are
> the patches, can you merge them too?
> 
> https://patchwork.ozlabs.org/patch/909628/
> https://patchwork.ozlabs.org/patch/909629/
> https://patchwork.ozlabs.org/patch/909630/

I have some comments on those, so bridge patch is enough. The CQSPI
patches should go through u-boot-spi anyway.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Ley Foon Tan]

On Fri, Jun 1, 2018 at 3:49 PM, Marek Vasut  wrote:
> On 06/01/2018 09:30 AM, Ley Foon Tan wrote:
>> On Fri, Jun 1, 2018 at 2:31 PM, Marek Vasut  wrote:
>>> On 06/01/2018 02:23 AM, Tom Rini wrote:
 On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:

> The following changes since commit 
> c3c863880479edeb5b08226e622d13c91326e4a7:
>
>   add FIT data-position & data-offset property support (2018-05-26
> 18:19:19 -0400)
>
> are available in the Git repository at:
>
>   git://git.denx.de/u-boot-socfpga.git master
>
> for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:
>
>   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
> 18:34:39 +0200)
>

 NAK.  This adds warnings (which are errors in travis):
 https://travis-ci.org/trini/u-boot/jobs/386306955#L866
>>>
>>> Ley, can you send me a fix ?
>>>
>> Do you mean this one?
>>
>> +arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
>> +arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
>> +make[1]: *** [u-boot] Error 1
>
> There's that and the cadence qspi error, yes.
>
Okay, I will send in patch for do_bridge. For QSPI warning, here are
the patches, can you merge them too?

https://patchwork.ozlabs.org/patch/909628/
https://patchwork.ozlabs.org/patch/909629/
https://patchwork.ozlabs.org/patch/909630/

Regards
Ley Foon
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 06/01/2018 09:30 AM, Ley Foon Tan wrote:
> On Fri, Jun 1, 2018 at 2:31 PM, Marek Vasut  wrote:
>> On 06/01/2018 02:23 AM, Tom Rini wrote:
>>> On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:
>>>
 The following changes since commit 
 c3c863880479edeb5b08226e622d13c91326e4a7:

   add FIT data-position & data-offset property support (2018-05-26
 18:19:19 -0400)

 are available in the Git repository at:

   git://git.denx.de/u-boot-socfpga.git master

 for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:

   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
 18:34:39 +0200)

>>>
>>> NAK.  This adds warnings (which are errors in travis):
>>> https://travis-ci.org/trini/u-boot/jobs/386306955#L866
>>
>> Ley, can you send me a fix ?
>>
> Do you mean this one?
> 
> +arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
> +arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
> +make[1]: *** [u-boot] Error 1

There's that and the cadence qspi error, yes.

-- 
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Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Ley Foon Tan]

On Fri, Jun 1, 2018 at 2:31 PM, Marek Vasut  wrote:
> On 06/01/2018 02:23 AM, Tom Rini wrote:
>> On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:
>>
>>> The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
>>>
>>>   add FIT data-position & data-offset property support (2018-05-26
>>> 18:19:19 -0400)
>>>
>>> are available in the Git repository at:
>>>
>>>   git://git.denx.de/u-boot-socfpga.git master
>>>
>>> for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:
>>>
>>>   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
>>> 18:34:39 +0200)
>>>
>>
>> NAK.  This adds warnings (which are errors in travis):
>> https://travis-ci.org/trini/u-boot/jobs/386306955#L866
>
> Ley, can you send me a fix ?
>
Do you mean this one?

+arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
+arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
+make[1]: *** [u-boot] Error 1

Regards
Ley Foon
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

On 06/01/2018 02:23 AM, Tom Rini wrote:
> On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:
> 
>> The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
>>
>>   add FIT data-position & data-offset property support (2018-05-26
>> 18:19:19 -0400)
>>
>> are available in the Git repository at:
>>
>>   git://git.denx.de/u-boot-socfpga.git master
>>
>> for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:
>>
>>   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
>> 18:34:39 +0200)
>>
> 
> NAK.  This adds warnings (which are errors in travis):
> https://travis-ci.org/trini/u-boot/jobs/386306955#L866

Ley, can you send me a fix ?

-- 
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Marek Vasut
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, May 31, 2018 at 08:06:50PM +0200, Marek Vasut wrote:

> The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:
> 
>   add FIT data-position & data-offset property support (2018-05-26
> 18:19:19 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:
> 
>   arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
> 18:34:39 +0200)
> 

NAK.  This adds warnings (which are errors in travis):
https://travis-ci.org/trini/u-boot/jobs/386306955#L866

-- 
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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7:

  add FIT data-position & data-offset property support (2018-05-26
18:19:19 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to a0029aea787286c72ca2411475f95519bf9a7f34:

  arm: socfpga: stratix10: Enable Stratix10 SoC build (2018-05-29
18:34:39 +0200)


Ley Foon Tan (10):
  arm: socfpga: misc: Move bridge command to misc common
  arm: socfpga: stratix10: Add misc support for Stratix10 SoC
  arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
  arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
  arm: socfpga: Restructure the SPL file
  arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
  arm: socfpga: stratix10: Add timer support for Stratix10 SoC
  ddr: altera: stratix10: Add DDR support for Stratix10 SoC
  board: altera: stratix10: Add socdk board support for Stratix10 SoC
  arm: socfpga: stratix10: Enable Stratix10 SoC build

 arch/arm/Kconfig  |  10 ++--
 arch/arm/mach-socfpga/Kconfig |  13 +
 arch/arm/mach-socfpga/Makefile|  16 +-
 arch/arm/mach-socfpga/include/mach/firewall_s10.h | 120
+++
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h  | 144
+++
 arch/arm/mach-socfpga/include/mach/misc.h |   2 +
 arch/arm/mach-socfpga/include/mach/sdram_s10.h| 183
+
 arch/arm/mach-socfpga/mailbox_s10.c   | 380
++
 arch/arm/mach-socfpga/misc.c  |  31 +++
 arch/arm/mach-socfpga/misc_gen5.c |  26 ++
 arch/arm/mach-socfpga/misc_s10.c  | 133
+++
 arch/arm/mach-socfpga/mmu-arm64_s10.c |  71
+
 arch/arm/mach-socfpga/spl_a10.c   | 105
+
 arch/arm/mach-socfpga/{spl.c => spl_gen5.c}   |  62
--
 arch/arm/mach-socfpga/spl_s10.c   | 199
++
 arch/arm/mach-socfpga/timer_s10.c |  26 ++
 board/altera/stratix10-socdk/MAINTAINERS  |   7 +++
 board/altera/stratix10-socdk/Makefile |   7 +++
 board/altera/stratix10-socdk/socfpga.c|   7 +++
 configs/socfpga_stratix10_defconfig   |  56

 drivers/ddr/altera/Makefile   |   1 +
 drivers/ddr/altera/sdram_s10.c| 388
+
 include/configs/socfpga_stratix10_socdk.h | 222
++
 23 files changed, 2129 insertions(+), 80 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h
 create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c
 create mode 100644 arch/arm/mach-socfpga/misc_s10.c
 create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c
 create mode 100644 arch/arm/mach-socfpga/spl_a10.c
 rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (81%)
 create mode 100644 arch/arm/mach-socfpga/spl_s10.c
 create mode 100644 arch/arm/mach-socfpga/timer_s10.c
 create mode 100644 board/altera/stratix10-socdk/MAINTAINERS
 create mode 100644 board/altera/stratix10-socdk/Makefile
 create mode 100644 board/altera/stratix10-socdk/socfpga.c
 create mode 100644 configs/socfpga_stratix10_defconfig
 create mode 100644 drivers/ddr/altera/sdram_s10.c
 create mode 100644 include/configs/socfpga_stratix10_socdk.h
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sun, May 20, 2018 at 12:05:32PM +0200, Marek Vasut wrote:

> The following changes since commit 233719cc40b5a00f37949d4173c190edcb4491a1:
> 
>   Merge git://www.denx.de/git/u-boot-marvell (2018-05-17 12:38:30 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 00f7ae6138ad8b9d859a70d022161297b1bb8049:
> 
>   arm: dts: socfpga: stratix10: update dtsi and dts (2018-05-18 10:30:48
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 233719cc40b5a00f37949d4173c190edcb4491a1:

  Merge git://www.denx.de/git/u-boot-marvell (2018-05-17 12:38:30 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 00f7ae6138ad8b9d859a70d022161297b1bb8049:

  arm: dts: socfpga: stratix10: update dtsi and dts (2018-05-18 10:30:48
+0200)


Ben Kalo (1):
  ARM: socfpga: Fix Documentation errors in scu_registers

Ley Foon Tan (6):
  arm: socfpga: stratix10: Add watchdog and firewall base addresses
  arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
  arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
  arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
  arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
  arm: dts: socfpga: stratix10: update dtsi and dts

Marek Vasut (10):
  fdt: Add another Altera Arria10 clock init compatible
  ARM: socfpga: Put stack at the end of SRAM
  ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
  ARM: socfpga: Clean up Kconfig entries
  ARM: socfpga: Convert to DM serial
  ARM: socfpga: Sync A10 clock manager binding parser
  ARM: socfpga: Sort the DT Makefile
  ARM: socfpga: Synchronize Arria10 DTs
  ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff
  ARM: socfpga: Repair A10 EMAC reset handling

Tien Fong Chee (7):
  ARM: socfpga: Rename the gen5 sdram driver to more specific name
  ARM: socfpga: Add DRAM bank size initialization function


  ARM: socfpga: Add DDR driver for Arria 10


  configs: Add DDR Kconfig support for Arria 10


  ARM: socfpga: Enable SPL memory allocation


  ARM: socfpga: Adding clock frequency info for U-Boot


  ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot





 arch/arm/Kconfig   |  23 +++-


 arch/arm/dts/Makefile  |   8 +-


 arch/arm/dts/socfpga.dtsi  |   2 +


 arch/arm/dts/socfpga_arria10.dtsi  | 594
+++---

 arch/arm/dts/socfpga_arria10_socdk.dtsi| 167
+

 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts   |  44


 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi  | 734
--

 arch/arm/dts/socfpga_stratix10.dtsi|  22 +++-


 arch/arm/dts/socfpga_stratix10_socdk.dts   |   3 +
 arch/arm/mach-socfpga/Kconfig  |  31 +-
 arch/arm/mach-socfpga/Makefile |   7 ++
 arch/arm/mach-socfpga/board.c  |  18 
 arch/arm/mach-socfpga/clock_manager.c  |   4 +-
 arch/arm/mach-socfpga/clock_manager_arria10.c  | 158
+++-
 arch/arm/mach-socfpga/clock_manager_s10.c  | 380
++
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h |  11 ++
 arch/arm/mach-socfpga/include/mach/clock_manager.h |   2 +
 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h |   2 +-
 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 210

 arch/arm/mach-socfpga/include/mach/handoff_s10.h   |  34 ++
 arch/arm/mach-socfpga/include/mach/reset_manager.h |   8 +-
 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 116

 arch/arm/mach-socfpga/include/mach/scu.h   |   4 +-
 arch/arm/mach-socfpga/include/mach/sdram.h | 434
+--
 arch/arm/mach-socfpga/include/mach/sdram_arria10.h |   2 +
 arch/arm/mach-socfpga/include/mach/sdram_gen5.h| 442

 arch/arm/mach-socfpga/include/mach/system_manager.h|   5 +-
 arch/arm/mach-socfpga/include/mach/system_manager_s10.h| 176
+++
 arch/arm/mach-socfpga/misc.c   |  69

 arch/arm/mach-socfpga/misc_arria10.c   |  24 +++--
 arch/arm/mach-socfpga/misc_gen5.c  |  71
+
 arch/arm/mach-socfpga/reset_manager.c  |  13 +++
 arch/arm/mach-socfpga/reset_manager_arria10.c  |   8 --
 arch/arm/mach-socfpga/reset_manager_gen5.c |   9 --
 arch/arm/mach-socfpga/reset_manager_s10.c  | 140

 

Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, May 11, 2018 at 04:20:20AM +0200, Marek Vasut wrote:

> The following changes since commit 6417572efa9107674ec106ae7e388178a92155fc:
> 
>   lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDT
> (2018-05-08 09:07:41 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 792557d1110e13f82ee66dab57c5dca2102744da:
> 
>   spl: socfpga: Generate Arria10 SFP header V1 (2018-05-08 21:08:42 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 6417572efa9107674ec106ae7e388178a92155fc:

  lib/Kconfig: Mark OF_LIBFDT_OVERLAY as depending on OF_LIBFDT
(2018-05-08 09:07:41 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 792557d1110e13f82ee66dab57c5dca2102744da:

  spl: socfpga: Generate Arria10 SFP header V1 (2018-05-08 21:08:42 +0200)


Marek Vasut (5):
  ARM: socfpga: Add boot trampoline for Arria10
  image: socfpga: Add SFP image version 1 definition
  tools: socfpga: Stop using global struct socfpga_image
  tools: socfpga: Add SFP image V1 support
  spl: socfpga: Generate Arria10 SFP header V1

 arch/arm/mach-socfpga/include/mach/boot0.h |   4 +-
 common/image.c |   3 +-
 include/image.h|   3 +-
 scripts/Makefile.spl   |   4 ++
 tools/socfpgaimage.c   | 295
+++-
 5 files changed, 229 insertions(+), 80 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Apr 27, 2018 at 01:11:43AM +0200, Marek Vasut wrote:

> The following changes since commit d2a1f120cf638fd8a149bc8a46aec961c2fb9406:
> 
>   Merge git://git.denx.de/u-boot-rockchip (2018-04-26 07:21:41 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 4ae87a83a64dbd71a14894114481dd92ffed4fdb:
> 
>   arm: socfpga: Fix with the correct polling on bit is set (2018-04-27
> 01:04:08 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit d2a1f120cf638fd8a149bc8a46aec961c2fb9406:

  Merge git://git.denx.de/u-boot-rockchip (2018-04-26 07:21:41 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 4ae87a83a64dbd71a14894114481dd92ffed4fdb:

  arm: socfpga: Fix with the correct polling on bit is set (2018-04-27
01:04:08 +0200)


Tien Fong Chee (1):
  arm: socfpga: Fix with the correct polling on bit is set

 drivers/fpga/socfpga_arria10.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Tue, Apr 17, 2018 at 08:26:50PM +0200, Marek Vasut wrote:

> The following changes since commit 8c0a17be0a632b9a823e14628c42f85c3e64f08e:
> 
>   Prepare v2018.05-rc2 (2018-04-16 20:00:14 -0400)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to f369e1564cf4f81654b8a806fdc325b62b6627dc:
> 
>   configs: socfpga: disable EFI and ISO partition types (2018-04-17
> 11:39:50 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 8c0a17be0a632b9a823e14628c42f85c3e64f08e:

  Prepare v2018.05-rc2 (2018-04-16 20:00:14 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to f369e1564cf4f81654b8a806fdc325b62b6627dc:

  configs: socfpga: disable EFI and ISO partition types (2018-04-17
11:39:50 +0200)


Chin Liang See (1):
  arm: socfpga: stratix10: Add base address map for Statix10 SoC

Dinh Nguyen (9):
  ARM64: stratix10: add reset manager includes
  ARM: dts: stratix10: Add base dtsi and devkit dts
  reset: socfpga: add reset driver for SoCFPGA platform
  configs: socfpga: convert i2c to dm
  arm: dts: socfpga: enables i2c0 in socfpga_de0_nano
  arm: dts: socfpga: add reset property
  i2c: designware: add reset ctrl to driver
  configs: socfpga: add DM_RESET
  configs: socfpga: disable EFI and ISO partition types

 arch/arm/dts/Makefile  |   1 +
 arch/arm/dts/socfpga.dtsi  |  12 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  12 +
 arch/arm/dts/socfpga_stratix10.dtsi| 381

 arch/arm/dts/socfpga_stratix10_socdk.dts   |  92
+
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h |  33 
 configs/socfpga_arria10_defconfig  |   2 +
 configs/socfpga_arria5_defconfig   |   4 ++
 configs/socfpga_cyclone5_defconfig |   4 ++
 configs/socfpga_dbm_soc1_defconfig |   4 ++
 configs/socfpga_de0_nano_soc_defconfig |   4 ++
 configs/socfpga_de10_nano_defconfig|   4 ++
 configs/socfpga_de1_soc_defconfig  |   4 ++
 configs/socfpga_is1_defconfig  |   4 ++
 configs/socfpga_mcvevk_defconfig   |   4 ++
 configs/socfpga_sockit_defconfig   |   4 ++
 configs/socfpga_socrates_defconfig |   4 ++
 configs/socfpga_sr1500_defconfig   |   4 ++
 configs/socfpga_vining_fpga_defconfig  |   3 ++
 drivers/i2c/designware_i2c.c   |  10 
 drivers/reset/Kconfig  |   7 +++
 drivers/reset/Makefile |   1 +
 drivers/reset/reset-socfpga.c  | 105
++
 include/configs/socfpga_common.h   |   2 +
 include/dt-bindings/reset/altr,rst-mgr-s10.h   |  97
+++
 25 files changed, 802 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_stratix10.dtsi
 create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
 create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
 create mode 100644 drivers/reset/reset-socfpga.c
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Thu, Mar 01, 2018 at 06:35:03PM +0100, Marek Vasut wrote:

> The following changes since commit 85447f785ce8c0ab8e40850dc457a1fc833d224f:
> 
>   Merge git://git.denx.de/u-boot-rockchip (2018-02-25 15:39:10 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 92afd7ecf9ffc11971f5a68a5b329927d73586bc:
> 
>   arm: socfpga: cyclone5: Enable Macronix flash support (2018-02-27
> 20:45:45 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 85447f785ce8c0ab8e40850dc457a1fc833d224f:

  Merge git://git.denx.de/u-boot-rockchip (2018-02-25 15:39:10 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 92afd7ecf9ffc11971f5a68a5b329927d73586bc:

  arm: socfpga: cyclone5: Enable Macronix flash support (2018-02-27
20:45:45 +0100)


Chin Liang See (1):
  arm: socfpga: cyclone5: Enable Macronix flash support

Marek Vasut (1):
  ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board

 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts   |  59 +
 arch/arm/mach-socfpga/Kconfig|   7 ++
 board/devboards/dbm-soc1/MAINTAINERS |   4 +
 board/devboards/dbm-soc1/Makefile|   7 ++
 board/devboards/dbm-soc1/qts/iocsr_config.h  | 660
++
 board/devboards/dbm-soc1/qts/pinmux_config.h | 219
+++
 board/devboards/dbm-soc1/qts/pll_config.h|  85 +++
 board/devboards/dbm-soc1/qts/sdram_config.h  | 344
++
 board/devboards/dbm-soc1/socfpga.c   |   6 ++
 configs/socfpga_cyclone5_defconfig   |   1 +
 configs/socfpga_dbm_soc1_defconfig   |  63 ++
 configs/socfpga_sockit_defconfig |   1 +
 configs/socfpga_socrates_defconfig   |   1 +
 include/configs/socfpga_dbm_soc1.h   |  96 +
 15 files changed, 1554 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts
 create mode 100644 board/devboards/dbm-soc1/MAINTAINERS
 create mode 100644 board/devboards/dbm-soc1/Makefile
 create mode 100644 board/devboards/dbm-soc1/qts/iocsr_config.h
 create mode 100644 board/devboards/dbm-soc1/qts/pinmux_config.h
 create mode 100644 board/devboards/dbm-soc1/qts/pll_config.h
 create mode 100644 board/devboards/dbm-soc1/qts/sdram_config.h
 create mode 100644 board/devboards/dbm-soc1/socfpga.c
 create mode 100644 configs/socfpga_dbm_soc1_defconfig
 create mode 100644 include/configs/socfpga_dbm_soc1.h
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Fri, Feb 16, 2018 at 04:59:36PM +0100, Marek Vasut wrote:

> The following changes since commit 0c502b6c176281a096a23803e517b19e964485f1:
> 
>   configs: Resync with savedefconfig (2018-02-14 21:34:50 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to fef4a545b696daf7f27f176aae82fd47b1174aba:
> 
>   arm: socfpga: use imply instead of select where applicable (2018-02-15
> 13:45:16 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit 0c502b6c176281a096a23803e517b19e964485f1:

  configs: Resync with savedefconfig (2018-02-14 21:34:50 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to fef4a545b696daf7f27f176aae82fd47b1174aba:

  arm: socfpga: use imply instead of select where applicable (2018-02-15
13:45:16 +0100)


Lukasz Majewski (1):
  Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA

Simon Goldschmidt (2):
  arm: socfpga: fix qspi flash compatible (add "spi-flash")
  arm: socfpga: use imply instead of select where applicable

 arch/arm/Kconfig   | 7 ---
 arch/arm/dts/socfpga_arria5_socdk.dts  | 2 +-
 arch/arm/dts/socfpga_cyclone5_is1.dts  | 2 +-
 arch/arm/dts/socfpga_cyclone5_socdk.dts| 2 +-
 arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +-
 include/configs/socfpga_arria10_socdk.h| 2 --
 include/configs/socfpga_arria5_socdk.h | 2 --
 include/configs/socfpga_cyclone5_socdk.h   | 2 --
 include/configs/socfpga_de0_nano_soc.h | 2 --
 include/configs/socfpga_de10_nano.h| 2 --
 include/configs/socfpga_de1_soc.h  | 2 --
 include/configs/socfpga_is1.h  | 2 --
 include/configs/socfpga_mcvevk.h   | 2 --
 include/configs/socfpga_sockit.h   | 2 --
 include/configs/socfpga_socrates.h | 2 --
 include/configs/socfpga_sr1500.h   | 2 --
 include/configs/socfpga_vining_fpga.h  | 2 --
 17 files changed, 8 insertions(+), 31 deletions(-)
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Re: [U-Boot] [PULL] u-boot-socfpga/master

[Tom Rini]

On Sat, Jan 27, 2018 at 08:37:48PM +0100, Marek Vasut wrote:

> The following changes since commit fb4413295c765aa8c013650984dc2d908964c81d:
> 
>   Merge git://git.denx.de/u-boot-mmc (2018-01-24 11:28:44 -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-socfpga.git master
> 
> for you to fetch changes up to 92962b3caf17f5e64075601a466b3ac00dbd0a88:
> 
>   ddr: altera: silence PHY calibration unless in debug mode (2018-01-25
> 09:59:37 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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