Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.
Signed-off-by: Horatiu Vultur
---
drivers/net/mscc_eswitch/Makefile | 10 +--
drivers/net/mscc_eswitch/jr2_switch.c | 119 ++
drivers/net/mscc_eswitch/luton_switch.c | 101 +
drivers/net/mscc_eswitch/mscc_miim.c | 28 +++
drivers/net/mscc_eswitch/mscc_miim.h | 14 +++-
drivers/net/mscc_eswitch/ocelot_switch.c | 104 +-
drivers/net/mscc_eswitch/serval_switch.c | 101 +
drivers/net/mscc_eswitch/servalt_switch.c | 102 +
8 files changed, 63 insertions(+), 516 deletions(-)
diff --git a/drivers/net/mscc_eswitch/Makefile
b/drivers/net/mscc_eswitch/Makefile
index 02f39a7..d583fe9 100644
--- a/drivers/net/mscc_eswitch/Makefile
+++ b/drivers/net/mscc_eswitch/Makefile
@@ -1,6 +1,6 @@
-obj-$(CONFIG_MSCC_OCELOT_SWITCH) += ocelot_switch.o mscc_xfer.o
mscc_mac_table.o
-obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o mscc_mac_table.o
-obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o
-obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o
-obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o
mscc_mac_table.o
+obj-$(CONFIG_MSCC_OCELOT_SWITCH) += ocelot_switch.o mscc_xfer.o
mscc_mac_table.o mscc_miim.o
+obj-$(CONFIG_MSCC_LUTON_SWITCH) += luton_switch.o mscc_xfer.o mscc_mac_table.o
mscc_miim.o
+obj-$(CONFIG_MSCC_JR2_SWITCH) += jr2_switch.o mscc_xfer.o mscc_miim.o
+obj-$(CONFIG_MSCC_SERVALT_SWITCH) += servalt_switch.o mscc_xfer.o mscc_miim.o
+obj-$(CONFIG_MSCC_SERVAL_SWITCH) += serval_switch.o mscc_xfer.o
mscc_mac_table.o mscc_miim.o
diff --git a/drivers/net/mscc_eswitch/jr2_switch.c
b/drivers/net/mscc_eswitch/jr2_switch.c
index 60d408f..6655177 100644
--- a/drivers/net/mscc_eswitch/jr2_switch.c
+++ b/drivers/net/mscc_eswitch/jr2_switch.c
@@ -17,20 +17,7 @@
#include
#include "mscc_xfer.h"
-
-#define GCB_MIIM_MII_STATUS0x0
-#defineGCB_MIIM_STAT_BUSY BIT(3)
-#define GCB_MIIM_MII_CMD 0x8
-#defineGCB_MIIM_MII_CMD_SCAN BIT(0)
-#defineGCB_MIIM_MII_CMD_OPR_WRITE BIT(1)
-#defineGCB_MIIM_MII_CMD_OPR_READ BIT(2)
-#defineGCB_MIIM_MII_CMD_SINGLE_SCANBIT(3)
-#defineGCB_MIIM_MII_CMD_WRDATA(x) ((x) << 4)
-#defineGCB_MIIM_MII_CMD_REGAD(x) ((x) << 20)
-#defineGCB_MIIM_MII_CMD_PHYAD(x) ((x) << 25)
-#defineGCB_MIIM_MII_CMD_VLDBIT(31)
-#define GCB_MIIM_DATA 0xC
-#defineGCB_MIIM_DATA_ERROR (0x3 << 16)
+#include "mscc_miim.h"
#define ANA_AC_RAM_CTRL_RAM_INIT 0x94358
#define ANA_AC_STAT_GLOBAL_CFG_PORT_RESET 0x94370
@@ -279,13 +266,6 @@ struct jr2_private {
struct jr2_phy_port_t ports[MAX_PORT];
};
-struct jr2_miim_dev {
- void __iomem *regs;
- phys_addr_t miim_base;
- unsigned long miim_size;
- struct mii_dev *bus;
-};
-
static const unsigned long jr2_regs_qs[] = {
[MSCC_QS_XTR_RD] = 0x8,
[MSCC_QS_XTR_FLUSH] = 0x18,
@@ -294,99 +274,9 @@ static const unsigned long jr2_regs_qs[] = {
[MSCC_QS_INJ_CTRL] = 0x34,
};
-static struct jr2_miim_dev miim[JR2_MIIM_BUS_COUNT];
+static struct mscc_miim_dev miim[JR2_MIIM_BUS_COUNT];
static int miim_count = -1;
-static int mscc_miim_wait_ready(struct jr2_miim_dev *miim)
-{
- unsigned long deadline;
- u32 val;
-
- deadline = timer_get_us() + 25;
-
- do {
- val = readl(miim->regs + GCB_MIIM_MII_STATUS);
- } while (timer_get_us() <= deadline && (val & GCB_MIIM_STAT_BUSY));
-
- if (val & GCB_MIIM_STAT_BUSY)
- return -ETIMEDOUT;
-
- return 0;
-}
-
-static int mscc_miim_read(struct mii_dev *bus, int addr, int devad, int reg)
-{
- struct jr2_miim_dev *miim = (struct jr2_miim_dev *)bus->priv;
- u32 val;
- int ret;
-
- ret = mscc_miim_wait_ready(miim);
- if (ret)
- goto out;
-
- writel(GCB_MIIM_MII_CMD_VLD | GCB_MIIM_MII_CMD_PHYAD(addr) |
- GCB_MIIM_MII_CMD_REGAD(reg) | GCB_MIIM_MII_CMD_OPR_READ,
- miim->regs + GCB_MIIM_MII_CMD);
-
- ret = mscc_miim_wait_ready(miim);
- if (ret)
- goto out;
-
- val = readl(miim->regs + GCB_MIIM_DATA);
- if (val & GCB_MIIM_DATA_ERROR) {
- ret = -EIO;
- goto out;
- }
-
- ret = val & 0x;
- out:
- return ret;
-}
-
-static int mscc_miim_write(struct mii_dev *bus, int addr, int devad, int reg,
- u16 val)
-{
- struct jr2_miim_dev *miim = (struct jr2_miim_dev *)bus->priv;
- int ret;
-
-
