Dear Andreas Wass,
> The driver is ported from a driver that was implemented
> using u-boot 2009.
>
> The driver makes it possible to use a regular application UART as
> the U-Boot output console for MXS CPUs.
>
> Signed-off-by: Andreas Wass
> Cc: Fabio Estevam
> Cc: Marek Vasut
> ---
> arch/arm/include/asm/arch-mxs/regs-uartapp.h | 321
> +++ drivers/serial/Makefile |
> 1 +
> drivers/serial/mxs_auart.c | 118 ++
> drivers/serial/serial.c | 3 +-
> 4 files changed, 442 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/include/asm/arch-mxs/regs-uartapp.h
> create mode 100644 drivers/serial/mxs_auart.c
>
> diff --git a/arch/arm/include/asm/arch-mxs/regs-uartapp.h
> b/arch/arm/include/asm/arch-mxs/regs-uartapp.h new file mode 100644
> index 000..5e871b6
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mxs/regs-uartapp.h
> @@ -0,0 +1,321 @@
> +/*
> + * Freescale MXS UARTAPP Register Definitions
> + *
> + * Copyright (C) 2013 Andreas Wass
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
This is pulled from LTIB, right? Make sure to add proper comment about it (see
the rest of the drivers).
> +#ifndef __ARCH_ARM___MXS_UARTAPP_H
> +#define __ARCH_ARM___MXS_UARTAPP_H
> +
> +#include
> +
> +#ifndef __ASSEMBLY__
> +struct mxs_uartapp_regs {
> + mxs_reg_32(hw_uartapp_ctrl0)
> + mxs_reg_32(hw_uartapp_ctrl1)
> + mxs_reg_32(hw_uartapp_ctrl2)
> + mxs_reg_32(hw_uartapp_linectrl)
> + mxs_reg_32(hw_uartapp_linectrl2)
> + mxs_reg_32(hw_uartapp_intr)
> + mxs_reg_32(hw_uartapp_data)
> + mxs_reg_32(hw_uartapp_stat)
> + mxs_reg_32(hw_uartapp_debug)
> + mxs_reg_32(hw_uartapp_version)
> + mxs_reg_32(hw_uartapp_autobaud)
> +};
> +#endif
> +
> +
> +#define BM_UARTAPP_CTRL0_SFTRST (1 << 31)
> +#define BM_UARTAPP_CTRL0_CLKGATE (1 << 30)
> +#define BM_UARTAPP_CTRL0_RUN (1 << 29)
> +#define BM_UARTAPP_CTRL0_RX_SOURCE (1 << 28)
> +#define BM_UARTAPP_CTRL0_RXTO_ENABLE (1 << 27)
> +#define BP_UARTAPP_CTRL0_RXTIMEOUT (1 << 4)
> +#define BM_UARTAPP_CTRL0_RXTIMEOUT 0x07FF
> +#define BF_UARTAPP_CTRL0_RXTIMEOUT(v) \
> + (((v) << 16) & BM_UARTAPP_CTRL0_RXTIMEOUT)
> +#define BP_UARTAPP_CTRL0_XFER_COUNT 0
> +#define BM_UARTAPP_CTRL0_XFER_COUNT 0x
> +#define BF_UARTAPP_CTRL0_XFER_COUNT(v) \
> + (((v) << BP_UARTAPP_CTRL0_XFER_COUNT) & \
> + BM_UARTAPP_CTRL0_XFER_COUNT)
Can you rework it so the register/mask/offset definition pattern matches the
rest of the files with registers?
- Drop the leading "B[A-Z]_"
- Add _MASK suffix to 'mask' vars (transfor the BM_ vars)
- The BF_ vars are not needed at all
- Add _OFFSET suffix to 'offset' vars (transform the BP_ vars)
It should be a simple 'sed' job.
[...]
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 697f2bb..4c45bfa 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -38,6 +38,7 @@ COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
> COBJS-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
> COBJS-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
> COBJS-$(CONFIG_FSL_LPUART) += serial_lpuart.o
> +COBJS-$(CONFIG_MXS_AUART) += mxs_auart.o
>
> ifndef CONFIG_SPL_BUILD
> COBJS-$(CONFIG_USB_TTY) += usbtty.o
> diff --git a/drivers/serial/mxs_auart.c b/drivers/serial/mxs_auart.c
> new file mode 100644
> index 000..a99dccf
> --- /dev/null
> +++ b/drivers/serial/mxs_auart.c
> @@ -0,0 +1,118 @@
> +/*
> + * Driver to use an application UART as console output for Freescale
> + * MXS devices.
> + *
> + * Copyright (C) 2013 Andreas Wass
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#ifndef CONFIG_MXS_AUART_BASE
> +#error "CONFIG_MXS_AUART_BASE must be set to the base UART to use"
> +#endif
> +
> +#ifndef CONFIG_MXS_AUART_CLK
> +/* At least the i.MX28 always uses a 24MHz clock for AUART */
> +#define CONFIG_MXS_AUART_CLK 2400
> +#endif
Just drop the leading CONFIG_ here and remove the ifdef, the AUART is always
supplied from XTAL , so we dont need a config for this.
> +static struct mxs_uartapp_regs *get_uartapp_registers(void)
> +{
> + return (struct mxs_uartapp_regs*)CONFIG_MXS_AUART_BASE;
> +}
> +
> +/*
> + * Set baud rate. The settings are always 8n1
> + */
> +void mxs_auart_setbrg(void)
> +{
> + u32 div;
> + u32 linectrl = 0;
> + struct mxs_uartapp_regs *regs = get_uartapp_registers();
> +
> + div = (CONFIG_MXS_AUART_CLK * 32) / CONFIG_BAUDRATE;
> + linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(div & 0x3F);
> + linectrl |= BF_UARTAPP_LINECTRL_BAUD_DIVINT(div >> 6);
> + linectrl |= BF_UARTAPP_LINECTRL_WLEN(3);
> + linectrl |= BM_U
