Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-11-28 Thread Philipp Tomsich 
> From: Elaine Zhang 
> 
> Create driver to support all Rockchip SoCs soft reset.
> Example of usage:
> i2c driver:
>   ret = reset_get_by_name(dev, "i2c", &reset_ctl);
>   if (ret) {
>   error("reset_get_by_name() failed: %d\n", ret);
>   }
> 
>   reset_assert(&reset_ctl);
>   udelay(50);
>   reset_deassert(&reset_ctl);
> 
> i2c dts node:
> resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
> reset-names = "p_i2c", "i2c";
> 
> Signed-off-by: Elaine Zhang 
> Signed-off-by: Kever Yang 
> ---
> 
> Changes in v2:
> - fix Kconfig more than 80 length
> - use MACRO for reset bits in one reg
> - use rkclr/set_reg for reg access
> - add rockchip_reset_bind()
> - use dev_read_addr_size() instead of fdtdec_
> 
>  drivers/reset/Kconfig  |   9 +++
>  drivers/reset/Makefile |   1 +
>  drivers/reset/reset-rockchip.c | 133 
> +
>  3 files changed, 143 insertions(+)
>  create mode 100644 drivers/reset/reset-rockchip.c
> 

Acked-by: Philipp Tomsich 
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-11-28 Thread Philipp Tomsich 
> From: Elaine Zhang 
> 
> Create driver to support all Rockchip SoCs soft reset.
> Example of usage:
> i2c driver:
>   ret = reset_get_by_name(dev, "i2c", &reset_ctl);
>   if (ret) {
>   error("reset_get_by_name() failed: %d\n", ret);
>   }
> 
>   reset_assert(&reset_ctl);
>   udelay(50);
>   reset_deassert(&reset_ctl);
> 
> i2c dts node:
> resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
> reset-names = "p_i2c", "i2c";
> 
> Signed-off-by: Elaine Zhang 
> Signed-off-by: Kever Yang 
> Acked-by: Philipp Tomsich 
> ---
> 
> Changes in v2:
> - fix Kconfig more than 80 length
> - use MACRO for reset bits in one reg
> - use rkclr/set_reg for reg access
> - add rockchip_reset_bind()
> - use dev_read_addr_size() instead of fdtdec_
> 
>  drivers/reset/Kconfig  |   9 +++
>  drivers/reset/Makefile |   1 +
>  drivers/reset/reset-rockchip.c | 133 
> +
>  3 files changed, 143 insertions(+)
>  create mode 100644 drivers/reset/reset-rockchip.c
> 

Reviewed-by: Philipp Tomsich 
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-11-28 Thread Dr. Philipp Tomsich 
Kever,

This series causes build-breakage (even outside of the rockchip targets)...
See https://travis-ci.org/ptomsich/u-boot-rockchip/builds/308522589

Please fix and resubmit.
Also: did you test this using buildman or travis?

Thanks,
Philipp.


> On 28 Nov 2017, at 11:06, Philipp Tomsich 
>  wrote:
> 
>> From: Elaine Zhang 
>> 
>> Create driver to support all Rockchip SoCs soft reset.
>> Example of usage:
>> i2c driver:
>>  ret = reset_get_by_name(dev, "i2c", &reset_ctl);
>>  if (ret) {
>>  error("reset_get_by_name() failed: %d\n", ret);
>>  }
>> 
>>  reset_assert(&reset_ctl);
>>  udelay(50);
>>  reset_deassert(&reset_ctl);
>> 
>> i2c dts node:
>> resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
>> reset-names = "p_i2c", "i2c";
>> 
>> Signed-off-by: Elaine Zhang 
>> Signed-off-by: Kever Yang 
>> Acked-by: Philipp Tomsich > >
>> ---
>> 
>> Changes in v2:
>> - fix Kconfig more than 80 length
>> - use MACRO for reset bits in one reg
>> - use rkclr/set_reg for reg access
>> - add rockchip_reset_bind()
>> - use dev_read_addr_size() instead of fdtdec_
>> 
>> drivers/reset/Kconfig  |   9 +++
>> drivers/reset/Makefile |   1 +
>> drivers/reset/reset-rockchip.c | 133 
>> +
>> 3 files changed, 143 insertions(+)
>> create mode 100644 drivers/reset/reset-rockchip.c
>> 
> 
> Reviewed-by: Philipp Tomsich  >
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de 
> https://lists.denx.de/listinfo/u-boot 
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-12-03 Thread Kever Yang 

Philipp,


On 11/29/2017 03:49 AM, Dr. Philipp Tomsich wrote:

Kever,

This series causes build-breakage (even outside of the rockchip 
targets)...

See https://travis-ci.org/ptomsich/u-boot-rockchip/builds/308522589

I'm not understand this error, sometimes I also met this, which depends 
on the build system.
The asm/arch is a link to asm/arch-rockchip which is dynamic generated 
by build system,
is there a option to make sure the build system generate the link before 
build the c source?
+drivers/reset/reset-rockchip.c:11:31: fatal error: asm/arch/hardware.h: 
No such file or directory

Please fix and resubmit.
Also: did you test this using buildman or travis?


I use buildman, but no expperience with travis.

Thanks,
- Kever


Thanks,
Philipp.


On 28 Nov 2017, at 11:06, Philipp Tomsich 
> wrote:


From: Elaine Zhang >


Create driver to support all Rockchip SoCs soft reset.
Example of usage:
i2c driver:
ret = reset_get_by_name(dev, "i2c", &reset_ctl);
if (ret) {
error("reset_get_by_name() failed: %d\n", ret);
}

reset_assert(&reset_ctl);
udelay(50);
reset_deassert(&reset_ctl);

i2c dts node:
resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
reset-names = "p_i2c", "i2c";

Signed-off-by: Elaine Zhang >
Signed-off-by: Kever Yang >
Acked-by: Philipp Tomsich >

---

Changes in v2:
- fix Kconfig more than 80 length
- use MACRO for reset bits in one reg
- use rkclr/set_reg for reg access
- add rockchip_reset_bind()
- use dev_read_addr_size() instead of fdtdec_

drivers/reset/Kconfig  |   9 +++
drivers/reset/Makefile |   1 +
drivers/reset/reset-rockchip.c | 133 
+

3 files changed, 143 insertions(+)
create mode 100644 drivers/reset/reset-rockchip.c



Reviewed-by: Philipp Tomsich >

___
U-Boot mailing list
U-Boot@lists.denx.de 
https://lists.denx.de/listinfo/u-boot




___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-12-08 Thread Dr. Philipp Tomsich 

> On 4 Dec 2017, at 02:04, Kever Yang  wrote:
> 
> Philipp,
> 
> 
> On 11/29/2017 03:49 AM, Dr. Philipp Tomsich wrote:
>> Kever,
>> 
>> This series causes build-breakage (even outside of the rockchip targets)...
>> See https://travis-ci.org/ptomsich/u-boot-rockchip/builds/308522589 
>> 
>> 
> I'm not understand this error, sometimes I also met this, which depends on 
> the build system.
> The asm/arch is a link to asm/arch-rockchip which is dynamic generated by 
> build system,
> is there a option to make sure the build system generate the link before 
> build the c source?
> +drivers/reset/reset-rockchip.c:11:31: fatal error: asm/arch/hardware.h: No 
> such file or directory
> 
>> Please fix and resubmit.
>> Also: did you test this using buildman or travis?
> 
> I use buildman, but no expperience with travis.

This reproduces with buildman for me.
I wonder what difference in our setups causes this not to show up on your end…
Also: why is reset-rockchip.o even being built for the evb-ast2500 target?

ptomsich@android:~/u-boot-rockchip$ tools/buildman/buildman arm11
Building current source for 11 boards (4 threads, 1 job per thread)
   arm:  +   evb-ast2500   
+drivers/reset/reset-rockchip.c:11:31: fatal error: asm/arch/hardware.h: No 
such file or directory
+ #include 
+   ^
+compilation terminated.
+make[3]: *** [drivers/reset/reset-rockchip.o] Error 1
+make[2]: *** [drivers/reset] Error 2
+make[1]: *** [drivers] Error 2
+make: *** [sub-make] Error 2
   arm:  +   rpi   
+arch/arm/dts/bcm2835-rpi-a-plus.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2835-rpi-a.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2835-rpi-b-plus.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2835-rpi-b-rev2.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2835-rpi-b.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2836-rpi-2-b.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
+arch/arm/dts/bcm2837-rpi-3-b.dtb: Warning (phys_property): Missing property 
'#phy-cells' in node /phy or bad phandle (referred from 
/soc/usb@7e98:phys[0])
911 /11 0:00:07  : mx31pdk


> Thanks,
> - Kever
>> 
>> Thanks,
>> Philipp.
>> 
>> 
>>> On 28 Nov 2017, at 11:06, Philipp Tomsich 
>>> >> > wrote:
>>> 
 From: Elaine Zhang >>> >
 
 Create driver to support all Rockchip SoCs soft reset.
 Example of usage:
 i2c driver:
ret = reset_get_by_name(dev, "i2c", &reset_ctl);
if (ret) {
error("reset_get_by_name() failed: %d\n", ret);
}
 
reset_assert(&reset_ctl);
udelay(50);
reset_deassert(&reset_ctl);
 
 i2c dts node:
 resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
 reset-names = "p_i2c", "i2c";
 
 Signed-off-by: Elaine Zhang >>> >
 Signed-off-by: Kever Yang >>> >
 Acked-by: Philipp Tomsich >>> >
 ---
 
 Changes in v2:
 - fix Kconfig more than 80 length
 - use MACRO for reset bits in one reg
 - use rkclr/set_reg for reg access
 - add rockchip_reset_bind()
 - use dev_read_addr_size() instead of fdtdec_
 
 drivers/reset/Kconfig  |   9 +++
 drivers/reset/Makefile |   1 +
 drivers/reset/reset-rockchip.c | 133 
 +
 3 files changed, 143 insertions(+)
 create mode 100644 drivers/reset/reset-rockchip.c
 
>>> 
>>> Reviewed-by: Philipp Tomsich >> >
>>> ___
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de 
>>> https://lists.denx.de/listinfo/u-boot 
>>> 
> 

___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v2, 1/2] drivers/reset: support rockchip reset drivers

2017-12-08 Thread Dr. Philipp Tomsich 

> On 8 Dec 2017, at 14:27, Dr. Philipp Tomsich 
>  wrote:
> 
>> 
>> On 4 Dec 2017, at 02:04, Kever Yang > > wrote:
>> 
>> Philipp,
>> 
>> 
>> On 11/29/2017 03:49 AM, Dr. Philipp Tomsich wrote:
>>> Kever,
>>> 
>>> This series causes build-breakage (even outside of the rockchip targets)...
>>> See https://travis-ci.org/ptomsich/u-boot-rockchip/builds/308522589 
>>> 
>>> 
>> I'm not understand this error, sometimes I also met this, which depends on 
>> the build system.
>> The asm/arch is a link to asm/arch-rockchip which is dynamic generated by 
>> build system,
>> is there a option to make sure the build system generate the link before 
>> build the c source?
>> +drivers/reset/reset-rockchip.c:11:31: fatal error: asm/arch/hardware.h: No 
>> such file or directory
>> 
>>> Please fix and resubmit.
>>> Also: did you test this using buildman or travis?
>> 
>> I use buildman, but no expperience with travis.

You might want to check your buildman configuration, as the following should 
have
been caught by buildman on your end...

The following snippet from the patch

@@ -1221,6 +1227,18 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct 
udevice *dev)
return 0;
 }
 
+static int rk3399_pmuclk_bind(struct udevice *dev)
+{
+   int ret = 0;
+
+   offset = offsetof(struct rk3399_pmucru, pmucru_softrst_con[0]);
+   ret = rockchip_reset_bind(dev, offset, 2);
+   if (ret)
+   debug("Warning: software reset driver bind faile\n");
+
+   return 0;
+}
+

results in the buildman failure (due to offset not being declared):

   aarch64:  +   firefly-rk3399
+drivers/clk/rockchip/clk_rk3399.c: In function 'rk3399_pmuclk_bind':
+drivers/clk/rockchip/clk_rk3399.c:1234:2: error: 'offset' undeclared (first 
use in this function); did you mean 'off_t'?
+  offset = offsetof(struct rk3399_pmucru, pmucru_softrst_con[0]);
+  ^~
+  off_t
+drivers/clk/rockchip/clk_rk3399.c:1234:2: note: each undeclared identifier is 
reported only once for each function it appears in
+make[4]: *** [drivers/clk/rockchip/clk_rk3399.o] Error 1
+make[3]: *** [drivers/clk/rockchip] Error 2
+make[2]: *** [drivers/clk] Error 2
+make[1]: *** [drivers] Error 2
+make: *** [sub-make] Error 2

Thanks,
Philipp.

> 
>> Thanks,
>> - Kever
>>> 
>>> Thanks,
>>> Philipp.
>>> 
>>> 
 On 28 Nov 2017, at 11:06, Philipp Tomsich 
 >>> > wrote:
 
> From: Elaine Zhang  >
> 
> Create driver to support all Rockchip SoCs soft reset.
> Example of usage:
> i2c driver:
>   ret = reset_get_by_name(dev, "i2c", &reset_ctl);
>   if (ret) {
>   error("reset_get_by_name() failed: %d\n", ret);
>   }
> 
>   reset_assert(&reset_ctl);
>   udelay(50);
>   reset_deassert(&reset_ctl);
> 
> i2c dts node:
> resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
> reset-names = "p_i2c", "i2c";
> 
> Signed-off-by: Elaine Zhang  >
> Signed-off-by: Kever Yang  >
> Acked-by: Philipp Tomsich  >
> ---
> 
> Changes in v2:
> - fix Kconfig more than 80 length
> - use MACRO for reset bits in one reg
> - use rkclr/set_reg for reg access
> - add rockchip_reset_bind()
> - use dev_read_addr_size() instead of fdtdec_
> 
> drivers/reset/Kconfig  |   9 +++
> drivers/reset/Makefile |   1 +
> drivers/reset/reset-rockchip.c | 133 
> +
> 3 files changed, 143 insertions(+)
> create mode 100644 drivers/reset/reset-rockchip.c
> 
 
 Reviewed-by: Philipp Tomsich >>> >
 ___
 U-Boot mailing list
 U-Boot@lists.denx.de 
 https://lists.denx.de/listinfo/u-boot 
 
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot