Re: [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support
Hi Chin Liang, On 23.09.2014 12:20, Chin Liang See wrote: Perhaps somebody from Altera with deeper Cadence SPI controller knowledge can take a quick look at this. Could be a pretty obvious mistake that I made while copying / porting the code. Or something else thats simply missing. Any hints are really appretiated! Dear Stefan, I can help to take a look as I was trying to upstream this code previously. But it was later on hold as the SPI driver / framework is under going some revamp. Hopefully I have some bandwidth tomorrow to start looking into Marek and your patches. Thanks! That would be great. I'll continue a bit this afternoon with this task as its a bit pressing right now. I'll let you know if I find the problem. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support
On Mon, 2014-09-22 at 16:28 +0200, ZY - sr wrote: > Hi SoCFPGA-developers! > > I'm currently using Marek's latest SoCFPGA port. This works really great so > far. > Thank you all for this effort. > > What I need additionally is SPI NOR flash support. So I talked a bit with > Marek > and tried to port the Cadence QSPI driver to mainline U-Boot (on-top of > Marek's > patch set of course). This version in these patches now compiles clean. And > detecting of the SPI flash also works good. Reading also seems to be okay. > Only easing and writing have some problems. > > Perhaps somebody from Altera with deeper Cadence SPI controller knowledge > can take a quick look at this. Could be a pretty obvious mistake that I > made while copying / porting the code. Or something else thats simply > missing. > > Any hints are really appretiated! > Dear Stefan, I can help to take a look as I was trying to upstream this code previously. But it was later on hold as the SPI driver / framework is under going some revamp. Hopefully I have some bandwidth tomorrow to start looking into Marek and your patches. Chin Liang > BTW: I'm currently testing this on the EBV SoCrates board. > > Thanks, > Stefan > > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Vince Bridgers > Cc: Marek Vasut > Cc: Pavel Machek ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [WIP PATCH 0/2] arm: socfpga: Add Cadence QSPI support
Hi SoCFPGA-developers! I'm currently using Marek's latest SoCFPGA port. This works really great so far. Thank you all for this effort. What I need additionally is SPI NOR flash support. So I talked a bit with Marek and tried to port the Cadence QSPI driver to mainline U-Boot (on-top of Marek's patch set of course). This version in these patches now compiles clean. And detecting of the SPI flash also works good. Reading also seems to be okay. Only easing and writing have some problems. Perhaps somebody from Altera with deeper Cadence SPI controller knowledge can take a quick look at this. Could be a pretty obvious mistake that I made while copying / porting the code. Or something else thats simply missing. Any hints are really appretiated! BTW: I'm currently testing this on the EBV SoCrates board. Thanks, Stefan Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Marek Vasut Cc: Pavel Machek ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
