Re: [U-Boot] Problem booting on custom board (85xx)
Well we resolved our DDR problem. Turns out the CAS latency on the e500 is defined in half clocks and a value of 5 gives you a CAS latency of 3. Next time I'll read the docs more carefully :) -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alden, Kevin Sent: Thursday, February 24, 2011 6:53 PM To: u-boot@lists.denx.de Subject: Re: [U-Boot] Problem booting on custom board (85xx) I am still fighting this DDR issue. Currently, I am trying to get a DDR test to run in uboot before the relocation occurs (in board_init_f). The problem is that if I write code to access memory mapped to DDR, I see no DDR activity on the logic analyzer. Unfortunately it took me a few days of analyzing memory test results before I realized this :) It seems like any access to DDR memory actually just accesses cache. Looking at the relocate assembly code seems to verify this. It looks like that assembly loads the cache and then flushes the cache to DDR. I tried modifying the DDR TLB entry to disable the cache, but that seems to hang my memory test before it even starts to write to memory. Does anyone know of a way to get simple memory read/write access working inside board_init_f? Thanks, Kevin From: Alden, Kevin Sent: Thursday, February 17, 2011 9:24 AM To: Jared Lewis Cc: u-boot@lists.denx.de Subject: RE: [U-Boot] Problem booting on custom board (85xx) I agree, it does seem like a DDR issue. I commented out the code below because it seemed unnecessary and I was able to get into board_init_r. Problem now is that the first 3 instructions of board_init_r are all 0, so it crashes there. I looked around in memory and this problem is all over the place. Random instructions set to 0. There must be a time value that is just on the edge of working properly. -Kevin -Original Message- From: Jared Lewis [mailto:jared.le...@radisys.com] Sent: Wednesday, February 16, 2011 4:57 PM To: Alden, Kevin Subject: RE: [U-Boot] Problem booting on custom board (85xx) Hello Kevin, In my experience (I've also worked on P2020s with U-Boot), if you can't make it to board_init_r, this is usually a DDR configuration problem. It is hard to say definitively from this output though. Are you using the default RDB project for your DDR settings? Which emulator are you using to incorporate break points? Are you using a BDI or a different emulator? If you're using a BDI, are you configuring the memory controller of the P2020 with your configuration file or are you leaving the initialization to the U-Boot code? Thanks, Jared -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alden, Kevin Sent: Wednesday, February 16, 2011 8:00 AM To: u-boot@lists.denx.de Subject: [U-Boot] Problem booting on custom board (85xx) Hello, I have a custom board based on the Freescale P2020 RDB. I am having trouble getting through the entire boot sequence. Basically, I can't get a breakpoint to hit in board_init_r. I can get a break point in the "in_ram" section of start.s though. This executes all the way to the following loop /* * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ li r0,__fixup_entries@sectoff@l lwz r3,GOT(_FIXUP_TABLE_) cmpwi r0,0 mtctr r0 addi r3,r3,-4 beq4f 3:lwzu ri4,4(r3) lwzuxr0,r4,r11 addr0,r0,r11 stw r10,0(r3) stw r0,0(r4) bdnz 3b Basically, it spins through this loop for a while and eventually I get a TLB exception. Is this just a cut and dry DDR configuration problem, or should I be looking at my Uboot setup? Thanks, Kevin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
Hi Kevin, I have a simple DDR memory test tied to the testdram function that disables cache before testing. I can send you the functions directly if you'd like to give it a try. Jared -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alden, Kevin Sent: Friday, February 25, 2011 3:35 AM To: u-boot@lists.denx.de Subject: Re: [U-Boot] Problem booting on custom board (85xx) I have a USB TAP. I have had a lot of problems with the code warrior software so I sort of gave up on it and tried to use uboot. I wish freescale support was better :) If no one has any suggestions for doing this in the uboot code I guess I will have to go back to fighting with codewarrior. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
Dear Kevin: There should be a config file that came with the CodeWarrior for the USB TAP for the 85xx reference board from Freescale. Here are the steps to get the RAM functional. 1. Study the config file for the reference board and the related schematic. 2. Study the reference manual for the chip with particular attention to DDR register initialization and the reference board config file for the TAP. 3. Correlate differences between the 85xx reference board schematic and your custom board schematic for DDR RAM and adjust the config file DDR register settings. 4. Startup your board with the code tap. A connect should allow you to read/write register on the 85xx chip. 5. Startup your board with the code tap but do not do a connect. Pull down the drop down menu for RAM tests and run the simplest tests, that is read/write one address or a small range of addresses. 6. Adjust your DDR RAM config file init parameters until the RAM passes the CW TAP memories tests. Until you have *some* semblance of RAM that can be read/written, you will not be able to know the DDR RAM initialization settings that U-boot will need in its startup file that does a similar thing that the JTAG does. Charles On Fri, Feb 25, 2011 at 3:35 AM, Alden, Kevin wrote: > I have a USB TAP. I have had a lot of problems with the code warrior > software so I sort of gave up on it and tried to use uboot. I wish > freescale support was better :) > > If no one has any suggestions for doing this in the uboot code I guess I > will have to go back to fighting with codewarrior. > > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > > -- Charles Krinke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
Dear Kevin: I prefer BDI also, but I recently used a TAP with a Freescale P2020 (Dual core 85xx) and once the config file is setup in codewarrior, one can then use its memory test routines. I did find that email to support@freescale.comwas moderately helpful. Sometimes you get someone knowledgable, some times not so. But, ... the TAP can be used to initialize memory and run memory tests, although as Wolfgang says, the BDI is better. Charles On Fri, Feb 25, 2011 at 3:35 AM, Alden, Kevin wrote: > I have a USB TAP. I have had a lot of problems with the code warrior > software so I sort of gave up on it and tried to use uboot. I wish > freescale support was better :) > > If no one has any suggestions for doing this in the uboot code I guess I > will have to go back to fighting with codewarrior. > > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > > -- Charles Krinke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
Dear Kevin, In message <20110225113525.5c04c28...@theia.denx.de> you wrote: > > I have a USB TAP. I have had a lot of problems with the code warrior soft- > ware so I sort of gave up on it and tried to use uboot. I wish freescale > support was better :) > > If no one has any suggestions for doing this in the uboot code I guess I > will have to go back to fighting with codewarrior. The USB tap can be used most efficiently as a door stop (but it's not even perfect in this function). Do yourself a favour and get some real tool, like a BDI3000. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "The one charm of marriage is that it makes a life of deception a neccessity."- Oscar Wilde ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
I have a USB TAP. I have had a lot of problems with the code warrior software so I sort of gave up on it and tried to use uboot. I wish freescale support was better :) If no one has any suggestions for doing this in the uboot code I guess I will have to go back to fighting with codewarrior. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
Dear Kevin: The times I have done this it is with a JTAG device, be it a Windriver Probe, BDI or CodeWarrior USB TAP. In all cases the JTAG emulator allows one to set the various register in the chip, especially the DDR registers to get to where one can have *some semblance* of working memory before attempting u-boot. Have you not got a JTAG emulator for your project?? Charles On Thu, Feb 24, 2011 at 3:53 PM, Alden, Kevin wrote: > I am still fighting this DDR issue. Currently, I am trying to get a DDR > test to run in uboot before the relocation occurs (in board_init_f). The > problem is that if I write code to access memory mapped to DDR, I see no DDR > activity on the logic analyzer. Unfortunately it took me a few days of > analyzing memory test results before I realized this :) > > It seems like any access to DDR memory actually just accesses cache. > Looking at the relocate assembly code seems to verify this. It looks like > that assembly loads the cache and then flushes the cache to DDR. > > I tried modifying the DDR TLB entry to disable the cache, but that seems to > hang my memory test before it even starts to write to memory. Does anyone > know of a way to get simple memory read/write access working inside > board_init_f? > > Thanks, > Kevin > > > > From: Alden, Kevin > Sent: Thursday, February 17, 2011 9:24 AM > To: Jared Lewis > Cc: u-boot@lists.denx.de > Subject: RE: [U-Boot] Problem booting on custom board (85xx) > > I agree, it does seem like a DDR issue. > > I commented out the code below because it seemed unnecessary and I was able > to get into board_init_r. Problem now is that the first 3 instructions of > board_init_r are all 0, so it crashes there. I looked around in memory and > this problem is all over the place. Random instructions set to 0. There > must be a time value that is just on the edge of working properly. > > -Kevin > > -Original Message- > From: Jared Lewis [mailto:jared.le...@radisys.com] > Sent: Wednesday, February 16, 2011 4:57 PM > To: Alden, Kevin > Subject: RE: [U-Boot] Problem booting on custom board (85xx) > > Hello Kevin, > > In my experience (I've also worked on P2020s with U-Boot), if you can't > make it to board_init_r, this is usually a DDR configuration problem. > It is hard to say definitively from this output though. Are you using > the default RDB project for your DDR settings? > > Which emulator are you using to incorporate break points? Are you using > a BDI or a different emulator? If you're using a BDI, are you > configuring the memory controller of the P2020 with your configuration > file or are you leaving the initialization to the U-Boot code? > > Thanks, > Jared > > -Original Message- > From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] > On Behalf Of Alden, Kevin > Sent: Wednesday, February 16, 2011 8:00 AM > To: u-boot@lists.denx.de > Subject: [U-Boot] Problem booting on custom board (85xx) > > Hello, > > I have a custom board based on the Freescale P2020 RDB. I am having > trouble getting through the entire boot sequence. Basically, I can't > get a breakpoint to hit in board_init_r. > > I can get a break point in the "in_ram" section of start.s though. This > executes all the way to the following loop >/* >* Now adjust the fixups and the pointers to the fixups >* in case we need to move ourselves again. >*/ >li r0,__fixup_entries@sectoff@l >lwz r3,GOT(_FIXUP_TABLE_) >cmpwi r0,0 >mtctr r0 >addi r3,r3,-4 >beq4f > 3:lwzu ri4,4(r3) >lwzuxr0,r4,r11 >addr0,r0,r11 >stw r10,0(r3) >stw r0,0(r4) >bdnz 3b > > Basically, it spins through this loop for a while and eventually I get a > TLB exception. Is this just a cut and dry DDR configuration problem, or > should I be looking at my Uboot setup? > > Thanks, > Kevin > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > -- Charles Krinke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
I am still fighting this DDR issue. Currently, I am trying to get a DDR test to run in uboot before the relocation occurs (in board_init_f). The problem is that if I write code to access memory mapped to DDR, I see no DDR activity on the logic analyzer. Unfortunately it took me a few days of analyzing memory test results before I realized this :) It seems like any access to DDR memory actually just accesses cache. Looking at the relocate assembly code seems to verify this. It looks like that assembly loads the cache and then flushes the cache to DDR. I tried modifying the DDR TLB entry to disable the cache, but that seems to hang my memory test before it even starts to write to memory. Does anyone know of a way to get simple memory read/write access working inside board_init_f? Thanks, Kevin From: Alden, Kevin Sent: Thursday, February 17, 2011 9:24 AM To: Jared Lewis Cc: u-boot@lists.denx.de Subject: RE: [U-Boot] Problem booting on custom board (85xx) I agree, it does seem like a DDR issue. I commented out the code below because it seemed unnecessary and I was able to get into board_init_r. Problem now is that the first 3 instructions of board_init_r are all 0, so it crashes there. I looked around in memory and this problem is all over the place. Random instructions set to 0. There must be a time value that is just on the edge of working properly. -Kevin -Original Message- From: Jared Lewis [mailto:jared.le...@radisys.com] Sent: Wednesday, February 16, 2011 4:57 PM To: Alden, Kevin Subject: RE: [U-Boot] Problem booting on custom board (85xx) Hello Kevin, In my experience (I've also worked on P2020s with U-Boot), if you can't make it to board_init_r, this is usually a DDR configuration problem. It is hard to say definitively from this output though. Are you using the default RDB project for your DDR settings? Which emulator are you using to incorporate break points? Are you using a BDI or a different emulator? If you're using a BDI, are you configuring the memory controller of the P2020 with your configuration file or are you leaving the initialization to the U-Boot code? Thanks, Jared -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alden, Kevin Sent: Wednesday, February 16, 2011 8:00 AM To: u-boot@lists.denx.de Subject: [U-Boot] Problem booting on custom board (85xx) Hello, I have a custom board based on the Freescale P2020 RDB. I am having trouble getting through the entire boot sequence. Basically, I can't get a breakpoint to hit in board_init_r. I can get a break point in the "in_ram" section of start.s though. This executes all the way to the following loop /* * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ li r0,__fixup_entries@sectoff@l lwz r3,GOT(_FIXUP_TABLE_) cmpwi r0,0 mtctr r0 addi r3,r3,-4 beq4f 3:lwzu ri4,4(r3) lwzuxr0,r4,r11 addr0,r0,r11 stw r10,0(r3) stw r0,0(r4) bdnz 3b Basically, it spins through this loop for a while and eventually I get a TLB exception. Is this just a cut and dry DDR configuration problem, or should I be looking at my Uboot setup? Thanks, Kevin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
On Wed, Feb 16, 2011 at 10:00 AM, Alden, Kevin wrote: > I have a custom board based on the Freescale P2020 RDB. I am having trouble > getting through the entire boot sequence. Basically, I can't get a > breakpoint to hit in board_init_r. What version of u-boot are you using? Do you have DDR2 or DDR3 on your board? -M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problem booting on custom board (85xx)
I agree, it does seem like a DDR issue. I commented out the code below because it seemed unnecessary and I was able to get into board_init_r. Problem now is that the first 3 instructions of board_init_r are all 0, so it crashes there. I looked around in memory and this problem is all over the place. Random instructions set to 0. There must be a time value that is just on the edge of working properly. -Kevin -Original Message- From: Jared Lewis [mailto:jared.le...@radisys.com] Sent: Wednesday, February 16, 2011 4:57 PM To: Alden, Kevin Subject: RE: [U-Boot] Problem booting on custom board (85xx) Hello Kevin, In my experience (I've also worked on P2020s with U-Boot), if you can't make it to board_init_r, this is usually a DDR configuration problem. It is hard to say definitively from this output though. Are you using the default RDB project for your DDR settings? Which emulator are you using to incorporate break points? Are you using a BDI or a different emulator? If you're using a BDI, are you configuring the memory controller of the P2020 with your configuration file or are you leaving the initialization to the U-Boot code? Thanks, Jared -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alden, Kevin Sent: Wednesday, February 16, 2011 8:00 AM To: u-boot@lists.denx.de Subject: [U-Boot] Problem booting on custom board (85xx) Hello, I have a custom board based on the Freescale P2020 RDB. I am having trouble getting through the entire boot sequence. Basically, I can't get a breakpoint to hit in board_init_r. I can get a break point in the "in_ram" section of start.s though. This executes all the way to the following loop /* * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ li r0,__fixup_entries@sectoff@l lwz r3,GOT(_FIXUP_TABLE_) cmpwi r0,0 mtctr r0 addi r3,r3,-4 beq4f 3:lwzu ri4,4(r3) lwzuxr0,r4,r11 addr0,r0,r11 stw r10,0(r3) stw r0,0(r4) bdnz 3b Basically, it spins through this loop for a while and eventually I get a TLB exception. Is this just a cut and dry DDR configuration problem, or should I be looking at my Uboot setup? Thanks, Kevin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Problem booting on custom board (85xx)
Hello, I have a custom board based on the Freescale P2020 RDB. I am having trouble getting through the entire boot sequence. Basically, I can't get a breakpoint to hit in board_init_r. I can get a break point in the "in_ram" section of start.s though. This executes all the way to the following loop /* * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ li r0,__fixup_entries@sectoff@l lwz r3,GOT(_FIXUP_TABLE_) cmpwi r0,0 mtctr r0 addi r3,r3,-4 beq4f 3:lwzu ri4,4(r3) lwzuxr0,r4,r11 addr0,r0,r11 stw r10,0(r3) stw r0,0(r4) bdnz 3b Basically, it spins through this loop for a while and eventually I get a TLB exception. Is this just a cut and dry DDR configuration problem, or should I be looking at my Uboot setup? Thanks, Kevin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
