Re: [U-Boot] Xilinx Zed Board resets with Master
On 04/03/2014 11:27 AM, Tim Sander wrote: > Hi >>> On 03/27/2014 05:32 PM, Tim Sander wrote: Hi Michal Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek: > Please check and may be you can try u-boot-dtb.elf. Mh, don't know how to create this kind of file? >>> >>> Jagan maybe knows more but I don't think u-boot-dtb.elf is generated. >>> Just u-boot-dtb.bin is generated which should be copied as data file >>> in xmd and not sure if binary file can be directly used for bootgen. If adding the dtb file in the boot.bif file is not the right way and no elf file with dtb is generated: What is the right way to generate an image for use with the SD-Card? >>> >>> you can just use static u-boot configuration. >> >> I assume you mean static configuration a config with OF_CONTROL disabled. >> Ok, i have tried to boot that with bootgen. That does not work. >> Loading that into memory and booting it from within the debugger works >> though. In both cases with or without OF_CONTROL enabled. >> >>> I have never tried to add dtb as partition to boot.bin. >>> If you want to use this dtb driver u-boot I would suggest you >>> to look at u-boot SPL which should be able to handle binary formats >>> with dtbs. >> >> So my main focus is to test CONFIG_ARMV7_NONSEC to boot linux in >> normal mode. I wanted to test recent mainline with that. So focusing on >> u-boot SPL is to far off my targets. So i am happy with hardware debugger >> loadeing for the time beeing. >> >> Getting back to CONFIG_ARMV7_NONSEC. This is unfortunatly not working with >> the Zynq. Currently the board switches to monitor mode but when the u-boot >> switches to normal mode it jumps to PC:0xc (LR:0x10) which seems like a >> data abort exeption or some other secure mode violation exception? >> Is there a good way to find out what happened? I am currently stuck with >> this and my local FAE has also no idea. Attached is a patch which at least >> works until the return from the monitor mode. > Just a small information: I can boot a OF_CONTROL on a RevC Zynq > Board but not Rev. D. So i can at least confirm that a board with RevC boots > a > mainline u-boot with OF_CONTROL disabled. I have no idea why the bootgen for > the Rev. D board fails even if i have replaced the bitstream for the non eng. > sample FPGA. But at least that also works when loaded with an HW-Debugger. Interesting. Please use xilinx forums then can help you. M ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi > > On 03/27/2014 05:32 PM, Tim Sander wrote: > > > Hi Michal > > > > > > Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek: > > >> Please check and may be you can try u-boot-dtb.elf. > > > > > > Mh, don't know how to create this kind of file? > > > > Jagan maybe knows more but I don't think u-boot-dtb.elf is generated. > > Just u-boot-dtb.bin is generated which should be copied as data file > > in xmd and not sure if binary file can be directly used for bootgen. > > > > > > If adding the dtb file in the boot.bif file is not the right way and no > > > elf file with dtb is generated: What is the right way to generate an > > > image for use with the SD-Card? > > > > you can just use static u-boot configuration. > > I assume you mean static configuration a config with OF_CONTROL disabled. > Ok, i have tried to boot that with bootgen. That does not work. > Loading that into memory and booting it from within the debugger works > though. In both cases with or without OF_CONTROL enabled. > > > I have never tried to add dtb as partition to boot.bin. > > If you want to use this dtb driver u-boot I would suggest you > > to look at u-boot SPL which should be able to handle binary formats > > with dtbs. > > So my main focus is to test CONFIG_ARMV7_NONSEC to boot linux in > normal mode. I wanted to test recent mainline with that. So focusing on > u-boot SPL is to far off my targets. So i am happy with hardware debugger > loadeing for the time beeing. > > Getting back to CONFIG_ARMV7_NONSEC. This is unfortunatly not working with > the Zynq. Currently the board switches to monitor mode but when the u-boot > switches to normal mode it jumps to PC:0xc (LR:0x10) which seems like a > data abort exeption or some other secure mode violation exception? > Is there a good way to find out what happened? I am currently stuck with > this and my local FAE has also no idea. Attached is a patch which at least > works until the return from the monitor mode. Just a small information: I can boot a OF_CONTROL on a RevC Zynq Board but not Rev. D. So i can at least confirm that a board with RevC boots a mainline u-boot with OF_CONTROL disabled. I have no idea why the bootgen for the Rev. D board fails even if i have replaced the bitstream for the non eng. sample FPGA. But at least that also works when loaded with an HW-Debugger. Best regards Tim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Tim, On 03/28/2014 04:20 PM, Tim Sander wrote: > Hi Michal >> On 03/27/2014 05:32 PM, Tim Sander wrote: >>> Hi Michal >>> >>> Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek: Please check and may be you can try u-boot-dtb.elf. >>> >>> Mh, don't know how to create this kind of file? >> >> Jagan maybe knows more but I don't think u-boot-dtb.elf is generated. >> Just u-boot-dtb.bin is generated which should be copied as data file >> in xmd and not sure if binary file can be directly used for bootgen. >>> >>> If adding the dtb file in the boot.bif file is not the right way and no >>> elf file with dtb is generated: What is the right way to generate an >>> image for use with the SD-Card? >> >> you can just use static u-boot configuration. > I assume you mean static configuration a config with OF_CONTROL disabled. > Ok, i have tried to boot that with bootgen. That does not work. > Loading that into memory and booting it from within the debugger works > though. In both cases with or without OF_CONTROL enabled. ok. I am not using bootgen that's why good that you have at least one config which is working. Feel free to use xilinx u-boot from github which is synchronized with mainline code. >> I have never tried to add dtb as partition to boot.bin. >> If you want to use this dtb driver u-boot I would suggest you >> to look at u-boot SPL which should be able to handle binary formats >> with dtbs. > So my main focus is to test CONFIG_ARMV7_NONSEC to boot linux in > normal mode. I wanted to test recent mainline with that. So focusing on > u-boot SPL is to far off my targets. So i am happy with hardware debugger > loadeing for the time beeing. ok. > Getting back to CONFIG_ARMV7_NONSEC. This is unfortunatly not working with > the > Zynq. Currently the board switches to monitor mode but when the u-boot > switches to normal mode it jumps to PC:0xc (LR:0x10) which seems like a data > abort exeption or some other secure mode violation exception? > Is there a good way to find out what happened? I am currently stuck with this > and my local FAE has also no idea. Attached is a patch which at least works > until the return from the monitor mode. yes I know. I have got an email from you some days ago but haven't answered it yet. I haven't played with it but at least I am aware about the code which is working on zynq. Look at this repo https://github.com/serngawy/OpenVirtualization it is secure monitor code which does exactly what you have described switching from monitor mode to normal mode. Albert could know more about proper u-boot behaviour how this should be handled. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Michal
> On 03/27/2014 05:32 PM, Tim Sander wrote:
> > Hi Michal
> >
> > Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek:
> >> Please check and may be you can try u-boot-dtb.elf.
> >
> > Mh, don't know how to create this kind of file?
>
> Jagan maybe knows more but I don't think u-boot-dtb.elf is generated.
> Just u-boot-dtb.bin is generated which should be copied as data file
> in xmd and not sure if binary file can be directly used for bootgen.
> >
> > If adding the dtb file in the boot.bif file is not the right way and no
> > elf file with dtb is generated: What is the right way to generate an
> > image for use with the SD-Card?
>
> you can just use static u-boot configuration.
I assume you mean static configuration a config with OF_CONTROL disabled.
Ok, i have tried to boot that with bootgen. That does not work.
Loading that into memory and booting it from within the debugger works
though. In both cases with or without OF_CONTROL enabled.
> I have never tried to add dtb as partition to boot.bin.
> If you want to use this dtb driver u-boot I would suggest you
> to look at u-boot SPL which should be able to handle binary formats
> with dtbs.
So my main focus is to test CONFIG_ARMV7_NONSEC to boot linux in
normal mode. I wanted to test recent mainline with that. So focusing on
u-boot SPL is to far off my targets. So i am happy with hardware debugger
loadeing for the time beeing.
Getting back to CONFIG_ARMV7_NONSEC. This is unfortunatly not working with the
Zynq. Currently the board switches to monitor mode but when the u-boot
switches to normal mode it jumps to PC:0xc (LR:0x10) which seems like a data
abort exeption or some other secure mode violation exception?
Is there a good way to find out what happened? I am currently stuck with this
and my local FAE has also no idea. Attached is a patch which at least works
until the return from the monitor mode.
Best regards
Tim
>From bdbb2bcb70226ca5ad0873b3235f668d5d06a1df Mon Sep 17 00:00:00 2001
From: Tim Sander
Date: Fri, 28 Mar 2014 16:11:22 +0100
Subject: [PATCH] experimental TrustZone for Zynq (defunct)
---
arch/arm/cpu/armv7/nonsec_virt.S | 18 +-
arch/arm/cpu/armv7/virt-v7.c | 20 ++-
arch/arm/cpu/u-boot.lds |1 +
arch/arm/dts/zynq-zed.dts| 337 +-
arch/arm/include/asm/armv7.h |8 +-
board/xilinx/zynq/board.c| 17 ++
include/configs/zynq-common.h|4 +-
include/configs/zynq_zed.h |7 +
8 files changed, 395 insertions(+), 17 deletions(-)
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 6367e09..c0d406c 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -52,7 +52,15 @@ _secure_monitor:
mcreq p15, 4, r0, c12, c0, 0 @ write HVBAR
#endif
- movs pc, lr@ return to non-secure SVC
+ @ Reset CNTVOFF to 0 before leaving monitor mode
+ mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
+ ands r0, r0, #CPUID_ARM_GENTIMER_MASK @ test arch timer bits
+ movne r0, #0
+ mcrrne p15, 4, r0, r0, c14 @ Reset CNTVOFF to zero
+
+ mov sp,r2 @ restore stack pointer from caller (eq to secure mode stack)
+
+ movs pc, lr @ return to non-secure SVC
_hyp_trap:
mrs lr, elr_hyp @ for older asm: .byte 0x00, 0xe3, 0x0e, 0xe1
@@ -152,11 +160,19 @@ ENTRY(_nonsec_init)
mrc p15, 0, ip, c12, c0, 0 @ save secure copy of VBAR
+ stmfd sp!,{r2} @ save r2 as it is clobbered in monitor mode
+ mov r1,sp
isb
smc #0@ call into MONITOR mode
mcr p15, 0, ip, c12, c0, 0 @ write non-secure copy of VBAR
+ ldr r1,=0xC5087A@ this is the value the register has in secure mode (ALIGNMENT!)
+ mcr p15,0,r1,c1,c0,0 @ write control register
+
+ ldr r1,=0x
+ mcr p15,0,r1,c3,c0,0 @ write Domain Access Control Register
+
mov r1, #1
str r1, [r3, #GICC_CTLR] @ enable non-secure CPU i/f
add r2, r2, #GIC_DIST_OFFSET
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 2cd604f..b540dbc 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -46,7 +46,9 @@ static unsigned long get_gicd_base_address(void)
* which we know only for sure for those two CPUs.
*/
asm("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
+ debug("midr: %x masked:%x\n",midr,midr & MIDR_PRIMARY_PART_MASK);
switch (midr & MIDR_PRIMARY_PART_MASK) {
+ case MIDR_CORTEX_A9_R0P0:
case MIDR_CORTEX_A9_R0P1:
case MIDR_CORTEX_A15_R0P0:
case MIDR_CORTEX_A7_R0P0:
@@ -59,6 +61,7 @@ static unsigned long get_gicd_base_address(void)
/* get the GIC base address from the CBAR register */
asm("mrc p15, 4, %0, c15, c0, 0\n" : "=r" (periphbase));
+ debug("periphbase: %x working_address:%x\n",periphbase, (periphbase & CBAR_MASK)+GIC_DIST_OFFSET);
/* the PERIPHBASE can be mapped above 4 GB (lower 8 bits used to
* encode this). Bail out here since we cannot access this without
* enabling paging.
@@
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Tim, On 03/27/2014 05:32 PM, Tim Sander wrote: > Hi Michal > Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek: >> Please check and may be you can try u-boot-dtb.elf. > > Mh, don't know how to create this kind of file? Jagan maybe knows more but I don't think u-boot-dtb.elf is generated. Just u-boot-dtb.bin is generated which should be copied as data file in xmd and not sure if binary file can be directly used for bootgen. > If adding the dtb file in the boot.bif file is not the right way and no elf > file > with dtb is generated: What is the right way to generate an image for use > with > the SD-Card? you can just use static u-boot configuration. I have never tried to add dtb as partition to boot.bin. If you want to use this dtb driver u-boot I would suggest you to look at u-boot SPL which should be able to handle binary formats with dtbs. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Michal Am Donnerstag, 27. März 2014, 14:17:41 schrieb Michal Simek: > Please check and may be you can try u-boot-dtb.elf. > >>> > >>> Mh, don't know how to create this kind of file? > >> > >> Jagan maybe knows more but I don't think u-boot-dtb.elf is generated. > >> Just u-boot-dtb.bin is generated which should be copied as data file > >> in xmd and not sure if binary file can be directly used for bootgen. If adding the dtb file in the boot.bif file is not the right way and no elf file with dtb is generated: What is the right way to generate an image for use with the SD-Card? Best regards Tim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Xilinx Zed Board resets with Master
Please check and may be you can try u-boot-dtb.elf.
>>> Mh, don't know how to create this kind of file?
>>
>> Jagan maybe knows more but I don't think u-boot-dtb.elf is generated.
>> Just u-boot-dtb.bin is generated which should be copied as data file
>> in xmd and not sure if binary file can be directly used for bootgen.
>
> IMHO, there is a file u-boot-dtb (elf) generated when we build FDT u-boot
> I thought that can have a facility boot using BOOT.BIN.
>
> I guess it's good to have a try.
Here is how files are generated.
[u-boot]$ make -j8 V=1 | grep u-boot\.dtb
cp dts/dt.dtb u-boot.dtb
cat u-boot.bin dts/dt.dtb > u-boot-dtb.bin
u-boot.dtb is just dtb file.
[u-boot]$ ls -la u-boot*
-rwxr-xr-x 1 monstr monstr 1525805 2014-03-27 14:13 u-boot
-rw-r--r-- 1 monstr monstr 270608 2014-03-27 14:13 u-boot.bin
-rw-r--r-- 1 monstr monstr 11860 2014-03-27 13:00 u-boot.dtb
-rw-r--r-- 1 monstr monstr 282468 2014-03-27 14:13 u-boot-dtb.bin
-rw-r--r-- 1 monstr monstr 270672 2014-03-27 14:13 u-boot.img
-rw-r--r-- 1 monstr monstr1179 2014-03-27 12:55 u-boot.lds
-rw-r--r-- 1 monstr monstr 267756 2014-03-27 14:13 u-boot.map
-rw-r--r-- 1 monstr monstr 811906 2014-03-27 14:13 u-boot.srec
[u-boot]$ dtc -O dts -I dtb u-boot.dtb | head -n 20
/dts-v1/;
/ {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = "/amba@0/ps7-ethernet@e000b000";
serial0 = "/amba@0/serial@e0001000";
spi0 = "/amba@0/ps7-qspi@e000d000";
};
chosen {
bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
linux,stdout-path = "/amba@0/serial@e0001000";
};
cpus {
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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Description: OpenPGP digital signature
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Re: [U-Boot] Xilinx Zed Board resets with Master
On Thu, Mar 27, 2014 at 5:31 PM, Michal Simek wrote:
> Hi Tim,
>
> On 03/27/2014 11:33 AM, Tim Sander wrote:
>> Hi Michael, Jagan
>>
>> Thanks for your replies.
>>> On Thu, Mar 27, 2014 at 1:51 PM, Michal Simek wrote:
Hi,
On 03/27/2014 09:08 AM, Tim Sander wrote:
> Hi
>
> As i have seen that the Xilinx support has entered master i just tried to
> boot it on a Xilinx Zynx Zedboard Rev. D. The build works with the
> xilinx git tree so i am pretty confident that its not some issues with
> bootgen or the embedded fpga image.
>
> The board loads the fpga which can be seen by the blue "done" led of the
> ZedBoard. But then the LED turns off and about after a second or so it
> just
> lights up shortly again to turn off again. So it seems as if the board is
> somehow caught in a reboot loop. Any ideas what might be wrong?
>
> I am building with:
> export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> make clean
> make distclean
> make zynq_zed_config
> make
>
> The BOOT.BIN is build
> xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
>
> And u-boot.bif looks like that:
> the_ROM_image:
> {
>
> [bootloader]zynq_fsbl_0.elf
>
> system.bit
> u-boot.elf
>> I have added the zynq-zed.dtb file here, as i was not sure where else to put
>> it...
>
> I have just tested on zedboard rev-C I have here
>
> Head u-boot commit commit
> commit 2c072c958bb544c72f0e848375803dbd6971f022
> Author: Simon Glass
> Date: Thu Feb 27 13:26:25 2014 -0700
>
> sandbox: config: Enable cros_ec emulation and related items
>
> Enable the Chrome OS EC emulation for sandbox along with LCD, sound
> expanded GPIOs and a few other options to make this work correctly.
>
> Reviewed-by: Simon Glass
> Tested-by: Che-Liang Chiou
> Signed-off-by: Simon Glass
>
> Copy attached file over this one
> arch/arm/dts/zynq-zed.dts
>
> export ARCH=arm
> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> make zynq_zed_config
> make -j
>
> run xmd
>
> connect arm hw
> dow zynq_fsbl.elf
> run
> stop
> dow -data u-boot-dtb.bin 0x400
> rwr pc 0x400
> con
> exit
>
> And you should see something like this on your console
>
> U-Boot 2014.04-rc2-00061-g2c072c9-dirty (Mar 27 2014 - 12:47:39)
>
> I2C: ready
> Memory: ECC disabled
> DRAM: 512 MiB
> MMC: zynq_sdhci: 0
> Using default environment
>
> In:serial
> Out: serial
> Err: serial
> Model: Xilinx Zynq
> Net: Gem.e000b000
> Warning: failed to set MAC address
>
> Hit any key to stop autoboot: 0
> zynq-uboot>
>
>
>
> }
mainline u-boot support is using configuration based on dts files
(OF_CONTROL) And because our DTSes are almost empty in mainline I expect
you are not able to see anything from u-boot.
I recommend you to copy dts file from xilinx kernel and then use
u-boot-dtb version.
>> Ok i tried this, and now the reboot loops seems to be gone. The blue "done"
>> led now only switches "on" one time and stays on. Unfortunatly i still don't
>> see anything on the console in this case.
>> I can see that the registers
>> lr 0x1d70 0x1d70
>> pc 0xcf6c 0xcf6c
>> But according to the u-boot map there is nothing and i am not sure how to
>> get information about the relocation without u-boot command line.
>>
Or the second option is to remove OF_CONTROL from
zynq-common.h file and then I hope you should be able to see something on
console.
>> Removeing OF_CONTROL gives a compile error:
>> xilinx/zynq/u-boot-xlnx/arch/arm/lib/board.c:633: undefined reference to
>> `checkboard'
>> lib/built-in.o: In function `rsa_verify_with_keynode':
>> xilinx/zynq/u-boot-xlnx/lib/rsa/rsa-verify.c:284: undefined reference to
>> `fdtdec_get_int'
>
> More things has changed recently.
> If you do these changes then non DT configuration is performed.
>
> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> index 485a5e4..559ef3d 100644
> --- a/board/xilinx/zynq/board.c
> +++ b/board/xilinx/zynq/board.c
> @@ -62,6 +62,11 @@ int board_init(void)
> return 0;
> }
>
> +int checkboard(void)
> +{
> + return 0;
> +}
> +
> int board_late_init(void)
> {
> switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index 731e69b..8a63cd5 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -200,14 +200,8 @@
> #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
>
> /* FDT support */
> -#define CONFIG_OF_CONTROL
> -#define CONFIG_OF_SEPARATE
> #define CONFIG_DISPLAY_BOARDINFO_LATE
>
> -/* RSA support */
> -#define CONFIG_FIT_SIGNATURE
> -#define CONFIG_RSA
> -
> /* Extend size of kernel image for uncompression */
> #define CONFIG_SYS_BOOTM_LEN (20 * 1024
Re: [U-Boot] Xilinx Zed Board resets with Master
On 03/27/2014 01:01 PM, Michal Simek wrote:
> Hi Tim,
>
> On 03/27/2014 11:33 AM, Tim Sander wrote:
>> Hi Michael, Jagan
>>
>> Thanks for your replies.
>>> On Thu, Mar 27, 2014 at 1:51 PM, Michal Simek wrote:
Hi,
On 03/27/2014 09:08 AM, Tim Sander wrote:
> Hi
>
> As i have seen that the Xilinx support has entered master i just tried to
> boot it on a Xilinx Zynx Zedboard Rev. D. The build works with the
> xilinx git tree so i am pretty confident that its not some issues with
> bootgen or the embedded fpga image.
>
> The board loads the fpga which can be seen by the blue "done" led of the
> ZedBoard. But then the LED turns off and about after a second or so it
> just
> lights up shortly again to turn off again. So it seems as if the board is
> somehow caught in a reboot loop. Any ideas what might be wrong?
>
> I am building with:
> export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> make clean
> make distclean
> make zynq_zed_config
> make
>
> The BOOT.BIN is build
> xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
>
> And u-boot.bif looks like that:
> the_ROM_image:
> {
>
> [bootloader]zynq_fsbl_0.elf
>
> system.bit
> u-boot.elf
>> I have added the zynq-zed.dtb file here, as i was not sure where else to put
>> it...
>
> I have just tested on zedboard rev-C I have here
>
> Head u-boot commit commit
> commit 2c072c958bb544c72f0e848375803dbd6971f022
> Author: Simon Glass
> Date: Thu Feb 27 13:26:25 2014 -0700
>
> sandbox: config: Enable cros_ec emulation and related items
>
> Enable the Chrome OS EC emulation for sandbox along with LCD, sound
> expanded GPIOs and a few other options to make this work correctly.
>
> Reviewed-by: Simon Glass
> Tested-by: Che-Liang Chiou
> Signed-off-by: Simon Glass
>
> Copy attached file over this one
> arch/arm/dts/zynq-zed.dts
>
> export ARCH=arm
> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> make zynq_zed_config
> make -j
>
> run xmd
>
> connect arm hw
> dow zynq_fsbl.elf
> run
> stop
> dow -data u-boot-dtb.bin 0x400
> rwr pc 0x400
> con
> exit
>
> And you should see something like this on your console
>
> U-Boot 2014.04-rc2-00061-g2c072c9-dirty (Mar 27 2014 - 12:47:39)
>
> I2C: ready
> Memory: ECC disabled
> DRAM: 512 MiB
> MMC: zynq_sdhci: 0
> Using default environment
>
> In:serial
> Out: serial
> Err: serial
> Model: Xilinx Zynq
> Net: Gem.e000b000
> Warning: failed to set MAC address
>
> Hit any key to stop autoboot: 0
> zynq-uboot>
>
>
>
> }
mainline u-boot support is using configuration based on dts files
(OF_CONTROL) And because our DTSes are almost empty in mainline I expect
you are not able to see anything from u-boot.
I recommend you to copy dts file from xilinx kernel and then use
u-boot-dtb version.
>> Ok i tried this, and now the reboot loops seems to be gone. The blue "done"
>> led now only switches "on" one time and stays on. Unfortunatly i still don't
>> see anything on the console in this case.
>> I can see that the registers
>> lr 0x1d70 0x1d70
>> pc 0xcf6c 0xcf6c
>> But according to the u-boot map there is nothing and i am not sure how to
>> get information about the relocation without u-boot command line.
>>
Or the second option is to remove OF_CONTROL from
zynq-common.h file and then I hope you should be able to see something on
console.
>> Removeing OF_CONTROL gives a compile error:
>> xilinx/zynq/u-boot-xlnx/arch/arm/lib/board.c:633: undefined reference to
>> `checkboard'
>> lib/built-in.o: In function `rsa_verify_with_keynode':
>> xilinx/zynq/u-boot-xlnx/lib/rsa/rsa-verify.c:284: undefined reference to
>> `fdtdec_get_int'
>
> More things has changed recently.
> If you do these changes then non DT configuration is performed.
>
> diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
> index 485a5e4..559ef3d 100644
> --- a/board/xilinx/zynq/board.c
> +++ b/board/xilinx/zynq/board.c
> @@ -62,6 +62,11 @@ int board_init(void)
> return 0;
> }
>
> +int checkboard(void)
> +{
> + return 0;
> +}
> +
> int board_late_init(void)
> {
> switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index 731e69b..8a63cd5 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -200,14 +200,8 @@
> #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
>
> /* FDT support */
> -#define CONFIG_OF_CONTROL
> -#define CONFIG_OF_SEPARATE
> #define CONFIG_DISPLAY_BOARDINFO_LATE
>
> -/* RSA support */
> -#define CONFIG_FIT_SIGNATURE
> -#define CONFIG_RSA
> -
> /* Extend size of kernel image for uncompression */
> #define CONFIG_SYS_BOOTM
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Tim,
On 03/27/2014 11:33 AM, Tim Sander wrote:
> Hi Michael, Jagan
>
> Thanks for your replies.
>> On Thu, Mar 27, 2014 at 1:51 PM, Michal Simek wrote:
>>> Hi,
>>>
>>> On 03/27/2014 09:08 AM, Tim Sander wrote:
Hi
As i have seen that the Xilinx support has entered master i just tried to
boot it on a Xilinx Zynx Zedboard Rev. D. The build works with the
xilinx git tree so i am pretty confident that its not some issues with
bootgen or the embedded fpga image.
The board loads the fpga which can be seen by the blue "done" led of the
ZedBoard. But then the LED turns off and about after a second or so it
just
lights up shortly again to turn off again. So it seems as if the board is
somehow caught in a reboot loop. Any ideas what might be wrong?
I am building with:
export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
make clean
make distclean
make zynq_zed_config
make
The BOOT.BIN is build
xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
And u-boot.bif looks like that:
the_ROM_image:
{
[bootloader]zynq_fsbl_0.elf
system.bit
u-boot.elf
> I have added the zynq-zed.dtb file here, as i was not sure where else to put
> it...
I have just tested on zedboard rev-C I have here
Head u-boot commit commit
commit 2c072c958bb544c72f0e848375803dbd6971f022
Author: Simon Glass
Date: Thu Feb 27 13:26:25 2014 -0700
sandbox: config: Enable cros_ec emulation and related items
Enable the Chrome OS EC emulation for sandbox along with LCD, sound
expanded GPIOs and a few other options to make this work correctly.
Reviewed-by: Simon Glass
Tested-by: Che-Liang Chiou
Signed-off-by: Simon Glass
Copy attached file over this one
arch/arm/dts/zynq-zed.dts
export ARCH=arm
export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
make zynq_zed_config
make -j
run xmd
connect arm hw
dow zynq_fsbl.elf
run
stop
dow -data u-boot-dtb.bin 0x400
rwr pc 0x400
con
exit
And you should see something like this on your console
U-Boot 2014.04-rc2-00061-g2c072c9-dirty (Mar 27 2014 - 12:47:39)
I2C: ready
Memory: ECC disabled
DRAM: 512 MiB
MMC: zynq_sdhci: 0
Using default environment
In:serial
Out: serial
Err: serial
Model: Xilinx Zynq
Net: Gem.e000b000
Warning: failed to set MAC address
Hit any key to stop autoboot: 0
zynq-uboot>
}
>>>
>>> mainline u-boot support is using configuration based on dts files
>>> (OF_CONTROL) And because our DTSes are almost empty in mainline I expect
>>> you are not able to see anything from u-boot.
>>> I recommend you to copy dts file from xilinx kernel and then use
>>> u-boot-dtb version.
> Ok i tried this, and now the reboot loops seems to be gone. The blue "done"
> led now only switches "on" one time and stays on. Unfortunatly i still don't
> see anything on the console in this case.
> I can see that the registers
> lr 0x1d70 0x1d70
> pc 0xcf6c 0xcf6c
> But according to the u-boot map there is nothing and i am not sure how to
> get information about the relocation without u-boot command line.
>
>>> Or the second option is to remove OF_CONTROL from
>>> zynq-common.h file and then I hope you should be able to see something on
>>> console.
> Removeing OF_CONTROL gives a compile error:
> xilinx/zynq/u-boot-xlnx/arch/arm/lib/board.c:633: undefined reference to
> `checkboard'
> lib/built-in.o: In function `rsa_verify_with_keynode':
> xilinx/zynq/u-boot-xlnx/lib/rsa/rsa-verify.c:284: undefined reference to
> `fdtdec_get_int'
More things has changed recently.
If you do these changes then non DT configuration is performed.
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 485a5e4..559ef3d 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -62,6 +62,11 @@ int board_init(void)
return 0;
}
+int checkboard(void)
+{
+ return 0;
+}
+
int board_late_init(void)
{
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 731e69b..8a63cd5 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -200,14 +200,8 @@
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
/* FDT support */
-#define CONFIG_OF_CONTROL
-#define CONFIG_OF_SEPARATE
#define CONFIG_DISPLAY_BOARDINFO_LATE
-/* RSA support */
-#define CONFIG_FIT_SIGNATURE
-#define CONFIG_RSA
-
/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN (20 * 1024 * 1024)
Then you can use u-boot also for boot.bin (bootgen) generation.
load fsbl as above and then
dow u-boot
run
exit
>> If you use ML, as Michal said - u-boot operates through FDT support.
>> But I guess even if you use u-boot.elf with FDT enabled, you must get
>> the below erro
Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Michael, Jagan
Thanks for your replies.
> On Thu, Mar 27, 2014 at 1:51 PM, Michal Simek wrote:
> > Hi,
> >
> > On 03/27/2014 09:08 AM, Tim Sander wrote:
> >> Hi
> >>
> >> As i have seen that the Xilinx support has entered master i just tried to
> >> boot it on a Xilinx Zynx Zedboard Rev. D. The build works with the
> >> xilinx git tree so i am pretty confident that its not some issues with
> >> bootgen or the embedded fpga image.
> >>
> >> The board loads the fpga which can be seen by the blue "done" led of the
> >> ZedBoard. But then the LED turns off and about after a second or so it
> >> just
> >> lights up shortly again to turn off again. So it seems as if the board is
> >> somehow caught in a reboot loop. Any ideas what might be wrong?
> >>
> >> I am building with:
> >> export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
> >> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> >> make clean
> >> make distclean
> >> make zynq_zed_config
> >> make
> >>
> >> The BOOT.BIN is build
> >> xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
> >>
> >> And u-boot.bif looks like that:
> >> the_ROM_image:
> >> {
> >>
> >> [bootloader]zynq_fsbl_0.elf
> >>
> >> system.bit
> >> u-boot.elf
I have added the zynq-zed.dtb file here, as i was not sure where else to put
it...
> >> }
> >
> > mainline u-boot support is using configuration based on dts files
> > (OF_CONTROL) And because our DTSes are almost empty in mainline I expect
> > you are not able to see anything from u-boot.
> > I recommend you to copy dts file from xilinx kernel and then use
> > u-boot-dtb version.
Ok i tried this, and now the reboot loops seems to be gone. The blue "done"
led now only switches "on" one time and stays on. Unfortunatly i still don't
see anything on the console in this case.
I can see that the registers
lr 0x1d70 0x1d70
pc 0xcf6c 0xcf6c
But according to the u-boot map there is nothing and i am not sure how to
get information about the relocation without u-boot command line.
> > Or the second option is to remove OF_CONTROL from
> > zynq-common.h file and then I hope you should be able to see something on
> > console.
Removeing OF_CONTROL gives a compile error:
xilinx/zynq/u-boot-xlnx/arch/arm/lib/board.c:633: undefined reference to
`checkboard'
lib/built-in.o: In function `rsa_verify_with_keynode':
xilinx/zynq/u-boot-xlnx/lib/rsa/rsa-verify.c:284: undefined reference to
`fdtdec_get_int'
> If you use ML, as Michal said - u-boot operates through FDT support.
> But I guess even if you use u-boot.elf with FDT enabled, you must get
> the below error
> ** CONFIG_OF_CONTROL defined but no FDT - please see doc/README.fdt-control"
Mh, i now appended the fdt in the bif file. Is this the right approach?
> Means even uart node is not written in zynq-zed.dts serial
> configurations are static driver it self
> as of now.
Does this mean that the serial drivers are statically defined and do not take
the device tree file into account?
> Please check and may be you can try u-boot-dtb.elf.
Mh, don't know how to create this kind of file?
Best regards
Tim
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Re: [U-Boot] Xilinx Zed Board resets with Master
Hi Tim,
On Thu, Mar 27, 2014 at 1:51 PM, Michal Simek wrote:
> Hi,
>
> On 03/27/2014 09:08 AM, Tim Sander wrote:
>> Hi
>>
>> As i have seen that the Xilinx support has entered master i just tried to
>> boot
>> it on a Xilinx Zynx Zedboard Rev. D. The build works with the xilinx git tree
>> so i am pretty confident that its not some issues with bootgen or the
>> embedded
>> fpga image.
>>
>> The board loads the fpga which can be seen by the blue "done" led of the
>> ZedBoard. But then the LED turns off and about after a second or so it just
>> lights up shortly again to turn off again. So it seems as if the board is
>> somehow caught in a reboot loop. Any ideas what might be wrong?
>>
>> I am building with:
>> export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
>> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
>> make clean
>> make distclean
>> make zynq_zed_config
>> make
>>
>> The BOOT.BIN is build
>> xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
>>
>> And u-boot.bif looks like that:
>> the_ROM_image:
>> {
>> [bootloader]zynq_fsbl_0.elf
>> system.bit
>> u-boot.elf
>> }
>
> mainline u-boot support is using configuration based on dts files (OF_CONTROL)
> And because our DTSes are almost empty in mainline I expect you are not able
> to see anything from u-boot.
> I recommend you to copy dts file from xilinx kernel and then use u-boot-dtb
> version.
> Or the second option is to remove OF_CONTROL from zynq-common.h file
> and then I hope you should be able to see something on console.
If you use ML, as Michal said - u-boot operates through FDT support.
But I guess even if you use u-boot.elf with FDT enabled, you must get
the below error
** CONFIG_OF_CONTROL defined but no FDT - please see doc/README.fdt-control"
Means even uart node is not written in zynq-zed.dts serial
configurations are static driver it self
as of now.
Please check and may be you can try u-boot-dtb.elf.
thanks!
--
Jagan.
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Re: [U-Boot] Xilinx Zed Board resets with Master
Hi,
On 03/27/2014 09:08 AM, Tim Sander wrote:
> Hi
>
> As i have seen that the Xilinx support has entered master i just tried to
> boot
> it on a Xilinx Zynx Zedboard Rev. D. The build works with the xilinx git tree
> so i am pretty confident that its not some issues with bootgen or the
> embedded
> fpga image.
>
> The board loads the fpga which can be seen by the blue "done" led of the
> ZedBoard. But then the LED turns off and about after a second or so it just
> lights up shortly again to turn off again. So it seems as if the board is
> somehow caught in a reboot loop. Any ideas what might be wrong?
>
> I am building with:
> export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
> export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
> make clean
> make distclean
> make zynq_zed_config
> make
>
> The BOOT.BIN is build
> xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
>
> And u-boot.bif looks like that:
> the_ROM_image:
> {
> [bootloader]zynq_fsbl_0.elf
> system.bit
> u-boot.elf
> }
mainline u-boot support is using configuration based on dts files (OF_CONTROL)
And because our DTSes are almost empty in mainline I expect you are not able
to see anything from u-boot.
I recommend you to copy dts file from xilinx kernel and then use u-boot-dtb
version.
Or the second option is to remove OF_CONTROL from zynq-common.h file
and then I hope you should be able to see something on console.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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[U-Boot] Xilinx Zed Board resets with Master
Hi
As i have seen that the Xilinx support has entered master i just tried to boot
it on a Xilinx Zynx Zedboard Rev. D. The build works with the xilinx git tree
so i am pretty confident that its not some issues with bootgen or the embedded
fpga image.
The board loads the fpga which can be seen by the blue "done" led of the
ZedBoard. But then the LED turns off and about after a second or so it just
lights up shortly again to turn off again. So it seems as if the board is
somehow caught in a reboot loop. Any ideas what might be wrong?
I am building with:
export PATH=~/xilinx/SDK/2013.3/gnu/arm/lin/bin:$PATH
export CROSS_COMPILE=arm-xilinx-linux-gnueabi-
make clean
make distclean
make zynq_zed_config
make
The BOOT.BIN is build
xilinx/SDK/2013.3/bin/lin64/bootgen -image u-boot.bif -w on -o BOOT.BIN
And u-boot.bif looks like that:
the_ROM_image:
{
[bootloader]zynq_fsbl_0.elf
system.bit
u-boot.elf
}
Best regards
Tim
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