Re: [U-Boot] sun50i: h5: Add initial Orange Pi Zero Plus support

2018-06-16 Thread Jagan Teki
On Wed, Jun 13, 2018 at 12:58 PM, Maxime Ripard
 wrote:
> On Sat, Jun 09, 2018 at 06:34:46PM +0200, Hauke Mehrtens wrote:
>> Orange Pi Zero Plus is an open-source single-board computer
>> using the Allwinner H5 SOC.
>>
>> H5 Orangepi Zero Plus has
>>  - Quad-core Cortex-A53
>>  - 512MB DDR3
>>  - micrSD slot
>>  - 16MBit SPI Nor flash
>>  - Debug TTL UART
>>  - 1GBit/s Ethernet (RTL8211E)
>>  - Wifi (RTL8189FTV)
>>  - USB 2.0 Host
>>  - USB 2.0 OTG + power supply
>>
>> The device tree file is copied from the Linux kernel 4.17.
>>
>> Signed-off-by: Hauke Mehrtens 
>
> Acked-by: Maxime Ripard 

Applied to u-boot-sunxi/master
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Re: [U-Boot] sun50i: h5: Add initial Orange Pi Zero Plus support

2018-06-13 Thread Maxime Ripard
On Sat, Jun 09, 2018 at 06:34:46PM +0200, Hauke Mehrtens wrote:
> Orange Pi Zero Plus is an open-source single-board computer
> using the Allwinner H5 SOC.
> 
> H5 Orangepi Zero Plus has
>  - Quad-core Cortex-A53
>  - 512MB DDR3
>  - micrSD slot
>  - 16MBit SPI Nor flash
>  - Debug TTL UART
>  - 1GBit/s Ethernet (RTL8211E)
>  - Wifi (RTL8189FTV)
>  - USB 2.0 Host
>  - USB 2.0 OTG + power supply
> 
> The device tree file is copied from the Linux kernel 4.17.
> 
> Signed-off-by: Hauke Mehrtens 

Acked-by: Maxime Ripard 

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com


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[U-Boot] sun50i: h5: Add initial Orange Pi Zero Plus support

2018-06-09 Thread Hauke Mehrtens
Orange Pi Zero Plus is an open-source single-board computer
using the Allwinner H5 SOC.

H5 Orangepi Zero Plus has
 - Quad-core Cortex-A53
 - 512MB DDR3
 - micrSD slot
 - 16MBit SPI Nor flash
 - Debug TTL UART
 - 1GBit/s Ethernet (RTL8211E)
 - Wifi (RTL8189FTV)
 - USB 2.0 Host
 - USB 2.0 OTG + power supply

The device tree file is copied from the Linux kernel 4.17.

Signed-off-by: Hauke Mehrtens 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 145 ++
 board/sunxi/MAINTAINERS   |   5 +
 configs/orangepi_zero_plus_defconfig  |  16 +++
 4 files changed, 167 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
 create mode 100644 configs/orangepi_zero_plus_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e81a580692..3fff4c94e7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -379,6 +379,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
+   sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts 
b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
new file mode 100644
index 00..e79cf3baf4
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * Copyright (C) 2018 Hauke Mehrtens 
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include 
+#include 
+#include 
+
+/ {
+   model = "Xunlong Orange Pi Zero Plus";
+   compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
+
+   reg_vcc3v3: vcc3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   aliases {
+   ethernet0 = 
+   ethernet1 = 
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   pwr {
+   label = "orangepi:green:pwr";
+   gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+   default-state = "on";
+   };
+
+   status {
+   label = "orangepi:red:status";
+   gpios = < 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+   };
+   };
+
+   reg_gmac_3v3: gmac-3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "gmac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   startup-delay-us = <10>;
+   enable-active-high;
+   gpio = < 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
+ {
+   vmmc-supply = <_vcc3v3>;
+   bus-width = <4>;
+   cd-gpios = < 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+   status = "okay";
+};
+
+ {
+   vmmc-supply = <_vcc3v3>;
+   bus-width = <4>;
+   non-removable;
+   status = "okay";
+
+   /*
+* Explicitly define the sdio device, so that we can add an ethernet
+* alias for it (which e.g. makes u-boot set a mac-address).
+*/
+   rtl8189ftv: sdio_wifi@1 {
+   reg = <1>;
+   };
+};
+
+/*
+  {
+   status = "okay";
+
+   flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+   reg = <0>;
+   spi-max-frequency = <4000>;
+   };
+};
+*/
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_a>;
+   status = "okay";
+};
+
+_otg {
+   dr_mode = "peripheral";
+   status = "okay";
+};
+
+ {
+   /* USB Type-A ports' VBUS is always on */
+   usb0_id_det-gpios = < 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+   status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 6ebf612db3..db51f48ab6 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -340,6 +340,11 @@ M: Icenowy Zheng 
 S: Maintained
 F: