Re: [PATCH] bloblist: Fix bloblist convention checking.
Hi. Raymond. > I think you don't even need to change the order. > The FW handoff must fulfill two conditions at the same time (A valid TL plus > and proper register > conventions). > Both conditions are essential with the same priority and which one should be > proceeded first > is fully arbitrary. okay. then I'll restore xferlist.c. and send patch v3. Please ignore patch v2. Thanks! From: Raymond Mao Sent: 09 July 2024 20:26 To: Yeo Reum Yun Cc: tr...@konsulko.com; s...@chromium.org; ilias.apalodimas; n-ja...@ti.com; bmeng...@gmail.com; u-boot@lists.denx.de Subject: Re: [PATCH] bloblist: Fix bloblist convention checking. Hi Levi, On Tue, 9 Jul 2024 at 13:16, Yeo Reum Yun mailto:yeoreum@arm.com>> wrote: Hi Raymond! > The handoff of armv7 will break if you swap arg[0] and arg[2] here. > The args are already aligned in the correct order via the assembly code. > Please see the 'save_boot_params' function in start.S of armv7. Thanks to let me know. I couldn't see that code. But I think before checking transfer_list, It would be good to check convention first. So, I'll change order only. I think you don't even need to change the order. The FW handoff must fulfill two conditions at the same time (A valid TL plus and proper register conventions). Both conditions are essential with the same priority and which one should be proceeded first is fully arbitrary. Regards, Raymond IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Re: [PATCH] bloblist: Fix bloblist convention checking.
Hi Levi, On Tue, 9 Jul 2024 at 13:16, Yeo Reum Yun wrote: > Hi Raymond! > > > > The handoff of armv7 will break if you swap arg[0] and arg[2] here. > > The args are already aligned in the correct order via the assembly code. > > Please see the 'save_boot_params' function in start.S of armv7. > > Thanks to let me know. I couldn't see that code. > But I think before checking transfer_list, It would be good to check > convention first. > > So, I'll change order only. > > I think you don't even need to change the order. The FW handoff must fulfill two conditions at the same time (A valid TL plus and proper register conventions). Both conditions are essential with the same priority and which one should be proceeded first is fully arbitrary. Regards, Raymond
Re: [PATCH] bloblist: Fix bloblist convention checking.
Hi Raymond! > The handoff of armv7 will break if you swap arg[0] and arg[2] here. > The args are already aligned in the correct order via the assembly code. > Please see the 'save_boot_params' function in start.S of armv7. Thanks to let me know. I couldn't see that code. But I think before checking transfer_list, It would be good to check convention first. So, I'll change order only. Thanks! IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Re: [PATCH] bloblist: Fix bloblist convention checking.
Hi Levi,
On Tue, 9 Jul 2024 at 09:25, Levi Yun wrote:
> According to recently firmware handsoff spec [1]'s
> "Register usage at handoff boundary",
> Transfer List's signature value was changed from 0x40_b10b
> (3 bytes) to 4a0f_b10b (4 bytes).
>
> As updating of TL's signature, register value of x1/r1 should be:
>
> In aarch32's r1 value should be
> R1[23:0]: TL signature (4a0f_b10b->masked range value: 0f_b10b)
> R1[31:24]: version of the register convention == 1
>
> and
>
> In aarch64's x1 value should be
> X1[31:0]: TL signature (4a0f_b10b)
> X1[39:32]: version of the register convention == 1
> X1[63:40]: MBZ
> (See the [2] and [3]).
>
> Also, according to architecture, the convention is slight different:
>
> In aarch32:
> R0: MBZ
> R1: see above
> R2: Compatibility location for passing a platform description
> devicetree
> R3: tl_base_pa
>
> In aarch64:
> X0: Compatibility location for passing a platform description
> devicetree
> X1: see above
> X2: MBZ
> X3: tl_base_pa
>
> This patch fix problems:
>1. breaking X1 value with updated specification in aarch64
> - change of length of signature field.
>
>2. previous error value set in R1 in arm32.
> - length of signature should be 24, but it uses 32bit signature.
>
>3. according to architecture, check register convetion differently.
>
> [1] https://github.com/FirmwareHandoff/firmware_handoff
> [2] https://github.com/FirmwareHandoff/firmware_handoff/issues/32
> [3]
> https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027
>
> Signed-off-by: Levi Yun
> ---
> arch/arm/lib/xferlist.c | 8 +---
> common/bloblist.c | 11 ++-
> include/bloblist.h | 5 -
> 3 files changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/lib/xferlist.c b/arch/arm/lib/xferlist.c
> index f9c5d88bd4..a6349293bd 100644
> --- a/arch/arm/lib/xferlist.c
> +++ b/arch/arm/lib/xferlist.c
> @@ -12,12 +12,14 @@ int xferlist_from_boot_arg(ulong addr, ulong size)
> {
> int ret;
>
> - ret = bloblist_check(saved_args[3], size);
> + if (IS_ENABLED(CONFIG_64BIT))
> + ret = bloblist_check_reg_conv(saved_args[0],
> saved_args[2], saved_args[1]);
> + else
> + ret = bloblist_check_reg_conv(saved_args[2],
> saved_args[0], saved_args[1]);
>
The handoff of armv7 will break if you swap arg[0] and arg[2] here.
The args are already aligned in the correct order via the assembly code.
Please see the 'save_boot_params' function in start.S of armv7.
Regards,
Raymond
