Re: [PATCH v5 04/12] arm: mvebu: clearfog: initial ClearFog Base variant

2020-03-23 Thread Joel Johnson 

On 2020-03-23 03:11, Stefan Roese wrote:

On 27.01.20 21:01, Joel Johnson wrote:

Add a unique entry for ClearFog Base variant, reflected in the board
name and adjusted SerDes topology.

Signed-off-by: Joel Johnson 

---

v2 changes:
   - reworked based on Baruch's run-time TLV EEPROM detection series
v3 changes:
   - rebased on mvebu merged run-time TLV EEPROM detection series
   - minor update to help test regarding runtime detection failures
v4 changes:
   - use runtime static config adjust instead of #ifdef in cases where
 hardware EEPROM detection fails or is disabled in build
 SPL size change for defconfig increases 36 bytes (122893 to 
122929)
 SPL size change for defconfig+Base increases 60 bytes (122893 to 
122953)

   - add placeholder support for EEPROM based Clearfog Pro, based on
 initial name confirmation from Baruch. I wanted to include the 
check

 at least in the patch for review to indicate expected usage to
 ensure that a Clearfog Pro EEPROM device boots correctly even if 
the

 image is built with Base static configuration. If there are other
 prerelease concerns and this should be added separately later, 
I'd

 be fine with that too.
   - Note that this approach *does not* currently provide any 
mechanism
 for EEPROM detected boards to have their SFP speed changed or 
switch
 between PCIE/SATA signalling. I'm assuming that will be done 
based on
 hardware detection, but confirmation/acceptance in review would 
be

 appreciated so it can be revisited if needed.
v5 changes:
   - only make Base variant adjustment based on runtime configuration

---
  arch/arm/mach-mvebu/Kconfig|  2 ++
  board/solidrun/clearfog/Kconfig| 18 ++
  board/solidrun/clearfog/clearfog.c | 29 
+++--

  3 files changed, 43 insertions(+), 6 deletions(-)
  create mode 100644 board/solidrun/clearfog/Kconfig

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index bc5eaa5a76..161dee937f 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -280,4 +280,6 @@ config SECURED_MODE_CSK_INDEX
default 0
depends on SECURED_MODE_IMAGE
  +source "board/solidrun/clearfog/Kconfig"
+
  endif
diff --git a/board/solidrun/clearfog/Kconfig 
b/board/solidrun/clearfog/Kconfig

new file mode 100644
index 00..936d5918f8
--- /dev/null
+++ b/board/solidrun/clearfog/Kconfig
@@ -0,0 +1,18 @@
+menu "ClearFog configuration"
+   depends on TARGET_CLEARFOG
+
+config TARGET_CLEARFOG_BASE
+   bool "Use ClearFog Base static configuration"
+   help
+ Use the ClearFog Base as the static configuration instead of the
+ default which uses the ClearFog Pro.
+
+	  Runtime board detection is always attempted and used if available. 
The

+ static configuration is used as a fallback in cases where runtime
+	  detection is disabled, is not available in hardware, or otherwise 
fails.

+
+ Only newer revisions of the ClearFog product line support runtime
+	  detection via additional EEPROM hardware. This option enables 
selecting

+ the Base variant for older hardware revisions.
+
+endmenu
diff --git a/board/solidrun/clearfog/clearfog.c 
b/board/solidrun/clearfog/clearfog.c

index 9b31902c70..c873d00905 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -42,6 +42,7 @@ static void cf_read_tlv_data(void)
read_tlv_data(_tlv_data);
  }
  +/* The starting board_serdes_map reflects original Clearfog Pro 
usage */

  static struct serdes_map board_serdes_map[] = {
{SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
@@ -51,6 +52,13 @@ static struct serdes_map board_serdes_map[] = {
{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
  };
  +void config_cfbase_serdes_map(void)
+{
+   board_serdes_map[4].serdes_type = USB3_HOST0;
+   board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS;
+   board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE;
+}
+
  int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 
*count)

  {
cf_read_tlv_data();
@@ -59,12 +67,17 @@ int hws_board_topology_load(struct serdes_map 
**serdes_map_array, u8 *count)

board_serdes_map[0].serdes_type = PEX0;
board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
-   }
-
-   if (sr_product_is(_tlv_data, "Clearfog Base")) {
-   board_serdes_map[4].serdes_type = USB3_HOST0;
-   board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS;
-   board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE;
+   } else if (sr_product_is(_tlv_data, "Clearfog Pro")) {
+   /* handle recognized product as noop, no adjustment required */
+   } else if

Re: [PATCH v5 04/12] arm: mvebu: clearfog: initial ClearFog Base variant

2020-03-23 Thread Stefan Roese 

On 27.01.20 21:01, Joel Johnson wrote:

Add a unique entry for ClearFog Base variant, reflected in the board
name and adjusted SerDes topology.

Signed-off-by: Joel Johnson 

---

v2 changes:
   - reworked based on Baruch's run-time TLV EEPROM detection series
v3 changes:
   - rebased on mvebu merged run-time TLV EEPROM detection series
   - minor update to help test regarding runtime detection failures
v4 changes:
   - use runtime static config adjust instead of #ifdef in cases where
 hardware EEPROM detection fails or is disabled in build
 SPL size change for defconfig increases 36 bytes (122893 to 122929)
 SPL size change for defconfig+Base increases 60 bytes (122893 to 122953)
   - add placeholder support for EEPROM based Clearfog Pro, based on
 initial name confirmation from Baruch. I wanted to include the check
 at least in the patch for review to indicate expected usage to
 ensure that a Clearfog Pro EEPROM device boots correctly even if the
 image is built with Base static configuration. If there are other
 prerelease concerns and this should be added separately later, I'd
 be fine with that too.
   - Note that this approach *does not* currently provide any mechanism
 for EEPROM detected boards to have their SFP speed changed or switch
 between PCIE/SATA signalling. I'm assuming that will be done based on
 hardware detection, but confirmation/acceptance in review would be
 appreciated so it can be revisited if needed.
v5 changes:
   - only make Base variant adjustment based on runtime configuration

---
  arch/arm/mach-mvebu/Kconfig|  2 ++
  board/solidrun/clearfog/Kconfig| 18 ++
  board/solidrun/clearfog/clearfog.c | 29 +++--
  3 files changed, 43 insertions(+), 6 deletions(-)
  create mode 100644 board/solidrun/clearfog/Kconfig

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index bc5eaa5a76..161dee937f 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -280,4 +280,6 @@ config SECURED_MODE_CSK_INDEX
default 0
depends on SECURED_MODE_IMAGE
  
+source "board/solidrun/clearfog/Kconfig"

+
  endif
diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig
new file mode 100644
index 00..936d5918f8
--- /dev/null
+++ b/board/solidrun/clearfog/Kconfig
@@ -0,0 +1,18 @@
+menu "ClearFog configuration"
+   depends on TARGET_CLEARFOG
+
+config TARGET_CLEARFOG_BASE
+   bool "Use ClearFog Base static configuration"
+   help
+ Use the ClearFog Base as the static configuration instead of the
+ default which uses the ClearFog Pro.
+
+ Runtime board detection is always attempted and used if available. The
+ static configuration is used as a fallback in cases where runtime
+ detection is disabled, is not available in hardware, or otherwise 
fails.
+
+ Only newer revisions of the ClearFog product line support runtime
+ detection via additional EEPROM hardware. This option enables 
selecting
+ the Base variant for older hardware revisions.
+
+endmenu
diff --git a/board/solidrun/clearfog/clearfog.c 
b/board/solidrun/clearfog/clearfog.c
index 9b31902c70..c873d00905 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -42,6 +42,7 @@ static void cf_read_tlv_data(void)
read_tlv_data(_tlv_data);
  }
  
+/* The starting board_serdes_map reflects original Clearfog Pro usage */

  static struct serdes_map board_serdes_map[] = {
{SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0},
{SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
@@ -51,6 +52,13 @@ static struct serdes_map board_serdes_map[] = {
{SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0},
  };
  
+void config_cfbase_serdes_map(void)

+{
+   board_serdes_map[4].serdes_type = USB3_HOST0;
+   board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS;
+   board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE;
+}
+
  int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count)
  {
cf_read_tlv_data();
@@ -59,12 +67,17 @@ int hws_board_topology_load(struct serdes_map 
**serdes_map_array, u8 *count)
board_serdes_map[0].serdes_type = PEX0;
board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
-   }
-
-   if (sr_product_is(_tlv_data, "Clearfog Base")) {
-   board_serdes_map[4].serdes_type = USB3_HOST0;
-   board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS;
-   board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE;
+   } else if (sr_product_is(_tlv_data, "Clearfog Pro")) {
+   /* handle recognized product as noop, no adjustment required */
+   } else if (sr_product_is(_tlv_data, "Clearfog Base")) {
+