Re: [PATCH v7 3/6] rockchip: px30: add the serial flash controller

2021-08-11 Thread Kever Yang 



On 2021/8/5 下午4:26, Jon Lin wrote:

From: Chris Morgan 

Add the serial flash controller to the devicetree for the PX30.

Signed-off-by: Chris Morgan 
Signed-off-by: Jon Lin 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---

(no changes since v5)

Changes in v5:
- px30 use "rockchip, sfc" as compatible id

  arch/arm/dts/px30.dtsi | 38 ++
  1 file changed, 38 insertions(+)

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index b6c79e7ed3..aaa8ae2235 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -960,6 +960,18 @@
status = "disabled";
};
  
+	sfc: sfc@ff3a {

+   compatible = "rockchip,sfc";
+   reg = <0x0 0xff3a 0x0 0x4000>;
+   interrupts = ;
+   clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+   clock-names = "clk_sfc", "hclk_sfc";
+   pinctrl-names = "default";
+   pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus4>;
+   power-domains = <&power PX30_PD_MMC_NAND>;
+   status = "disabled";
+   };
+
gpu: gpu@ff40 {
compatible = "rockchip,px30-mali", "arm,mali-bifrost";
reg = <0x0 0xff40 0x0 0x4000>;
@@ -1926,6 +1938,32 @@
};
};
  
+		serial_flash {

+   sfc_bus4: sfc-bus4 {
+   rockchip,pins =
+   <1 RK_PA0 3 &pcfg_pull_none>,
+   <1 RK_PA1 3 &pcfg_pull_none>,
+   <1 RK_PA2 3 &pcfg_pull_none>,
+   <1 RK_PA3 3 &pcfg_pull_none>;
+   };
+
+   sfc_bus2: sfc-bus2 {
+   rockchip,pins =
+   <1 RK_PA0 3 &pcfg_pull_none>,
+   <1 RK_PA1 3 &pcfg_pull_none>;
+   };
+
+   sfc_cs: sfc-cs {
+   rockchip,pins =
+   <1 RK_PA4 3 &pcfg_pull_none>;
+   };
+
+   sfc_clk: sfc-clk {
+   rockchip,pins =
+   <1 RK_PB1 3 &pcfg_pull_none>;
+   };
+   };
+
lcdc {
lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
rockchip,pins =

Re: [PATCH v7 3/6] rockchip: px30: add the serial flash controller

2021-08-05 Thread Chris Morgan 
On Thu, Aug 05, 2021 at 05:00:44PM +0530, Jagan Teki wrote:
> On Thu, Aug 5, 2021 at 1:57 PM Jon Lin  wrote:
> >
> > From: Chris Morgan 
> >
> > Add the serial flash controller to the devicetree for the PX30.
> >
> > Signed-off-by: Chris Morgan 
> > Signed-off-by: Jon Lin 
> > ---
> >
> > (no changes since v5)
> >
> > Changes in v5:
> > - px30 use "rockchip, sfc" as compatible id
> >
> >  arch/arm/dts/px30.dtsi | 38 ++
> >  1 file changed, 38 insertions(+)
> >
> > diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
> > index b6c79e7ed3..aaa8ae2235 100644
> > --- a/arch/arm/dts/px30.dtsi
> > +++ b/arch/arm/dts/px30.dtsi
> > @@ -960,6 +960,18 @@
> > status = "disabled";
> > };
> >
> > +   sfc: sfc@ff3a {
> > +   compatible = "rockchip,sfc";
> > +   reg = <0x0 0xff3a 0x0 0x4000>;
> > +   interrupts = ;
> > +   clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> > +   clock-names = "clk_sfc", "hclk_sfc";
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus4>;
> > +   power-domains = <&power PX30_PD_MMC_NAND>;
> > +   status = "disabled";
> > +   };
> > +
> > gpu: gpu@ff40 {
> > compatible = "rockchip,px30-mali", "arm,mali-bifrost";
> > reg = <0x0 0xff40 0x0 0x4000>;
> > @@ -1926,6 +1938,32 @@
> > };
> > };
> >
> > +   serial_flash {
> > +   sfc_bus4: sfc-bus4 {
> > +   rockchip,pins =
> > +   <1 RK_PA0 3 &pcfg_pull_none>,
> > +   <1 RK_PA1 3 &pcfg_pull_none>,
> > +   <1 RK_PA2 3 &pcfg_pull_none>,
> > +   <1 RK_PA3 3 &pcfg_pull_none>;
> > +   };
> > +
> > +   sfc_bus2: sfc-bus2 {
> > +   rockchip,pins =
> > +   <1 RK_PA0 3 &pcfg_pull_none>,
> > +   <1 RK_PA1 3 &pcfg_pull_none>;
> > +   };
> > +
> > +   sfc_cs: sfc-cs {
> > +   rockchip,pins =
> > +   <1 RK_PA4 3 &pcfg_pull_none>;
> > +   };
> > +
> > +   sfc_clk: sfc-clk {
> > +   rockchip,pins =
> > +   <1 RK_PB1 3 &pcfg_pull_none>;
> > +   };
> > +   };
> > +
> 
> Better to sync the Linux, instead of intermediate add-ons. Add it in
> -u-boot.dtsi so-that it can remove while syncing rc tags, may be Kever
> can comment. Whole idea is to keep px30.dtsi as same as Linux.
> 
> Thanks,
> Jagan.

The Linux driver itself is getting updated in exactly the same way. The
expectation is that once it's accepted this will be exactly how it's
done in the upstream Linux px30.dtsi file.

Thank you.

Re: [PATCH v7 3/6] rockchip: px30: add the serial flash controller

2021-08-05 Thread Jagan Teki 
On Thu, Aug 5, 2021 at 1:57 PM Jon Lin  wrote:
>
> From: Chris Morgan 
>
> Add the serial flash controller to the devicetree for the PX30.
>
> Signed-off-by: Chris Morgan 
> Signed-off-by: Jon Lin 
> ---
>
> (no changes since v5)
>
> Changes in v5:
> - px30 use "rockchip, sfc" as compatible id
>
>  arch/arm/dts/px30.dtsi | 38 ++
>  1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
> index b6c79e7ed3..aaa8ae2235 100644
> --- a/arch/arm/dts/px30.dtsi
> +++ b/arch/arm/dts/px30.dtsi
> @@ -960,6 +960,18 @@
> status = "disabled";
> };
>
> +   sfc: sfc@ff3a {
> +   compatible = "rockchip,sfc";
> +   reg = <0x0 0xff3a 0x0 0x4000>;
> +   interrupts = ;
> +   clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> +   clock-names = "clk_sfc", "hclk_sfc";
> +   pinctrl-names = "default";
> +   pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus4>;
> +   power-domains = <&power PX30_PD_MMC_NAND>;
> +   status = "disabled";
> +   };
> +
> gpu: gpu@ff40 {
> compatible = "rockchip,px30-mali", "arm,mali-bifrost";
> reg = <0x0 0xff40 0x0 0x4000>;
> @@ -1926,6 +1938,32 @@
> };
> };
>
> +   serial_flash {
> +   sfc_bus4: sfc-bus4 {
> +   rockchip,pins =
> +   <1 RK_PA0 3 &pcfg_pull_none>,
> +   <1 RK_PA1 3 &pcfg_pull_none>,
> +   <1 RK_PA2 3 &pcfg_pull_none>,
> +   <1 RK_PA3 3 &pcfg_pull_none>;
> +   };
> +
> +   sfc_bus2: sfc-bus2 {
> +   rockchip,pins =
> +   <1 RK_PA0 3 &pcfg_pull_none>,
> +   <1 RK_PA1 3 &pcfg_pull_none>;
> +   };
> +
> +   sfc_cs: sfc-cs {
> +   rockchip,pins =
> +   <1 RK_PA4 3 &pcfg_pull_none>;
> +   };
> +
> +   sfc_clk: sfc-clk {
> +   rockchip,pins =
> +   <1 RK_PB1 3 &pcfg_pull_none>;
> +   };
> +   };
> +

Better to sync the Linux, instead of intermediate add-ons. Add it in
-u-boot.dtsi so-that it can remove while syncing rc tags, may be Kever
can comment. Whole idea is to keep px30.dtsi as same as Linux.

Thanks,
Jagan.