Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
Hi Leo
On 02:55 Thu 29 Jun , Leo Liang wrote:
> Hi YiXun,
> On Fri, May 26, 2023 at 08:41:04PM +0800, Yixun Lan wrote:
> > Add support for Sipeed's Lichee Pi 4A board which based on
> > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> > so it's capable of chain booting from T-HEAD's vendor u-boot.
> >
> > Reviewed-by: Wei Fu
> > Signed-off-by: Yixun Lan
> > ...
> > diff --git a/board/thead/th1520_lpi4a/board.c
> > b/board/thead/th1520_lpi4a/board.c
> > new file mode 100644
> > index 00..378bab098b
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/board.c
> > @@ -0,0 +1,14 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2023, Yixun Lan
> > + *
> > + */
> > +
> > +#include
> > +
> > +int board_init(void)
> > +{
> > + enable_caches();
>
> There is a compilation warining here at "enable_caches"
> (probably due to cpu_func.h not being included to provide this function)
>
thanks, will fix in v2
>
> Best regards,
> Leo
> > +
> > + return 0;
> > +}
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
>
> Add support for Sipeed's Lichee Pi 4A board which based on
> T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> so it's capable of chain booting from T-HEAD's vendor u-boot.
>
> Reviewed-by: Wei Fu
> Signed-off-by: Yixun Lan
> ---
> arch/riscv/Kconfig | 5
> board/thead/th1520_lpi4a/Kconfig | 42
> board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> board/thead/th1520_lpi4a/Makefile| 5
> board/thead/th1520_lpi4a/board.c | 14 ++
> include/configs/th1520_lpi4a.h | 22 +++
> 6 files changed, 95 insertions(+)
> create mode 100644 board/thead/th1520_lpi4a/Kconfig
> create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> create mode 100644 board/thead/th1520_lpi4a/Makefile
> create mode 100644 board/thead/th1520_lpi4a/board.c
> create mode 100644 include/configs/th1520_lpi4a.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index f6ed05906a..419b6171a9 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> config TARGET_STARFIVE_VISIONFIVE2
> bool "Support StarFive VisionFive2 Board"
>
> +config TARGET_TH1520_LPI4A
> + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> + select SYS_CACHE_SHIFT_6
> +
> config TARGET_SIPEED_MAIX
> bool "Support Sipeed Maix Board"
> select SYS_CACHE_SHIFT_6
> @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> source "board/microchip/mpfs_icicle/Kconfig"
> source "board/sifive/unleashed/Kconfig"
> source "board/sifive/unmatched/Kconfig"
> +source "board/thead/th1520_lpi4a/Kconfig"
> source "board/openpiton/riscv64/Kconfig"
> source "board/sipeed/maix/Kconfig"
> source "board/starfive/visionfive2/Kconfig"
> diff --git a/board/thead/th1520_lpi4a/Kconfig
> b/board/thead/th1520_lpi4a/Kconfig
> new file mode 100644
> index 00..622246127c
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/Kconfig
> @@ -0,0 +1,42 @@
> +if TARGET_TH1520_LPI4A
> +
> +config ARCH_THEAD
> + bool
> + default y
> +
> +config SYS_BOARD
> + default "th1520_lpi4a"
> +
> +config SYS_VENDOR
> + default "thead"
> +
> +config SYS_CPU
> + default "generic"
> +
> +config SYS_CONFIG_NAME
> + default "th1520_lpi4a"
> +
> +config TEXT_BASE
> + default 0x01b0 if SPL
> + default 0x01c0 if !RISCV_SMODE
> + default 0x01c0 if RISCV_SMODE
> +
> +config SPL_TEXT_BASE
> + default 0x0800
> +
> +config SPL_OPENSBI_LOAD_ADDR
> + default 0x8000
> +
> +config BOARD_SPECIFIC_OPTIONS
> + def_bool y
> + select ARCH_EARLY_INIT_R
> + imply CPU
> + imply CPU_RISCV
> + imply RISCV_TIMER if RISCV_SMODE
> + imply CMD_CPU
> + imply SMP
> + imply SUPPORT_OF_CONTROL
> + imply OF_CONTROL
> + imply OF_REAL
> +
> +endif
> diff --git a/board/thead/th1520_lpi4a/MAINTAINERS
> b/board/thead/th1520_lpi4a/MAINTAINERS
> new file mode 100644
> index 00..36c7ab7cc3
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/MAINTAINERS
> @@ -0,0 +1,7 @@
> +Lichee PI 4A
> +M: Wei Fu
> +M: Yixun Lan
> +S: Maintained
> +F: board/thead/th1520_lpi4a/
> +F: configs/th1520_lpi4a_defconfig
> +F: doc/board/thead/lpi4a.rst
> diff --git a/board/thead/th1520_lpi4a/Makefile
> b/board/thead/th1520_lpi4a/Makefile
> new file mode 100644
> index 00..9671b3bbb0
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2023, Yixun Lan
> +
> +obj-y += board.o
> diff --git a/board/thead/th1520_lpi4a/board.c
> b/board/thead/th1520_lpi4a/board.c
> new file mode 100644
> index 00..378bab098b
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/board.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2023, Yixun Lan
> + *
> + */
> +
> +#include
> +
> +int board_init(void)
> +{
> + enable_caches();
> +
> + return 0;
> +}
> diff --git a/include/configs/th1520_lpi4a.h b/include/configs/th1520_lpi4a.h
> new file mode 100644
> index 00..87496a52c4
> --- /dev/null
> +++ b/include/configs/th1520_lpi4a.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (c) 2023 Yixun Lan
> + *
> + */
> +
> +#ifndef __TH1520_LPI4A_H
> +#define __TH1520_LPI4A_H
> +
> +#include
> +
> +#define CFG_SYS_SDRAM_BASE 0x
> +
> +#define UART_BASE 0xffe7014000
> +#define UART_REG_WIDTH 32
why couldn't we get it from dts? just like opensbi.
> +
> +/* Environment options */
> +
> +#define CFG_EXTRA_ENV_SETTINGS \
> + "PS1=[LPi4A]# \0"
> +
> +#endif /* __TH1520_LPI4A_H */
> --
> 2.40.0
>
--
Best Regards
Guo Ren
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
>
> Add support for Sipeed's Lichee Pi 4A board which based on
> T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> so it's capable of chain booting from T-HEAD's vendor u-boot.
>
> Reviewed-by: Wei Fu
> Signed-off-by: Yixun Lan
> ---
> arch/riscv/Kconfig | 5
> board/thead/th1520_lpi4a/Kconfig | 42
> board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> board/thead/th1520_lpi4a/Makefile| 5
> board/thead/th1520_lpi4a/board.c | 14 ++
> include/configs/th1520_lpi4a.h | 22 +++
> 6 files changed, 95 insertions(+)
> create mode 100644 board/thead/th1520_lpi4a/Kconfig
> create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> create mode 100644 board/thead/th1520_lpi4a/Makefile
> create mode 100644 board/thead/th1520_lpi4a/board.c
> create mode 100644 include/configs/th1520_lpi4a.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index f6ed05906a..419b6171a9 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> config TARGET_STARFIVE_VISIONFIVE2
> bool "Support StarFive VisionFive2 Board"
>
> +config TARGET_TH1520_LPI4A
> + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> + select SYS_CACHE_SHIFT_6
> +
> config TARGET_SIPEED_MAIX
> bool "Support Sipeed Maix Board"
> select SYS_CACHE_SHIFT_6
> @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> source "board/microchip/mpfs_icicle/Kconfig"
> source "board/sifive/unleashed/Kconfig"
> source "board/sifive/unmatched/Kconfig"
> +source "board/thead/th1520_lpi4a/Kconfig"
> source "board/openpiton/riscv64/Kconfig"
> source "board/sipeed/maix/Kconfig"
> source "board/starfive/visionfive2/Kconfig"
> diff --git a/board/thead/th1520_lpi4a/Kconfig
> b/board/thead/th1520_lpi4a/Kconfig
> new file mode 100644
> index 00..622246127c
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/Kconfig
> @@ -0,0 +1,42 @@
> +if TARGET_TH1520_LPI4A
> +
> +config ARCH_THEAD
> + bool
> + default y
> +
> +config SYS_BOARD
> + default "th1520_lpi4a"
> +
> +config SYS_VENDOR
> + default "thread"
default "T-HEAD"
Thx
> +
> +config SYS_CPU
> + default "generic"
> +
> +config SYS_CONFIG_NAME
> + default "th1520_lpi4a"
> +
> +config TEXT_BASE
> + default 0x01b0 if SPL
> + default 0x01c0 if !RISCV_SMODE
> + default 0x01c0 if RISCV_SMODE
> +
> +config SPL_TEXT_BASE
> + default 0x0800
> +
> +config SPL_OPENSBI_LOAD_ADDR
> + default 0x8000
> +
> +config BOARD_SPECIFIC_OPTIONS
> + def_bool y
> + select ARCH_EARLY_INIT_R
> + imply CPU
> + imply CPU_RISCV
> + imply RISCV_TIMER if RISCV_SMODE
> + imply CMD_CPU
> + imply SMP
> + imply SUPPORT_OF_CONTROL
> + imply OF_CONTROL
> + imply OF_REAL
> +
> +endif
> diff --git a/board/thead/th1520_lpi4a/MAINTAINERS
> b/board/thead/th1520_lpi4a/MAINTAINERS
> new file mode 100644
> index 00..36c7ab7cc3
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/MAINTAINERS
> @@ -0,0 +1,7 @@
> +Lichee PI 4A
> +M: Wei Fu
> +M: Yixun Lan
> +S: Maintained
> +F: board/thead/th1520_lpi4a/
> +F: configs/th1520_lpi4a_defconfig
> +F: doc/board/thead/lpi4a.rst
> diff --git a/board/thead/th1520_lpi4a/Makefile
> b/board/thead/th1520_lpi4a/Makefile
> new file mode 100644
> index 00..9671b3bbb0
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/Makefile
> @@ -0,0 +1,5 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2023, Yixun Lan
> +
> +obj-y += board.o
> diff --git a/board/thead/th1520_lpi4a/board.c
> b/board/thead/th1520_lpi4a/board.c
> new file mode 100644
> index 00..378bab098b
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/board.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2023, Yixun Lan
> + *
> + */
> +
> +#include
> +
> +int board_init(void)
> +{
> + enable_caches();
> +
> + return 0;
> +}
> diff --git a/include/configs/th1520_lpi4a.h b/include/configs/th1520_lpi4a.h
> new file mode 100644
> index 00..87496a52c4
> --- /dev/null
> +++ b/include/configs/th1520_lpi4a.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (c) 2023 Yixun Lan
> + *
> + */
> +
> +#ifndef __TH1520_LPI4A_H
> +#define __TH1520_LPI4A_H
> +
> +#include
> +
> +#define CFG_SYS_SDRAM_BASE 0x
> +
> +#define UART_BASE 0xffe7014000
> +#define UART_REG_WIDTH 32
> +
> +/* Environment options */
> +
> +#define CFG_EXTRA_ENV_SETTINGS \
> + "PS1=[LPi4A]# \0"
> +
> +#endif /* __TH1520_LPI4A_H */
> --
> 2.40.0
>
--
Best Regards
Guo Ren
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
Hi Guo:
On 09:45 Sat 27 May , Guo Ren wrote:
> On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
> >
> > Add support for Sipeed's Lichee Pi 4A board which based on
> > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> > so it's capable of chain booting from T-HEAD's vendor u-boot.
> >
> > Reviewed-by: Wei Fu
> > Signed-off-by: Yixun Lan
> > ---
> > arch/riscv/Kconfig | 5
> > board/thead/th1520_lpi4a/Kconfig | 42
> > board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> > board/thead/th1520_lpi4a/Makefile| 5
> > board/thead/th1520_lpi4a/board.c | 14 ++
> > include/configs/th1520_lpi4a.h | 22 +++
> > 6 files changed, 95 insertions(+)
> > create mode 100644 board/thead/th1520_lpi4a/Kconfig
> > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> > create mode 100644 board/thead/th1520_lpi4a/Makefile
> > create mode 100644 board/thead/th1520_lpi4a/board.c
> > create mode 100644 include/configs/th1520_lpi4a.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index f6ed05906a..419b6171a9 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> > config TARGET_STARFIVE_VISIONFIVE2
> > bool "Support StarFive VisionFive2 Board"
> >
> > +config TARGET_TH1520_LPI4A
> > + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> > + select SYS_CACHE_SHIFT_6
> > +
> > config TARGET_SIPEED_MAIX
> > bool "Support Sipeed Maix Board"
> > select SYS_CACHE_SHIFT_6
> > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > source "board/microchip/mpfs_icicle/Kconfig"
> > source "board/sifive/unleashed/Kconfig"
> > source "board/sifive/unmatched/Kconfig"
> > +source "board/thead/th1520_lpi4a/Kconfig"
> > source "board/openpiton/riscv64/Kconfig"
> > source "board/sipeed/maix/Kconfig"
> > source "board/starfive/visionfive2/Kconfig"
> > diff --git a/board/thead/th1520_lpi4a/Kconfig
> > b/board/thead/th1520_lpi4a/Kconfig
> > new file mode 100644
> > index 00..622246127c
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/Kconfig
> > @@ -0,0 +1,42 @@
> > +if TARGET_TH1520_LPI4A
> > +
> > +config ARCH_THEAD
> > + bool
> > + default y
> > +
> > +config SYS_BOARD
> > + default "th1520_lpi4a"
> > +
> > +config SYS_VENDOR
> > + default "thead"
> > +
> > +config SYS_CPU
> > + default "generic"
> > +
> > +config SYS_CONFIG_NAME
> > + default "th1520_lpi4a"
> > +
> > +config TEXT_BASE
> > + default 0x01b0 if SPL
> > + default 0x01c0 if !RISCV_SMODE
> > + default 0x01c0 if RISCV_SMODE
> > +
> > +config SPL_TEXT_BASE
> > + default 0x0800
> > +
> > +config SPL_OPENSBI_LOAD_ADDR
> > + default 0x8000
> > +
> > +config BOARD_SPECIFIC_OPTIONS
> > + def_bool y
> > + select ARCH_EARLY_INIT_R
> > + imply CPU
> > + imply CPU_RISCV
> > + imply RISCV_TIMER if RISCV_SMODE
> > + imply CMD_CPU
> > + imply SMP
> > + imply SUPPORT_OF_CONTROL
> > + imply OF_CONTROL
> > + imply OF_REAL
> > +
> > +endif
> > diff --git a/board/thead/th1520_lpi4a/MAINTAINERS
> > b/board/thead/th1520_lpi4a/MAINTAINERS
> > new file mode 100644
> > index 00..36c7ab7cc3
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/MAINTAINERS
> > @@ -0,0 +1,7 @@
> > +Lichee PI 4A
> > +M: Wei Fu
> > +M: Yixun Lan
> > +S: Maintained
> > +F: board/thead/th1520_lpi4a/
> > +F: configs/th1520_lpi4a_defconfig
> > +F: doc/board/thead/lpi4a.rst
> > diff --git a/board/thead/th1520_lpi4a/Makefile
> > b/board/thead/th1520_lpi4a/Makefile
> > new file mode 100644
> > index 00..9671b3bbb0
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/Makefile
> > @@ -0,0 +1,5 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +# Copyright (c) 2023, Yixun Lan
> > +
> > +obj-y += board.o
> > diff --git a/board/thead/th1520_lpi4a/board.c
> > b/board/thead/th1520_lpi4a/board.c
> > new file mode 100644
> > index 00..378bab098b
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/board.c
> > @@ -0,0 +1,14 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2023, Yixun Lan
> > + *
> > + */
> > +
> > +#include
> > +
> > +int board_init(void)
> > +{
> > + enable_caches();
> > +
> > + return 0;
> > +}
> > diff --git a/include/configs/th1520_lpi4a.h b/include/configs/th1520_lpi4a.h
> > new file mode 100644
> > index 00..87496a52c4
> > --- /dev/null
> > +++ b/include/configs/th1520_lpi4a.h
> > @@ -0,0 +1,22 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright (c) 2023 Yixun Lan
> > + *
> > + */
> > +
> > +#ifndef __TH1520_LPI4A_H
> > +#define __TH1520_LPI4A_H
> > +
> > +#include
> > +
> > +#define CFG_SYS_SDRAM_BASE 0x
> > +
> > +#define UART_BASE 0xffe70140
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
Hi Guo, Jisheng:
On 11:36 Sat 27 May , Guo Ren wrote:
> On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
> >
> > Add support for Sipeed's Lichee Pi 4A board which based on
> > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> > so it's capable of chain booting from T-HEAD's vendor u-boot.
> >
> > Reviewed-by: Wei Fu
> > Signed-off-by: Yixun Lan
> > ---
> > arch/riscv/Kconfig | 5
> > board/thead/th1520_lpi4a/Kconfig | 42
> > board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> > board/thead/th1520_lpi4a/Makefile| 5
> > board/thead/th1520_lpi4a/board.c | 14 ++
> > include/configs/th1520_lpi4a.h | 22 +++
> > 6 files changed, 95 insertions(+)
> > create mode 100644 board/thead/th1520_lpi4a/Kconfig
> > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> > create mode 100644 board/thead/th1520_lpi4a/Makefile
> > create mode 100644 board/thead/th1520_lpi4a/board.c
> > create mode 100644 include/configs/th1520_lpi4a.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index f6ed05906a..419b6171a9 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> > config TARGET_STARFIVE_VISIONFIVE2
> > bool "Support StarFive VisionFive2 Board"
> >
> > +config TARGET_TH1520_LPI4A
> > + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> > + select SYS_CACHE_SHIFT_6
> > +
> > config TARGET_SIPEED_MAIX
> > bool "Support Sipeed Maix Board"
> > select SYS_CACHE_SHIFT_6
> > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > source "board/microchip/mpfs_icicle/Kconfig"
> > source "board/sifive/unleashed/Kconfig"
> > source "board/sifive/unmatched/Kconfig"
> > +source "board/thead/th1520_lpi4a/Kconfig"
> > source "board/openpiton/riscv64/Kconfig"
> > source "board/sipeed/maix/Kconfig"
> > source "board/starfive/visionfive2/Kconfig"
> > diff --git a/board/thead/th1520_lpi4a/Kconfig
> > b/board/thead/th1520_lpi4a/Kconfig
> > new file mode 100644
> > index 00..622246127c
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/Kconfig
> > @@ -0,0 +1,42 @@
> > +if TARGET_TH1520_LPI4A
> > +
> > +config ARCH_THEAD
> > + bool
> > + default y
> > +
> > +config SYS_BOARD
> > + default "th1520_lpi4a"
for the board, I'm not sure whether people will prefer to keep the 'th1520_'
prefix,
otherwise we could make it shorter, leave only 'lpi4a'? thoughts?
> > +
> > +config SYS_VENDOR
> > + default "thread"
~~~ notice, in my original patch, it's 'thead'
> default "T-HEAD"
No, here should be 'thead', since the CONFIG_SYS_VENDOR will form
board/${CONFIG_SYS_VENDOR}, please consult arch/Kconfig for reference.
I personally would prefer 't-head' which probably cause less confusion..
but since kernel use 'thead'[1], so I just follow it to keep them aligned.
[1] in kernel, the dts path consist of 'thead', e.g. arch/riscv/boot/dts/thead/
>
> Thx
> > +
> > +config SYS_CPU
> > + default "generic"
> > +
> > +config SYS_CONFIG_NAME
> > + default "th1520_lpi4a"
> > +
> > +config TEXT_BASE
> > + default 0x01b0 if SPL
> > + default 0x01c0 if !RISCV_SMODE
> > + default 0x01c0 if RISCV_SMODE
> > +
> > +config SPL_TEXT_BASE
> > + default 0x0800
> > +
> > +config SPL_OPENSBI_LOAD_ADDR
> > + default 0x8000
> > +
> > +config BOARD_SPECIFIC_OPTIONS
> > + def_bool y
> > + select ARCH_EARLY_INIT_R
> > + imply CPU
> > + imply CPU_RISCV
> > + imply RISCV_TIMER if RISCV_SMODE
> > + imply CMD_CPU
> > + imply SMP
> > + imply SUPPORT_OF_CONTROL
> > + imply OF_CONTROL
> > + imply OF_REAL
> > +
> > +endif
> > diff --git a/board/thead/th1520_lpi4a/MAINTAINERS
> > b/board/thead/th1520_lpi4a/MAINTAINERS
> > new file mode 100644
> > index 00..36c7ab7cc3
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/MAINTAINERS
> > @@ -0,0 +1,7 @@
> > +Lichee PI 4A
> > +M: Wei Fu
> > +M: Yixun Lan
> > +S: Maintained
> > +F: board/thead/th1520_lpi4a/
> > +F: configs/th1520_lpi4a_defconfig
> > +F: doc/board/thead/lpi4a.rst
> > diff --git a/board/thead/th1520_lpi4a/Makefile
> > b/board/thead/th1520_lpi4a/Makefile
> > new file mode 100644
> > index 00..9671b3bbb0
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/Makefile
> > @@ -0,0 +1,5 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +# Copyright (c) 2023, Yixun Lan
> > +
> > +obj-y += board.o
> > diff --git a/board/thead/th1520_lpi4a/board.c
> > b/board/thead/th1520_lpi4a/board.c
> > new file mode 100644
> > index 00..378bab098b
> > --- /dev/null
> > +++ b/board/thead/th1520_lpi4a/board.c
> > @@ -0,0 +1,14 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2023, Yixun Lan
> > + *
> > + */
> > +
> > +#i
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
On Sat, May 27, 2023 at 9:41 PM Yixun Lan wrote:
>
> Hi Guo, Jisheng:
>
> On 11:36 Sat 27 May , Guo Ren wrote:
> > On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
> > >
> > > Add support for Sipeed's Lichee Pi 4A board which based on
> > > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are
> > > enabled,
> > > so it's capable of chain booting from T-HEAD's vendor u-boot.
> > >
> > > Reviewed-by: Wei Fu
> > > Signed-off-by: Yixun Lan
> > > ---
> > > arch/riscv/Kconfig | 5
> > > board/thead/th1520_lpi4a/Kconfig | 42
> > > board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> > > board/thead/th1520_lpi4a/Makefile| 5
> > > board/thead/th1520_lpi4a/board.c | 14 ++
> > > include/configs/th1520_lpi4a.h | 22 +++
> > > 6 files changed, 95 insertions(+)
> > > create mode 100644 board/thead/th1520_lpi4a/Kconfig
> > > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> > > create mode 100644 board/thead/th1520_lpi4a/Makefile
> > > create mode 100644 board/thead/th1520_lpi4a/board.c
> > > create mode 100644 include/configs/th1520_lpi4a.h
> > >
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > index f6ed05906a..419b6171a9 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> > > config TARGET_STARFIVE_VISIONFIVE2
> > > bool "Support StarFive VisionFive2 Board"
> > >
> > > +config TARGET_TH1520_LPI4A
> > > + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> > > + select SYS_CACHE_SHIFT_6
> > > +
> > > config TARGET_SIPEED_MAIX
> > > bool "Support Sipeed Maix Board"
> > > select SYS_CACHE_SHIFT_6
> > > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > > source "board/microchip/mpfs_icicle/Kconfig"
> > > source "board/sifive/unleashed/Kconfig"
> > > source "board/sifive/unmatched/Kconfig"
> > > +source "board/thead/th1520_lpi4a/Kconfig"
> > > source "board/openpiton/riscv64/Kconfig"
> > > source "board/sipeed/maix/Kconfig"
> > > source "board/starfive/visionfive2/Kconfig"
> > > diff --git a/board/thead/th1520_lpi4a/Kconfig
> > > b/board/thead/th1520_lpi4a/Kconfig
> > > new file mode 100644
> > > index 00..622246127c
> > > --- /dev/null
> > > +++ b/board/thead/th1520_lpi4a/Kconfig
> > > @@ -0,0 +1,42 @@
> > > +if TARGET_TH1520_LPI4A
> > > +
> > > +config ARCH_THEAD
> > > + bool
> > > + default y
> > > +
> > > +config SYS_BOARD
> > > + default "th1520_lpi4a"
> for the board, I'm not sure whether people will prefer to keep the 'th1520_'
> prefix,
> otherwise we could make it shorter, leave only 'lpi4a'? thoughts?
>
> > > +
> > > +config SYS_VENDOR
> > > + default "thread"
> ~~~ notice, in my original patch, it's 'thead'
> > default "T-HEAD"
> No, here should be 'thead', since the CONFIG_SYS_VENDOR will form
> board/${CONFIG_SYS_VENDOR}, please consult arch/Kconfig for reference.
>
> I personally would prefer 't-head' which probably cause less confusion..
> but since kernel use 'thead'[1], so I just follow it to keep them aligned.
>
But you have a typo here :)
> [1] in kernel, the dts path consist of 'thead', e.g.
> arch/riscv/boot/dts/thead/
>
Regards,
Bin
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
Hi Bin:
On 09:12 Mon 29 May , Bin Meng wrote:
> On Sat, May 27, 2023 at 9:41 PM Yixun Lan wrote:
> >
> > Hi Guo, Jisheng:
> >
> > On 11:36 Sat 27 May , Guo Ren wrote:
> > > On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
> > > >
> > > > Add support for Sipeed's Lichee Pi 4A board which based on
> > > > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are
> > > > enabled,
> > > > so it's capable of chain booting from T-HEAD's vendor u-boot.
> > > >
> > > > Reviewed-by: Wei Fu
> > > > Signed-off-by: Yixun Lan
> > > > ---
> > > > arch/riscv/Kconfig | 5
> > > > board/thead/th1520_lpi4a/Kconfig | 42
> > > > board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> > > > board/thead/th1520_lpi4a/Makefile| 5
> > > > board/thead/th1520_lpi4a/board.c | 14 ++
> > > > include/configs/th1520_lpi4a.h | 22 +++
> > > > 6 files changed, 95 insertions(+)
> > > > create mode 100644 board/thead/th1520_lpi4a/Kconfig
> > > > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> > > > create mode 100644 board/thead/th1520_lpi4a/Makefile
> > > > create mode 100644 board/thead/th1520_lpi4a/board.c
> > > > create mode 100644 include/configs/th1520_lpi4a.h
> > > >
> > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > > index f6ed05906a..419b6171a9 100644
> > > > --- a/arch/riscv/Kconfig
> > > > +++ b/arch/riscv/Kconfig
> > > > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> > > > config TARGET_STARFIVE_VISIONFIVE2
> > > > bool "Support StarFive VisionFive2 Board"
> > > >
> > > > +config TARGET_TH1520_LPI4A
> > > > + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> > > > + select SYS_CACHE_SHIFT_6
> > > > +
> > > > config TARGET_SIPEED_MAIX
> > > > bool "Support Sipeed Maix Board"
> > > > select SYS_CACHE_SHIFT_6
> > > > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > > > source "board/microchip/mpfs_icicle/Kconfig"
> > > > source "board/sifive/unleashed/Kconfig"
> > > > source "board/sifive/unmatched/Kconfig"
> > > > +source "board/thead/th1520_lpi4a/Kconfig"
> > > > source "board/openpiton/riscv64/Kconfig"
> > > > source "board/sipeed/maix/Kconfig"
> > > > source "board/starfive/visionfive2/Kconfig"
> > > > diff --git a/board/thead/th1520_lpi4a/Kconfig
> > > > b/board/thead/th1520_lpi4a/Kconfig
> > > > new file mode 100644
> > > > index 00..622246127c
> > > > --- /dev/null
> > > > +++ b/board/thead/th1520_lpi4a/Kconfig
> > > > @@ -0,0 +1,42 @@
> > > > +if TARGET_TH1520_LPI4A
> > > > +
> > > > +config ARCH_THEAD
> > > > + bool
> > > > + default y
> > > > +
> > > > +config SYS_BOARD
> > > > + default "th1520_lpi4a"
> > for the board, I'm not sure whether people will prefer to keep the
> > 'th1520_' prefix,
> > otherwise we could make it shorter, leave only 'lpi4a'? thoughts?
> >
> > > > +
> > > > +config SYS_VENDOR
> > > > + default "thread"
> > ~~~ notice, in my original patch, it's 'thead'
> > > default "T-HEAD"
> > No, here should be 'thead', since the CONFIG_SYS_VENDOR will form
> > board/${CONFIG_SYS_VENDOR}, please consult arch/Kconfig for reference.
> >
> > I personally would prefer 't-head' which probably cause less confusion..
> > but since kernel use 'thead'[1], so I just follow it to keep them aligned.
> >
>
> But you have a typo here :)
do you mean 'thread'? It's 'thead' actually in my original patch, so no typo..
I was already trying to clarify this.
It's probably a grammar correction when Guo reply the email
https://lore.kernel.org/all/20230526124107.894-2-d...@gentoo.org/
>
> > [1] in kernel, the dts path consist of 'thead', e.g.
> > arch/riscv/boot/dts/thead/
> >
>
> Regards,
> Bin
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
On Mon, May 29, 2023 at 11:10 AM Yixun Lan wrote:
>
> Hi Bin:
>
> On 09:12 Mon 29 May , Bin Meng wrote:
> > On Sat, May 27, 2023 at 9:41 PM Yixun Lan wrote:
> > >
> > > Hi Guo, Jisheng:
> > >
> > > On 11:36 Sat 27 May , Guo Ren wrote:
> > > > On Fri, May 26, 2023 at 8:41 PM Yixun Lan wrote:
> > > > >
> > > > > Add support for Sipeed's Lichee Pi 4A board which based on
> > > > > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are
> > > > > enabled,
> > > > > so it's capable of chain booting from T-HEAD's vendor u-boot.
> > > > >
> > > > > Reviewed-by: Wei Fu
> > > > > Signed-off-by: Yixun Lan
> > > > > ---
> > > > > arch/riscv/Kconfig | 5
> > > > > board/thead/th1520_lpi4a/Kconfig | 42
> > > > >
> > > > > board/thead/th1520_lpi4a/MAINTAINERS | 7 +
> > > > > board/thead/th1520_lpi4a/Makefile| 5
> > > > > board/thead/th1520_lpi4a/board.c | 14 ++
> > > > > include/configs/th1520_lpi4a.h | 22 +++
> > > > > 6 files changed, 95 insertions(+)
> > > > > create mode 100644 board/thead/th1520_lpi4a/Kconfig
> > > > > create mode 100644 board/thead/th1520_lpi4a/MAINTAINERS
> > > > > create mode 100644 board/thead/th1520_lpi4a/Makefile
> > > > > create mode 100644 board/thead/th1520_lpi4a/board.c
> > > > > create mode 100644 include/configs/th1520_lpi4a.h
> > > > >
> > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > > > index f6ed05906a..419b6171a9 100644
> > > > > --- a/arch/riscv/Kconfig
> > > > > +++ b/arch/riscv/Kconfig
> > > > > @@ -27,6 +27,10 @@ config TARGET_SIFIVE_UNMATCHED
> > > > > config TARGET_STARFIVE_VISIONFIVE2
> > > > > bool "Support StarFive VisionFive2 Board"
> > > > >
> > > > > +config TARGET_TH1520_LPI4A
> > > > > + bool "Support Sipeed's TH1520 Lichee PI 4A Board"
> > > > > + select SYS_CACHE_SHIFT_6
> > > > > +
> > > > > config TARGET_SIPEED_MAIX
> > > > > bool "Support Sipeed Maix Board"
> > > > > select SYS_CACHE_SHIFT_6
> > > > > @@ -66,6 +70,7 @@ source "board/emulation/qemu-riscv/Kconfig"
> > > > > source "board/microchip/mpfs_icicle/Kconfig"
> > > > > source "board/sifive/unleashed/Kconfig"
> > > > > source "board/sifive/unmatched/Kconfig"
> > > > > +source "board/thead/th1520_lpi4a/Kconfig"
> > > > > source "board/openpiton/riscv64/Kconfig"
> > > > > source "board/sipeed/maix/Kconfig"
> > > > > source "board/starfive/visionfive2/Kconfig"
> > > > > diff --git a/board/thead/th1520_lpi4a/Kconfig
> > > > > b/board/thead/th1520_lpi4a/Kconfig
> > > > > new file mode 100644
> > > > > index 00..622246127c
> > > > > --- /dev/null
> > > > > +++ b/board/thead/th1520_lpi4a/Kconfig
> > > > > @@ -0,0 +1,42 @@
> > > > > +if TARGET_TH1520_LPI4A
> > > > > +
> > > > > +config ARCH_THEAD
> > > > > + bool
> > > > > + default y
> > > > > +
> > > > > +config SYS_BOARD
> > > > > + default "th1520_lpi4a"
> > > for the board, I'm not sure whether people will prefer to keep the
> > > 'th1520_' prefix,
> > > otherwise we could make it shorter, leave only 'lpi4a'? thoughts?
> > >
> > > > > +
> > > > > +config SYS_VENDOR
> > > > > + default "thread"
> > > ~~~ notice, in my original patch, it's 'thead'
> > > > default "T-HEAD"
> > > No, here should be 'thead', since the CONFIG_SYS_VENDOR will form
> > > board/${CONFIG_SYS_VENDOR}, please consult arch/Kconfig for reference.
> > >
> > > I personally would prefer 't-head' which probably cause less confusion..
> > > but since kernel use 'thead'[1], so I just follow it to keep them aligned.
> > >
> >
> > But you have a typo here :)
> do you mean 'thread'? It's 'thead' actually in my original patch, so no typo..
> I was already trying to clarify this.
>
> It's probably a grammar correction when Guo reply the email
>
> https://lore.kernel.org/all/20230526124107.894-2-d...@gentoo.org/
> >
> > > [1] in kernel, the dts path consist of 'thead', e.g.
> > > arch/riscv/boot/dts/thead/
I see. Thanks for the clarification!
Regards,
Bin
Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added
Hi YiXun,
On Fri, May 26, 2023 at 08:41:04PM +0800, Yixun Lan wrote:
> Add support for Sipeed's Lichee Pi 4A board which based on
> T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled,
> so it's capable of chain booting from T-HEAD's vendor u-boot.
>
> Reviewed-by: Wei Fu
> Signed-off-by: Yixun Lan
> ...
> diff --git a/board/thead/th1520_lpi4a/board.c
> b/board/thead/th1520_lpi4a/board.c
> new file mode 100644
> index 00..378bab098b
> --- /dev/null
> +++ b/board/thead/th1520_lpi4a/board.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2023, Yixun Lan
> + *
> + */
> +
> +#include
> +
> +int board_init(void)
> +{
> + enable_caches();
There is a compilation warining here at "enable_caches"
(probably due to cpu_func.h not being included to provide this function)
Best regards,
Leo
> +
> + return 0;
> +}
