Re: [U-Boot] [PATCH 033/126] dm: pci: Add a function to read a PCI BAR

2019-10-06 Thread Bin Meng
On Sat, Oct 5, 2019 at 9:12 PM Bin Meng  wrote:
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
> >
> > At present PCI address transaction is not supported so drivers must
> > manually read the correct BAR after reading the device tree info. The
> > ns16550 has a suitable implementation, so move this code into the core
> > DM support.
> >
> > Note that there is no live-tree equivalent at present.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  arch/sandbox/dts/test.dts |  7 --
> >  drivers/core/fdtaddr.c| 33 
> >  drivers/core/read.c   | 11 ++
> >  drivers/serial/ns16550.c  | 31 +--
> >  include/dm/fdtaddr.h  |  8 +++
> >  include/dm/read.h | 25 ++
> >  test/dm/pci.c | 45 +++
> >  7 files changed, 128 insertions(+), 32 deletions(-)
> >
> > diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> > index a2e75981f0b..8733e0d7e19 100644
> > --- a/arch/sandbox/dts/test.dts
> > +++ b/arch/sandbox/dts/test.dts
> > @@ -456,12 +456,15 @@
> > };
> > pci@1,0 {
> > compatible = "pci-generic";
> > -   reg = <0x0800 0 0 0 0>;
> > +   /* BAR0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
>
> reg 0
>
> > +   reg = <0x02000814 0 0 0 0
> > +   0x0100f810 0 0 0 0>;
>
> it should be 0x01000810, and should have a similar comment like reg 0
>
> > sandbox,emul = <&swap_case_emul1>;
> > };
> > pci@1f,0 {
> > compatible = "pci-generic";
> > -   reg = <0xf800 0 0 0 0>;
> > +   /* BAR1 is at 0x10, using FDT_PCI_SPACE_IO */
>
> reg 0

Corrected the above comments, and

>
> > +   reg = <0x0100f810 0 0 0 0>;
> > sandbox,emul = <&swap_case_emul1f>;
> > };
> > };
> > diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
> > index 6850003a287..c9a941116a3 100644
> > --- a/drivers/core/fdtaddr.c
> > +++ b/drivers/core/fdtaddr.c
> > @@ -190,3 +190,36 @@ void *devfdt_map_physmem(struct udevice *dev, unsigned 
> > long size)
> >
> > return map_physmem(addr, size, MAP_NOCACHE);
> >  }
> > +
> > +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev)
> > +{
> > +   ulong addr;
> > +
> > +   addr = devfdt_get_addr(dev);
> > +   if (CONFIG_IS_ENABLED(PCI) && IS_ENABLED(CONFIG_DM_PCI) &&
> > +   addr == FDT_ADDR_T_NONE) {
> > +   struct fdt_pci_addr pci_addr;
> > +   u32 bar;
> > +   int ret;
> > +
> > +   ret = fdtdec_get_pci_addr(gd->fdt_blob,
> > + dev_of_offset(dev),
> > + FDT_PCI_SPACE_MEM32, "reg",
> > + &pci_addr);
> > +   if (ret) {
> > +   /* try if there is any i/o-mapped register */
> > +   ret = fdtdec_get_pci_addr(gd->fdt_blob,
> > + dev_of_offset(dev),
> > + FDT_PCI_SPACE_IO, "reg",
> > + &pci_addr);
> > +   if (ret)
> > +   return FDT_ADDR_T_NONE;
> > +   }
> > +   ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
> > +   if (ret)
> > +   return FDT_ADDR_T_NONE;
> > +   addr = bar;
> > +   }
> > +
> > +   return addr;
> > +}
> > diff --git a/drivers/core/read.c b/drivers/core/read.c
> > index fb3dcd9a790..9602e52d1b1 100644
> > --- a/drivers/core/read.c
> > +++ b/drivers/core/read.c
> > @@ -307,3 +307,14 @@ int dev_read_alias_highest_id(const char *stem)
> >
> > return fdtdec_get_alias_highest_id(gd->fdt_blob, stem);
> >  }
> > +
> > +fdt_addr_t dev_read_addr_pci(struct udevice *dev)
> > +{
> > +   ulong addr;
> > +
> > +   addr = dev_read_addr(dev);
> > +   if (addr == FDT_ADDR_T_NONE && !of_live_active())
> > +   addr = devfdt_get_addr_pci(dev);
> > +
> > +   return addr;
> > +}
> > diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> > index 01f334938ea..754b6e99215 100644
> > --- a/drivers/serial/ns16550.c
> > +++ b/drivers/serial/ns16550.c
> > @@ -440,36 +440,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice 
> > *dev)
> > int err;
> >
> > /* try Processor Local Bus device first */
> > -   addr = dev_read_addr(dev);
> > -#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
> > -   if (addr == FDT_ADDR_T_NONE) {
> > -   /* then try pci device */
> > -   struct fdt_pci_addr pci_addr;
> > -   u32 bar;
> 

Re: [U-Boot] [PATCH 033/126] dm: pci: Add a function to read a PCI BAR

2019-10-05 Thread Bin Meng
On Wed, Sep 25, 2019 at 10:58 PM Simon Glass  wrote:
>
> At present PCI address transaction is not supported so drivers must
> manually read the correct BAR after reading the device tree info. The
> ns16550 has a suitable implementation, so move this code into the core
> DM support.
>
> Note that there is no live-tree equivalent at present.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/sandbox/dts/test.dts |  7 --
>  drivers/core/fdtaddr.c| 33 
>  drivers/core/read.c   | 11 ++
>  drivers/serial/ns16550.c  | 31 +--
>  include/dm/fdtaddr.h  |  8 +++
>  include/dm/read.h | 25 ++
>  test/dm/pci.c | 45 +++
>  7 files changed, 128 insertions(+), 32 deletions(-)
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index a2e75981f0b..8733e0d7e19 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -456,12 +456,15 @@
> };
> pci@1,0 {
> compatible = "pci-generic";
> -   reg = <0x0800 0 0 0 0>;
> +   /* BAR0 is at 0x14, using FDT_PCI_SPACE_MEM32 */

reg 0

> +   reg = <0x02000814 0 0 0 0
> +   0x0100f810 0 0 0 0>;

it should be 0x01000810, and should have a similar comment like reg 0

> sandbox,emul = <&swap_case_emul1>;
> };
> pci@1f,0 {
> compatible = "pci-generic";
> -   reg = <0xf800 0 0 0 0>;
> +   /* BAR1 is at 0x10, using FDT_PCI_SPACE_IO */

reg 0

> +   reg = <0x0100f810 0 0 0 0>;
> sandbox,emul = <&swap_case_emul1f>;
> };
> };
> diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
> index 6850003a287..c9a941116a3 100644
> --- a/drivers/core/fdtaddr.c
> +++ b/drivers/core/fdtaddr.c
> @@ -190,3 +190,36 @@ void *devfdt_map_physmem(struct udevice *dev, unsigned 
> long size)
>
> return map_physmem(addr, size, MAP_NOCACHE);
>  }
> +
> +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev)
> +{
> +   ulong addr;
> +
> +   addr = devfdt_get_addr(dev);
> +   if (CONFIG_IS_ENABLED(PCI) && IS_ENABLED(CONFIG_DM_PCI) &&
> +   addr == FDT_ADDR_T_NONE) {
> +   struct fdt_pci_addr pci_addr;
> +   u32 bar;
> +   int ret;
> +
> +   ret = fdtdec_get_pci_addr(gd->fdt_blob,
> + dev_of_offset(dev),
> + FDT_PCI_SPACE_MEM32, "reg",
> + &pci_addr);
> +   if (ret) {
> +   /* try if there is any i/o-mapped register */
> +   ret = fdtdec_get_pci_addr(gd->fdt_blob,
> + dev_of_offset(dev),
> + FDT_PCI_SPACE_IO, "reg",
> + &pci_addr);
> +   if (ret)
> +   return FDT_ADDR_T_NONE;
> +   }
> +   ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
> +   if (ret)
> +   return FDT_ADDR_T_NONE;
> +   addr = bar;
> +   }
> +
> +   return addr;
> +}
> diff --git a/drivers/core/read.c b/drivers/core/read.c
> index fb3dcd9a790..9602e52d1b1 100644
> --- a/drivers/core/read.c
> +++ b/drivers/core/read.c
> @@ -307,3 +307,14 @@ int dev_read_alias_highest_id(const char *stem)
>
> return fdtdec_get_alias_highest_id(gd->fdt_blob, stem);
>  }
> +
> +fdt_addr_t dev_read_addr_pci(struct udevice *dev)
> +{
> +   ulong addr;
> +
> +   addr = dev_read_addr(dev);
> +   if (addr == FDT_ADDR_T_NONE && !of_live_active())
> +   addr = devfdt_get_addr_pci(dev);
> +
> +   return addr;
> +}
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 01f334938ea..754b6e99215 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -440,36 +440,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice 
> *dev)
> int err;
>
> /* try Processor Local Bus device first */
> -   addr = dev_read_addr(dev);
> -#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
> -   if (addr == FDT_ADDR_T_NONE) {
> -   /* then try pci device */
> -   struct fdt_pci_addr pci_addr;
> -   u32 bar;
> -   int ret;
> -
> -   /* we prefer to use a memory-mapped register */
> -   ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
> - FDT_PCI_SPACE_MEM32, "reg",
> - &pci_addr);
> -   if (ret) {
> -