Re: [U-Boot] [PATCH 1/4 v3] x86: baytrail: fix the GPIOBASE address
On 26 April 2015 at 07:52, Bin Meng bmeng...@gmail.com wrote: Hi Gabriel, On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau cont...@huau-gabriel.fr wrote: The correct GPIOBASE address on the baytrail is 0x48 Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr --- Reviewed-by: Bin Meng bmeng...@gmail.com Acked-by: Simon Glass s...@chromium.org Please edit your commit message in the v2 to include such tags like Acked-by, Reviewed-by, etc so that we know the patch status. Also you could take a look at patman which automates the creation of change lists, checking patches, etc. Changes for v2: - Add a commit message Changes for v3: - Fix patch number arch/x86/include/asm/arch-baytrail/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h index ab4e059..4e8987c 100644 --- a/arch/x86/include/asm/arch-baytrail/gpio.h +++ b/arch/x86/include/asm/arch-baytrail/gpio.h @@ -8,6 +8,6 @@ #define _X86_ARCH_GPIO_H_ /* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 +#define PCI_CFG_GPIOBASE 0x48 #endif /* _X86_ARCH_GPIO_H_ */ -- Regards, Bin Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4 v3] x86: baytrail: fix the GPIOBASE address
On 28 April 2015 at 07:53, Simon Glass s...@chromium.org wrote: On 26 April 2015 at 07:52, Bin Meng bmeng...@gmail.com wrote: Hi Gabriel, On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau cont...@huau-gabriel.fr wrote: The correct GPIOBASE address on the baytrail is 0x48 Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr --- Reviewed-by: Bin Meng bmeng...@gmail.com Acked-by: Simon Glass s...@chromium.org Applied to u-boot-x86, thanks! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4 v3] x86: baytrail: fix the GPIOBASE address
Hi Gabriel, On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau cont...@huau-gabriel.fr wrote: The correct GPIOBASE address on the baytrail is 0x48 Signed-off-by: Gabriel Huau cont...@huau-gabriel.fr --- Reviewed-by: Bin Meng bmeng...@gmail.com Please edit your commit message in the v2 to include such tags like Acked-by, Reviewed-by, etc so that we know the patch status. Changes for v2: - Add a commit message Changes for v3: - Fix patch number arch/x86/include/asm/arch-baytrail/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h index ab4e059..4e8987c 100644 --- a/arch/x86/include/asm/arch-baytrail/gpio.h +++ b/arch/x86/include/asm/arch-baytrail/gpio.h @@ -8,6 +8,6 @@ #define _X86_ARCH_GPIO_H_ /* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 +#define PCI_CFG_GPIOBASE 0x48 #endif /* _X86_ARCH_GPIO_H_ */ -- Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
