Re: [U-Boot] [PATCH 11/39] x86: Invalidate TLB as early as possible
On 6 November 2014 20:49, Bin Meng wrote: > On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: >> We should invalidate the TLB right at the start to ensure that we don't get >> false address translations even though paging is disabled. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/x86/cpu/start16.S | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S >> index e718d4b..445d5a1 100644 >> --- a/arch/x86/cpu/start16.S >> +++ b/arch/x86/cpu/start16.S >> @@ -24,6 +24,9 @@ start16: >> /* Set the Cold Boot / Hard Reset flag */ >> movl$GD_FLG_COLD_BOOT, %ebx >> >> + xorl%eax, %eax >> + movl%eax, %cr3/* Invalidate TLB */ >> + >> /* Turn off cache (this might require a 486-class CPU) */ >> movl%cr0, %eax >> orl $(X86_CR0_NW | X86_CR0_CD), %eax >> -- > > Reviewed-by: Bin Meng Applied to u-boot-x86. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/39] x86: Invalidate TLB as early as possible
On Fri, Nov 7, 2014 at 4:20 AM, Simon Glass wrote: > We should invalidate the TLB right at the start to ensure that we don't get > false address translations even though paging is disabled. > > Signed-off-by: Simon Glass > --- > > arch/x86/cpu/start16.S | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S > index e718d4b..445d5a1 100644 > --- a/arch/x86/cpu/start16.S > +++ b/arch/x86/cpu/start16.S > @@ -24,6 +24,9 @@ start16: > /* Set the Cold Boot / Hard Reset flag */ > movl$GD_FLG_COLD_BOOT, %ebx > > + xorl%eax, %eax > + movl%eax, %cr3/* Invalidate TLB */ > + > /* Turn off cache (this might require a 486-class CPU) */ > movl%cr0, %eax > orl $(X86_CR0_NW | X86_CR0_CD), %eax > -- Reviewed-by: Bin Meng ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
