Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
Dear Kumar Gala, In message 1309492845-13117-2-git-send-email-ga...@kernel.crashing.org you wrote: From: Timur Tabi ti...@freescale.com Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset that was being done for erratum SERDES4 (a left-over work-around that was removed in powerpc/85xx: remove SERDES4 soft-reset work-around) also happened to enable bank 3 (apparently an undocumented feature). Now that the reset has been removed, bank 3 was not being enabled for these two SERDES protocols. It turns out that every time we call enable_bank(), we do want at least one lane of the bank enabled, either because the bank is supposed to be enabled, or because we need the clock from that bank enabled. For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we call enable_bank(), because that array is used elsewhere to determine if the bank is available. Also fix an off-by-one error in a printf(). Note that the side effect of these changes is that the work-arounds for these two errata are now linked. Specifically, if SERDES-A001 is enabled, then we need SERDES-8 enabled as well. Signed-off-by: Timur Tabi ti...@freescale.com Acked-by: Ed Swarthout swart...@freescale.com Acked-by: Scott Wood scottw...@freescale.com Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 68 ++--- 1 files changed, 49 insertions(+), 19 deletions(-) Checkpatch says: WARNING: line over 80 characters #127: FILE: arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c:43: +#error CONFIG_SYS_P4080_ERRATUM_SERDES_A001 requires CONFIG_SYS_P4080_ERRATUM_SERDES8 Please clean up and resubmit. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A conservative is a man who believes that nothing should be done for the first time. - Alfred E. Wiggam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
Dear Kumar Gala, In message 28544ac3-1f7f-47d5-b534-c0a7d6540...@kernel.crashing.org you wrote: merged commits, updated commit message, applied to 85xx Please undo / fix the line over 80 characters Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There has been an alarming increase in the number of things you know nothing about. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
Wolfgang Denk wrote: WARNING: line over 80 characters #127: FILE: arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c:43: +#error CONFIG_SYS_P4080_ERRATUM_SERDES_A001 requires CONFIG_SYS_P4080_ERRATUM_SERDES8 Lines like these would be accepted into the Linux kernel. Are the standards for U-boot stricter than for Linux? It appears that you are requiring exact conformance to checkpatch, even when it complains about something that isn't really that bad. -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
On Jul 1, 2011, at 9:06 AM, Tabi Timur-B04825 wrote: Kumar Gala wrote: Ok, Can you send a commit message for when I merge them or repost a merged patch. powerpc/85xx: remove SERDES4 soft-reset work-around Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a bank soft-reset after the bank was configured and enabled, even though enabling a bank causes it to reset. Because the reset was required for multiple errata, it was not properly enclosed in an #ifdef, and so was not removed with all the other rev1 errata work-arounds. Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset also happened to enable bank 3 (apparently an undocumented feature). Simply removing the reset breaks these two protocols. It turns out that every time we call enable_bank(), we do want at least one lane of the bank enabled, either because the bank is supposed to be enabled, or because we need the clock from that bank enabled. For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we call enable_bank(), because that array is used elsewhere to determine if the bank is available. Note that the side effect of these changes is that the work-arounds for these two errata are now linked. Specifically, if SERDES-A001 is enabled, then we need SERDES-8 enabled as well. Because this was the only SERDES bank soft-reset, there is no need to implement a work-around for erratum SERDES-A003. Also fix an off-by-one error in a printf(). merged commits, updated commit message, applied to 85xx - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
Kumar Gala wrote: Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset that was being done for erratum SERDES4 (a left-over work-around that was removed in powerpc/85xx: remove SERDES4 soft-reset work-around) also happened to enable bank 3 (apparently an undocumented feature). Now that the reset has been removed, bank 3 was not being enabled for these two SERDES protocols. Kumar, these two patches should be merged, since the first one breaks SERDES, and this one fixes the problem that the first one exposes. If you add them as separate commits, then you'll break git-bisect. -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
On Jul 1, 2011, at 7:43 AM, Tabi Timur-B04825 wrote: Kumar Gala wrote: Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset that was being done for erratum SERDES4 (a left-over work-around that was removed in powerpc/85xx: remove SERDES4 soft-reset work-around) also happened to enable bank 3 (apparently an undocumented feature). Now that the reset has been removed, bank 3 was not being enabled for these two SERDES protocols. Kumar, these two patches should be merged, since the first one breaks SERDES, and this one fixes the problem that the first one exposes. If you add them as separate commits, then you'll break git-bisect. Ok, Can you send a commit message for when I merge them or repost a merged patch. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 SERDES-A001 on p4080
Kumar Gala wrote: Ok, Can you send a commit message for when I merge them or repost a merged patch. powerpc/85xx: remove SERDES4 soft-reset work-around Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a bank soft-reset after the bank was configured and enabled, even though enabling a bank causes it to reset. Because the reset was required for multiple errata, it was not properly enclosed in an #ifdef, and so was not removed with all the other rev1 errata work-arounds. Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset also happened to enable bank 3 (apparently an undocumented feature). Simply removing the reset breaks these two protocols. It turns out that every time we call enable_bank(), we do want at least one lane of the bank enabled, either because the bank is supposed to be enabled, or because we need the clock from that bank enabled. For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we call enable_bank(), because that array is used elsewhere to determine if the bank is available. Note that the side effect of these changes is that the work-arounds for these two errata are now linked. Specifically, if SERDES-A001 is enabled, then we need SERDES-8 enabled as well. Because this was the only SERDES bank soft-reset, there is no need to implement a work-around for erratum SERDES-A003. Also fix an off-by-one error in a printf(). -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
