[U-Boot] [Resend: U-Boot PATCH v2] keystone: k2h/e/l: Fix DMA coherency for QM PDSP

[Murali Karicheri]

commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.

Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.

Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri 
Acked-by: Nishanth Menon 
Reviewed-by: Tom Rini 
---
 - v2 - fixed the prefix
 - v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
 arch/arm/mach-keystone/init.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
 }
-- 
1.9.1

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[U-Boot] [PATCH v3] keystone: k2h/e/l: Fix DMA coherency for QM PDSP

[Murali Karicheri]

commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.

Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.

Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri 
Acked-by: Nishanth Menon 
Reviewed-by: Tom Rini 
---
 - v3 - fixed the prefix
 - v2 - fixed the prefix
 - v1 - adding Fixes per comments and added Reviewed-by from Tom Rini
 arch/arm/mach-keystone/init.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 3b6d5ef..6e5a1e1 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -101,9 +101,7 @@ static void msmc_k2hkle_common_setup(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_C6X_0);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_ARM);
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_NETCP);
-#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_QM_PDSP);
-#endif
msmc_share_all_segments(K2HKLE_MSMC_SEGMENT_PCIE0);
msmc_share_all_segments(KS2_MSMC_SEGMENT_DEBUG);
 }
-- 
1.9.1

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Re: [U-Boot] [PATCH] configs: rockchip: remove CONFIG_ROCKCHIP_COMMON

[Ziyuan Xu]

Hi kever,
If you intend to remove CONFIG_ROCKCHIP_COMMON, please also remove it in 
Kconfig.(arch/arm/mach-rockchip/rk3036/Kconfig)

And CONFIG_SPL_ROCKCHIP_COMMON?
On 2016年07月20日 11:31, Kever Yang wrote:

The CONFIG_ROCKCHIP_COMMON is no use now, remove it.

Signed-off-by: Kever Yang 
---

  include/configs/rk3036_common.h | 2 --
  include/configs/rk3288_common.h | 1 -
  2 files changed, 3 deletions(-)

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index ae4b101..b003baa 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -40,8 +40,6 @@
  #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
  #define CONFIG_ROCKCHIP_CHIP_TAG  "RK30"
  
-#define CONFIG_ROCKCHIP_COMMON

-
  /* MMC/SD IP block */
  #define CONFIG_MMC
  #define CONFIG_GENERIC_MMC
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 2a36c17..faefd55 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -44,7 +44,6 @@
  #define CONFIG_SPL_STACK  0xff718000
  #define CONFIG_SPL_TEXT_BASE  0xff704004
  
-#define CONFIG_ROCKCHIP_COMMON

  #define CONFIG_SPL_ROCKCHIP_COMMON
  
  #define CONFIG_SILENT_CONSOLE



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Re: [U-Boot] [PATCH 2/4] SECURE_BOOT: Enable chain of trust in SPL framework

[Sumit Garg]

> -Original Message-
> From: york sun
> Sent: Wednesday, July 20, 2016 3:08 AM
> To: Sumit Garg ; u-boot@lists.denx.de
> Cc: Ruchika Gupta ; Prabhakar Kushwaha
> ; tr...@konsulko.com;
> teddy.r...@gmail.com; s...@chromium.org; dannenb...@ti.com; Aneesh
> Bansal 
> Subject: Re: [PATCH 2/4] SECURE_BOOT: Enable chain of trust in SPL framework
> 
> On 06/14/2016 04:36 AM, Sumit Garg wrote:
> > Override jump_to_image_no_args function to include validation of
> > u-boot image using spl_validate_uboot before jumping to u-boot image.
> > Also define macros in SPL framework to enable crypto operations.
> >
> > Reviewed-by: Aneesh Bansal 
> > Signed-off-by: Sumit Garg 
> > ---
> >  arch/arm/include/asm/fsl_secure_boot.h  | 25 +++--
> >  board/freescale/common/fsl_chain_of_trust.c | 34
> > -
> >  2 files changed, 56 insertions(+), 3 deletions(-)
> 
> 
> 
> 
> > diff --git a/board/freescale/common/fsl_chain_of_trust.c
> > b/board/freescale/common/fsl_chain_of_trust.c
> > index 7bf9827..0f5ec35 100644
> > --- a/board/freescale/common/fsl_chain_of_trust.c
> > +++ b/board/freescale/common/fsl_chain_of_trust.c
> > @@ -10,6 +10,10 @@
> >  #include 
> >  #include 
> >
> > +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
> > +#include  #endif
> > +
> >  #ifdef CONFIG_ADDR_MAP
> >  #include 
> >  #endif
> 
> Sumit,
> 
> Does this patch depend on another patch? It doesn't apply cleanly. I wonder if
> you have something else in your local branch.
> 
> York
 
This series of patches is in continuation to [1], [2] and [3]. Please apply 
[1], [2] and [3] before applying this patch series.

Regards,
Sumit

[1] https://patchwork.ozlabs.org/patch/648297/
[2] https://patchwork.ozlabs.org/patch/648298/
[3] https://patchwork.ozlabs.org/patch/648303/ 

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Re: [U-Boot] [PATCH 2/4] SECURE_BOOT: Enable chain of trust in SPL framework

[york sun]

On 06/14/2016 04:36 AM, Sumit Garg wrote:
> Override jump_to_image_no_args function to include validation of
> u-boot image using spl_validate_uboot before jumping to u-boot image.
> Also define macros in SPL framework to enable crypto operations.
>
> Reviewed-by: Aneesh Bansal 
> Signed-off-by: Sumit Garg 
> ---
>  arch/arm/include/asm/fsl_secure_boot.h  | 25 +++--
>  board/freescale/common/fsl_chain_of_trust.c | 34 
> -
>  2 files changed, 56 insertions(+), 3 deletions(-)




> diff --git a/board/freescale/common/fsl_chain_of_trust.c 
> b/board/freescale/common/fsl_chain_of_trust.c
> index 7bf9827..0f5ec35 100644
> --- a/board/freescale/common/fsl_chain_of_trust.c
> +++ b/board/freescale/common/fsl_chain_of_trust.c
> @@ -10,6 +10,10 @@
>  #include 
>  #include 
>
> +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
> +#include 
> +#endif
> +
>  #ifdef CONFIG_ADDR_MAP
>  #include 
>  #endif

Sumit,

Does this patch depend on another patch? It doesn't apply cleanly. I 
wonder if you have something else in your local branch.

York
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Re: [U-Boot] [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue"

[york sun]

On 04/20/2016 06:12 PM, York Sun wrote:
> +Roy to comment on iNIC.
>
> On 04/20/2016 06:05 PM, Qiang Zhao wrote:
>> On 04/21/2016 12:58 AM, York Sun wrote:
>>> -Original Message-
>>> From: York Sun [mailto:york@nxp.com]
>>> Sent: Thursday, April 21, 2016 12:58 AM
>>> To: Qiang Zhao 
>>> Cc: Xiaobo Xie ; u-boot@lists.denx.de
>>> Subject: Re: [PATCH] Revert "T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for
>>> down-training issue"
>>>
>>> On 04/11/2016 02:02 AM, Zhao Qiang wrote:
 This reverts commit 5066e62847bddf6030262ade2aa3e7bcdc930037.

 The reverted patch will block t2080RDB iNiC, it was a workaround for
 T2080QDS down-training issue, we need to revert it and find the root
 cause for T2080QDS down-training issue.
>>>
>>> You have a bad wrap-back in commit message.
>>>
>>> Does the workaround block anything? Can you revert it after figuring out the
>>> root cause?
>>>
>>
>> Yes, it blocks t2080RDB and c29x when using them as iNIC.
>> If revert it after figuring out the root cause, how about iNIC?
>> And I am afraid of it is a hard way to find the root cause.
>>
>
> Qiang,
>
> You delete the code gated by CONFIG_FSL_PCIE_RESET, and the macro for 
> T208xQDS.
> How does that affect T2080RDB or C29x?
>

Qiang,

Do you have an update? If not, I will defer this patch.

York
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Re: [U-Boot] [PATCH] spl: fit: Fix the number of bytes read in raw mode

[Tom Rini]

On Tue, Jul 19, 2016 at 02:56:14PM +0530, Lokesh Vutla wrote:

> In raw mode a full sector is to be read even if image covers part of
> a sector. Number of sectors are calculated as ROUND_UP(size)/sec_size by FIT
> framework. This calculation assumes that image is at the 0th offset of a 
> sector,
> which is not true always in FIT case. So, include the image offset while
> calculating number of sectors.
> 
> Signed-off-by: Lokesh Vutla 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] [PATCH 1/2] ARM: Add save_boot_params for ARMv8

[Tom Rini]

On Mon, Jul 18, 2016 at 05:01:50PM -0600, Stephen Warren wrote:

> From: Stephen Warren 
> 
> Implement a hook to allow boards to save boot-time CPU state for later
> use. When U-Boot is chain-loaded by another bootloader, CPU registers may
> contain useful information such as system configuration information. This
> feature mirrors the equivalent ARMv7 feature.
> 
> Signed-off-by: Stephen Warren 

Reviewed-by: Tom Rini 

-- 
Tom


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Re: [U-Boot] Please pull u-boot-fsl-qoriq master

[Tom Rini]

On Tue, Jul 19, 2016 at 08:29:53PM +, york sun wrote:

> Tom,
> 
> The following changes since commit 3a592a1349ac3961b0f4f2db0a8d9f128225d897:
> 
>Revert "armv8: Enable CPUECTLR.SMPEN for coherency" (2016-07-14 
> 17:36:18 -0400)
> 
> are available in the git repository at:
> 
>git://git.denx.de/u-boot-fsl-qoriq.git
> 
> for you to fetch changes up to 0e68a3694d1f33c69be7d1cec5a4261aa1d3d01d:
> 
>ARMv8/ls1043ardb: Integrate FSL PPA (2016-07-19 11:34:26 -0700)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH] powerpc/85xx: Increase fdt address

[Paul Gortmaker]

[[PATCH] powerpc/85xx: Increase fdt address] On 19/07/2016 (Tue 17:52) Scott 
Wood wrote:

> Loading the fdt at 0xc0 fails if the uncompressed kernel image is
> greater than 12 MiB, which is quite common with modern kernels and
> multiplatform defconfigs.  Move fdtaddr to 0x1e0 which is just under
> the ramdiskaddr on most targets.
> 
> Signed-off-by: Scott Wood 
> Cc: Peter Tyser 
> Cc: Dirk Eibach 
> Cc: Andy Fleming 
> Cc: Paul Gortmaker 
> ---

[...]

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
> index bbd1a63..74f219f 100644
> --- a/include/configs/sbc8548.h
> +++ b/include/configs/sbc8548.h
> @@ -596,7 +596,7 @@
>  "consoledev=ttyS0\0" \
>  "ramdiskaddr=200\0"  \
>  "ramdiskfile=uRamdisk\0" \
> -"fdtaddr=c0\0"   \
> +"fdtaddr=1e0\0"  \

Pretty sure it was common to have to bump the "c" to an "e" now and
again, so "1e" sounds like a better long term solution.  For sbc,

Acked-by: Paul Gortmaker 

Thanks,
Paul.
--

>  "fdtfile=sbc8548.dtb\0"
>  
>  #define CONFIG_NFSBOOTCOMMAND
> \
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[U-Boot] [PATCH] configs: rockchip: remove CONFIG_ROCKCHIP_COMMON

[Kever Yang]

The CONFIG_ROCKCHIP_COMMON is no use now, remove it.

Signed-off-by: Kever Yang 
---

 include/configs/rk3036_common.h | 2 --
 include/configs/rk3288_common.h | 1 -
 2 files changed, 3 deletions(-)

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index ae4b101..b003baa 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -40,8 +40,6 @@
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE  (4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG   "RK30"
 
-#define CONFIG_ROCKCHIP_COMMON
-
 /* MMC/SD IP block */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 2a36c17..faefd55 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -44,7 +44,6 @@
 #define CONFIG_SPL_STACK   0xff718000
 #define CONFIG_SPL_TEXT_BASE   0xff704004
 
-#define CONFIG_ROCKCHIP_COMMON
 #define CONFIG_SPL_ROCKCHIP_COMMON
 
 #define CONFIG_SILENT_CONSOLE
-- 
1.9.1


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Re: [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC

[york sun]

On 01/05/2016 01:57 PM, york@nxp.com wrote:
> On 01/05/2016 01:38 PM, York Sun wrote:
>>
>>
>> On 01/05/2016 10:40 AM, Bryan Hundven wrote:
>>> On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:


 On 12/23/2015 07:40 AM, Bryan Hundven wrote:
> York,
>
> Just checking if you had seen this patch?
>

 Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another 
 patch
 using P2020RDB?
>>>
>>> It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
>>> want to support p2020rdb-pb (which I don't have, and cannot test), you can
>>> ignore this one.
>>>
>>> I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
>>> where I have reverted removing the p1_p2_rdb board, but have started to
>>> clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
>>> it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
>>> and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
>>> add the small difference for p1011rdb/p1020rdb-pb.
>>> What are your opinions on that?
>>
>> I like clean and small changes.
>>
>>>
>>> The things that are difficult right now are:
>>>  * ddr(2) does not use spd on pb?
>>
>> If I remember correctly, these boards have fixed DDR. RAW timing method was
>> introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
>> easy to back port.
>>
>>>  * I have the ltib cds that came with the board, but I still feel like
>>>I'm missing a reference manual that is for the pb version. I can find
>>>the pc and pd versions of the 1020RM online. pb just seems a little
>>>different.
>>
>> These boards are actually made by third parties. I have P1010RDB on my hand. 
>> If
>> you need P1020RDB, I can find it for you.
>>
>
> Bryan,
>
> I checked the last release for P1020RDB. It was on 2010-11-01. The schematic 
> is
> included in the LTIB DVD under help/Hardware/P1020RDB.
>


Bryan,

Where are we on this patch? If you don't want to move forward, I can 
drop this for now.

York

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Re: [U-Boot] [PATCH] usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQ

[Marek Vasut]

On 07/19/2016 07:11 AM, Siva Durga Prasad Paladugu wrote:
> Add Kconfig entry config option for USB_EHCI_ZYNQ
> and update the same to enable for all zynq boards
> which supports USB
> 
> Signed-off-by: Siva Durga Prasad Paladugu 

Looks ok, except for a bit below. Michal, please double-check.

> ---
> - This series is based on latest mainline
> Changes for v2:
> - Moved CONFIG_USB_EHCI_ZYNQ to Kconfig and removed
>   config ZYNQ_USB as per review comment
> ---
>  configs/zynq_microzed_defconfig | 3 +++
>  configs/zynq_picozed_defconfig  | 3 +++
>  configs/zynq_zc702_defconfig| 3 +++
>  configs/zynq_zc706_defconfig| 3 +++
>  configs/zynq_zed_defconfig  | 3 +++
>  configs/zynq_zybo_defconfig | 3 +++
>  drivers/usb/host/Kconfig| 7 +++
>  include/configs/zynq-common.h   | 4 +---
>  include/configs/zynq_microzed.h | 2 --
>  include/configs/zynq_picozed.h  | 2 --
>  include/configs/zynq_zc70x.h| 1 -
>  include/configs/zynq_zed.h  | 2 --
>  include/configs/zynq_zybo.h | 1 -
>  13 files changed, 26 insertions(+), 11 deletions(-)
> 
> diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
> index d88c61b..91d5c82 100644
> --- a/configs/zynq_microzed_defconfig
> +++ b/configs/zynq_microzed_defconfig
> @@ -38,6 +38,9 @@ CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_ZYNQ_GEM=y
>  CONFIG_ZYNQ_QSPI=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
> index aeb1270..6d3aef5 100644
> --- a/configs/zynq_picozed_defconfig
> +++ b/configs/zynq_picozed_defconfig
> @@ -28,6 +28,9 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_ZYNQ_SDHCI=y
>  CONFIG_ZYNQ_GEM=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
> index d68ed0e..57019da 100644
> --- a/configs/zynq_zc702_defconfig
> +++ b/configs/zynq_zc702_defconfig
> @@ -43,6 +43,9 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
>  CONFIG_DEBUG_UART_CLOCK=5000
>  CONFIG_ZYNQ_QSPI=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
> index 8bd9230..e19f34f 100644
> --- a/configs/zynq_zc706_defconfig
> +++ b/configs/zynq_zc706_defconfig
> @@ -39,6 +39,9 @@ CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_ZYNQ_GEM=y
>  CONFIG_ZYNQ_QSPI=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
> index c70b860..6cb8a80 100644
> --- a/configs/zynq_zed_defconfig
> +++ b/configs/zynq_zed_defconfig
> @@ -38,6 +38,9 @@ CONFIG_SPI_FLASH_WINBOND=y
>  CONFIG_ZYNQ_GEM=y
>  CONFIG_ZYNQ_QSPI=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
> index 624545e..cce29bc 100644
> --- a/configs/zynq_zybo_defconfig
> +++ b/configs/zynq_zybo_defconfig
> @@ -41,6 +41,9 @@ CONFIG_DEBUG_UART_BASE=0xe0001000
>  CONFIG_DEBUG_UART_CLOCK=5000
>  CONFIG_ZYNQ_QSPI=y
>  CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI=y
> +CONFIG_USB_EHCI_ZYNQ=y
>  CONFIG_USB_ULPI_VIEWPORT=y
>  CONFIG_USB_ULPI=y
>  CONFIG_USB_GADGET=y
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index 89580cc..202cb29 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -85,6 +85,13 @@ config USB_EHCI_MSM
> This driver supports combination of Chipidea USB controller
> and Synapsys USB PHY in host mode only.
>  
> +config USB_EHCI_ZYNQ
> + bool "Support for Xilinx Zynq on-chip EHCI USB controller"
> + depends on ARCH_ZYNQ
> + default n
> + ---help---
> +   Enable support for Zynq on-chip EHCI USB controller
> +
>  config USB_EHCI_GENERIC
>   bool "Support for generic EHCI USB controller"
>   depends on OF_CONTROL
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index 8dbac87..08b7602 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -86,10 +86,8 @@
>  # define CONFIG_ZYNQ_SDHCI_MAX_FREQ  5200
>  #endif
>  
> -#ifdef CONFIG_ZYNQ_USB
> -# define CONFIG_USB_EHCI
> +#ifdef CONFIG_USB_EHCI_ZYNQ
>  # define CONFIG_USB_STORAGE
> -# define CONFIG_USB_EHCI_ZYNQ
>  # define CONFIG_EHCI_IS_TDI
>  # define CONFIG_USB_MAX_CONTROLLER_COUNT 2

How much of the stuff in this ifdef can be turned into Kconfig options ?
I believe 

[U-Boot] [PATCH] powerpc/86xx: Pass -mcpu=7400 to GCC

[Scott Wood]

Without this, GCC uses the toolchain default, which may be incompatible
with -maltivec.

Signed-off-by: Scott Wood 
---
 arch/powerpc/cpu/mpc86xx/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/cpu/mpc86xx/config.mk 
b/arch/powerpc/cpu/mpc86xx/config.mk
index 69a0b96..aefb0f1 100644
--- a/arch/powerpc/cpu/mpc86xx/config.mk
+++ b/arch/powerpc/cpu/mpc86xx/config.mk
@@ -5,4 +5,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-PLATFORM_CPPFLAGS += -mstring -maltivec -mabi=altivec -msoft-float
+PLATFORM_CPPFLAGS += -mcpu=7400 -mstring -maltivec -mabi=altivec -msoft-float
-- 
2.7.4

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Re: [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC

[Bryan Hundven]

On Tue, Jul 19, 2016 at 2:50 PM, york sun  wrote:
> On 01/05/2016 01:57 PM, york@nxp.com wrote:
>> On 01/05/2016 01:38 PM, York Sun wrote:
>>>
>>>
>>> On 01/05/2016 10:40 AM, Bryan Hundven wrote:
 On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>
>
> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
>> York,
>>
>> Just checking if you had seen this patch?
>>
>
> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another 
> patch
> using P2020RDB?

 It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
 want to support p2020rdb-pb (which I don't have, and cannot test), you can
 ignore this one.

 I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
 where I have reverted removing the p1_p2_rdb board, but have started to
 clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
 it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
 and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
 add the small difference for p1011rdb/p1020rdb-pb.
 What are your opinions on that?
>>>
>>> I like clean and small changes.
>>>

 The things that are difficult right now are:
  * ddr(2) does not use spd on pb?
>>>
>>> If I remember correctly, these boards have fixed DDR. RAW timing method was
>>> introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
>>> easy to back port.
>>>
  * I have the ltib cds that came with the board, but I still feel like
I'm missing a reference manual that is for the pb version. I can find
the pc and pd versions of the 1020RM online. pb just seems a little
different.
>>>
>>> These boards are actually made by third parties. I have P1010RDB on my 
>>> hand. If
>>> you need P1020RDB, I can find it for you.
>>>
>>
>> Bryan,
>>
>> I checked the last release for P1020RDB. It was on 2010-11-01. The schematic 
>> is
>> included in the LTIB DVD under help/Hardware/P1020RDB.
>>
>
>
> Bryan,
>
> Where are we on this patch? If you don't want to move forward, I can
> drop this for now.
>
> York
>

York,

Yea, for now I'm not even tracking u-boot. You can drop this.

-Bryan
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[U-Boot] Please pull u-boot-fsl-qoriq master

[york sun]

Tom,

The following changes since commit 3a592a1349ac3961b0f4f2db0a8d9f128225d897:

   Revert "armv8: Enable CPUECTLR.SMPEN for coherency" (2016-07-14 
17:36:18 -0400)

are available in the git repository at:

   git://git.denx.de/u-boot-fsl-qoriq.git

for you to fetch changes up to 0e68a3694d1f33c69be7d1cec5a4261aa1d3d01d:

   ARMv8/ls1043ardb: Integrate FSL PPA (2016-07-19 11:34:26 -0700)


Hou Zhiqiang (6):
   armv8: fsl-layerscape: add i/d-cache enable function to enable_caches
   ARMv8: add the secure monitor firmware framework
   ARMv8/layerscape: Add FSL PPA support
   ARMv8/Layerscape: switch SMP method accordingly
   ARMv8/PSCI: Fixup the device tree for PSCI
   ARMv8/ls1043ardb: Integrate FSL PPA

York Sun (6):
   armv8: Move secure_ram variable out of generic global data
   armv8: Add tlb_allocated to arch global data
   armv8: mmu: house cleaning
   armv8: mmu: split block if necessary
   armv8: mmu: Add support of non-identical mapping
   armv8: layerscape: Convert to use common MMU framework

  README |   3 +-
  arch/arm/cpu/armv7/virt-dt.c   |  63 
  arch/arm/cpu/armv8/Makefile|   2 +
  arch/arm/cpu/armv8/cache_v8.c  | 112 +++
  arch/arm/cpu/armv8/cpu-dt.c|  31 ++
  arch/arm/cpu/armv8/fsl-layerscape/Makefile |   1 +
  arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 396 
+
  arch/arm/cpu/armv8/fsl-layerscape/fdt.c|  33 +++
  arch/arm/cpu/armv8/fsl-layerscape/ppa.c|  48 +++
  arch/arm/cpu/armv8/s32v234/cpu.c   |  12 +-
  arch/arm/cpu/armv8/sec_firmware.c  | 270 +
  arch/arm/cpu/armv8/sec_firmware_asm.S  |  53 
  arch/arm/cpu/armv8/zynqmp/cpu.c|  21 +-
  arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 310 +++
  arch/arm/include/asm/arch-fsl-layerscape/ppa.h |  16 +
  arch/arm/include/asm/armv8/mmu.h   |   5 +-
  arch/arm/include/asm/armv8/sec_firmware.h  |  22 ++
  arch/arm/include/asm/global_data.h |  15 +
  arch/arm/include/asm/psci.h|   1 +
  arch/arm/lib/Makefile  |   2 +
  arch/arm/lib/bootm-fdt.c   |   2 +-
  arch/arm/lib/psci-dt.c | 123 
  arch/arm/mach-exynos/mmu-arm64.c   |   9 +-
  arch/arm/mach-meson/board.c|   6 +-
  arch/arm/mach-snapdragon/sysmap-apq8016.c  |   6 +-
  arch/arm/mach-sunxi/board.c|   6 +-
  arch/arm/mach-tegra/arm64-mmu.c|   6 +-
  arch/arm/mach-uniphier/arm64/mem_map.c |   6 +-
  board/armltd/vexpress64/vexpress64.c   |   6 +-
  board/cavium/thunderx/thunderx.c   |   9 +-
  board/freescale/ls1043aqds/ddr.c   |  15 +-
  board/freescale/ls1043ardb/ddr.c   |  15 +-
  board/freescale/ls1043ardb/ls1043ardb.c|   8 +-
  board/freescale/ls2080a/ddr.c  |  15 +-
  board/freescale/ls2080aqds/ddr.c   |  15 +-
  board/freescale/ls2080ardb/ddr.c   |  15 +-
  board/hisilicon/hikey/hikey.c  |   6 +-
  board/raspberrypi/rpi/rpi.c|   6 +-
  cmd/bdinfo.c   |   4 +-
  common/board_f.c   |  11 +-
  include/asm-generic/global_data.h  |  14 -
  include/configs/ls1043ardb.h   |  11 +
  42 files changed, 1084 insertions(+), 646 deletions(-)
  create mode 100644 arch/arm/cpu/armv8/cpu-dt.c
  create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
  create mode 100644 arch/arm/cpu/armv8/sec_firmware.c
  create mode 100644 arch/arm/cpu/armv8/sec_firmware_asm.S
  create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h
  create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h
  create mode 100644 arch/arm/lib/psci-dt.c

Thanks.

York
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Re: [U-Boot] [PATCH] armv8/fsl-layerscape: add IFC fixup for LS1043A with QSPI enabled

[york sun]

On 03/30/2016 07:39 PM, Scott Wood wrote:
> On Wed, 2016-03-30 at 06:20 +, Qianyu Gong wrote:



>>
>> Because this muxing can't be changed at runtime.
>> Two ways so far to configure it:
>> 1. SW6[1-4] switches on ls1043aqds board.
>> 2. Modify QIXIS board config registers and reset the board.
>
> These sound like runtime to me -- not compile time.
>

Qianyu,

If one can change mux by either changing switches, or setting QIXIS 
registers, you should be able to read those status and run the fixup, agree?

York

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Re: [U-Boot] [PATCH] armv8/ls1043a: Add MTD partition scheme

[york sun]

On 04/06/2016 10:46 PM, Wenbin Song wrote:
> Hi: York
>
> Please see my inline comments.
>
> Best Regards
> Wenbin Song
>
>> -Original Message-
>> From: York Sun [mailto:york@nxp.com]
>> Sent: Thursday, April 07, 2016 1:18 AM
>> To: Wenbin Song ; Mingkai Hu
>> ; u-boot@lists.denx.de
>> Cc: Qianyu Gong ; Shaohui Xie
>> ; Zhiqiang Hou 
>> Subject: Re: [PATCH] armv8/ls1043a: Add MTD partition scheme
>>
>> On 04/06/2016 12:11 AM, Wenbin Song wrote:
>>> Hi: York
>>>
>>> I set bootargs  as the following steps:
>>>
>>> => env default mtdparts
>>> => printenv mtdparts
>>>
>> mtdparts=mtdparts=6000.nor:1m(nor_bank0_rcw),1m(nor_bank0_uboot)
>> ,1
>>>
>> m(nor_bank0_uboot_env),1m(nor_bank0_fman_uconde),40m(nor_bank0_fit
>> ),1m
>>>
>> (nor_bank4_rcw),1m(nor_bank4_uboot),1m(nor_bank4_uboot_env),1m(nor_
>> ban
>>>
>> k4_fman_ucode),40m(nor_bank4_fit);7e80.flash:1m(nand_uboot),1m(na
>> n
>>> d_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file
>>> _system)
>>> => env default bootargs
>>> => printenv bootargs
>>> bootargs=console=ttyS0,115200 root=/dev/ram0
>>> earlycon=uart8250,mmio,0x21c0500 ${mtdparts}
>>>
>>>
>>> The macro  CONFIG_BOOTARGS  only be extern as an char-string, and it will
>> be spliced into default_environment array .
>>>
>>>  const uchar default_environment[] = { #ifdef  CONFIG_BOOTARGS
>>>   "bootargs=" CONFIG_BOOTARGS "\0"
>>>  #endif
>>>
>>> The variable we use to have $consoledev, $othbootargs  was used in the
>> following cases:
>>>
>>> 858  #define CONFIG_BOOTCOMMAND \
>>> 859 "setenv bootargs root=/dev/ram rw " \
>>> 860 "console=$consoledev,$baudrate $othbootargs;"   \
>>> 861 "setenv ramdiskaddr 0x0200;"\
>>> 862 "setenv fdtaddr 0x00c0;"\
>>> 863 "setenv loadaddr 0x100;"\
>>> 864 "bootm $loadaddr $ramdiskaddr $fdtaddr"
>>>
>>> Because the "setenv"  will be executed  , So the variable could be extended.
>>
>> I see what you mean. I am trying to reduce the environmental variables.
>> Do you need the variable "mtdparts"?
>
> [wenbin]
>
> I export this variable in order to make easier  to modify the bootargs under 
> uboot command-line.
>
> For example:
> =>setenv bootargs  "console=ttyS0,115200  root=/dev/ram0  $mtdparts"
> =>setenv bootargs  "console=ttyLP0,115200  root=/dev/ram0  $mtdparts"
>
> Use the $mtdparts to instead of a long string.
>
>
>> Would it be a better idea to set bootargs using the bootcmd?
> [wenbin]
>
>  yes, It is a good idea.
>  But we need all kinds of  ways to boot kernel  with this  "bootargs".  The 
> bootcmd only can specify one boot-way.
> IOW,  only the way specified by this "bootcmd"  can  execute " setenv  
> bootargs".
> So I want to supply the default bootargs  by the CONFIG_BOOTARGS .
>
>
>>
>> While you are on it, I suggest you take a look at other variables.
>> "console=ttyAMA0,38400n8" is wrong here.
>>
>> We don't have to copy kernel image from NOR flash to DDR if the ramdisk load
>> address is set properly in its file. So you can remove the copying from 
>> bootcmd.
>>
> [wenbin]
>
> Ok, thanks for your advices,  I will modify them on the later patch.
>

Wenbin,

Do you have an update?

York

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Re: [U-Boot] [PATCH v5 0/8] ARMv7: PSCI: add PSCI v1.0 support

[york sun]

On 07/04/2016 07:26 PM, Hongbo Zhang wrote:
> On Mon, Jul 4, 2016 at 9:11 PM, Hans de Goede  wrote:
>> Hi,
>>
>> On 04-07-16 09:20, Hongbo Zhang wrote:
>>>
>>> I said I would send a new iteration of this series, but there are code
>>> dependencies/conflicts with Chenyu's work, so I'd like to wait for a
>>> few more days to see his v2 sent out or even been merged.
>>> During this stage, any review comments are still appreciated, I am
>>> always looking at this.
>>
>>
>> In that case you can probably best base your work on the u-boot-sunxi next
>> branch, that currently still has v1 of Chen-Yu's patches, but I do not think
>> things will change that much:
>>
>> http://git.denx.de/?p=u-boot/u-boot-sunxi.git;a=shortlog;h=refs/heads/next
>>
> OK, I see
>
>> Regards,
>>
>> Hans
>>
>>
>>
>>> Thanks.
>>>
>>> On Thu, Jun 30, 2016 at 1:28 PM, Hongbo Zhang 
>>> wrote:

 On Fri, Jun 24, 2016 at 11:26 PM, york sun  wrote:
>
> On 06/15/2016 12:16 AM, Chen-Yu Tsai wrote:
>>
>> Hi,
>>
>> On Tue, Jun 14, 2016 at 3:01 PM,   wrote:
>>>
>>> From: Hongbo Zhang 
>>>
>>> v5 changes:
>>> - Give up fixing the potential bug of PSCI stack overlap with secure
>>> text end
>>> when there is more CPUs in system. Because I just want to keep this
>>> series as
>>> simple as it could be: adding basic PSCI v1.0 support and adding more
>>> PSCI
>>> v1.0 implements of our platform.
>>> While too compplicated patches in assembly language won't call for
>>> effective
>>> reviews, even I think there is potential bug of PSCI stack, let's fix
>>> it in
>>> sepetated patch later.
>>
>>
>> I've done some patches fixing the stack allocation issue:
>>
>> https://github.com/wens/u-boot-sunxi/commits/c-psci-part2
>>
>> These patches are ready, but I want to add a secure data section still.
>> The data section will be for variables such as target PC, core/cluster
>> power status, context ID, etc.. IMHO this is better than putting stuff
>> at the top or bottom of the stack, and can also be referenced directly.
>>
>
>
> Chenyu,
>
> I see you have been working on PSCI for ARMv7. Can you review Hongbo's
> patch set and give your comment or ack?
>
> York
>
>
 Thank Chenyu for valuable review comments, thank you York.
 Will send another version soon.
>

Hongbo,

Where are we on this thread? Do you have an update?

York
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Re: [U-Boot] [PATCH v3] driver: spi: fsl-qspi: disable AHB buffer prefetch

[york sun]

On 07/11/2016 08:00 PM, Yunhui Cui wrote:
> From: Yunhui Cui 
>
> Errata: A-009282: QuadSPI data pre-fetch can result in incorrect data
> We need this errata workaround when CONFIG_SYS_FSL_QSPI_AHB is enabled.
>
> Signed-off-by: Yunhui Cui 
> ---
>  drivers/spi/fsl_qspi.c | 12 +++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
> index 75cbab2..0354e20 100644
> --- a/drivers/spi/fsl_qspi.c
> +++ b/drivers/spi/fsl_qspi.c
> @@ -438,13 +438,23 @@ static void qspi_enable_ddr_mode(struct fsl_qspi_priv 
> *priv)
>  static void qspi_init_ahb_read(struct fsl_qspi_priv *priv)
>  {
>   struct fsl_qspi_regs *regs = priv->regs;
> + int rx_size = 0x80;
>
>   /* AHB configuration for access buffer 0/1/2 .*/
>   qspi_write32(priv->flags, >buf0cr, QSPI_BUFXCR_INVALID_MSTRID);
>   qspi_write32(priv->flags, >buf1cr, QSPI_BUFXCR_INVALID_MSTRID);
>   qspi_write32(priv->flags, >buf2cr, QSPI_BUFXCR_INVALID_MSTRID);
> +
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009282
> + /*A-009282: QuadSPI data pre-fetch can result in incorrect data
> +  *Workaround: Keep the read data size to 64 bits (8 Bytes), which
> +  *disables the prefetch on the AHB buffer,and prevents this issue
> +  *from occurring.
> + */

Please fix the multi-line comment style, and address Prabhakar's comment.

York

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[U-Boot] [PATCH] powerpc/85xx: Increase fdt address

[Scott Wood]

Loading the fdt at 0xc0 fails if the uncompressed kernel image is
greater than 12 MiB, which is quite common with modern kernels and
multiplatform defconfigs.  Move fdtaddr to 0x1e0 which is just under
the ramdiskaddr on most targets.

Signed-off-by: Scott Wood 
Cc: Peter Tyser 
Cc: Dirk Eibach 
Cc: Andy Fleming 
Cc: Paul Gortmaker 
---
 include/configs/B4860QDS.h   | 4 ++--
 include/configs/BSC9131RDB.h | 2 +-
 include/configs/BSC9132QDS.h | 2 +-
 include/configs/C29XPCIE.h   | 2 +-
 include/configs/MPC8536DS.h  | 2 +-
 include/configs/MPC8544DS.h  | 2 +-
 include/configs/MPC8548CDS.h | 2 +-
 include/configs/MPC8572DS.h  | 2 +-
 include/configs/P1010RDB.h   | 2 +-
 include/configs/P1022DS.h| 2 +-
 include/configs/P1023RDB.h   | 2 +-
 include/configs/P2041RDB.h   | 2 +-
 include/configs/T102xRDB.h   | 2 +-
 include/configs/T1040QDS.h   | 2 +-
 include/configs/T104xRDB.h   | 2 +-
 include/configs/T208xQDS.h   | 2 +-
 include/configs/T208xRDB.h   | 2 +-
 include/configs/T4240QDS.h   | 2 +-
 include/configs/T4240RDB.h   | 2 +-
 include/configs/controlcenterd.h | 2 +-
 include/configs/corenet_ds.h | 2 +-
 include/configs/cyrus.h  | 2 +-
 include/configs/p1_p2_rdb_pc.h   | 2 +-
 include/configs/p1_twr.h | 2 +-
 include/configs/sbc8548.h| 2 +-
 include/configs/xpedite1000.h| 2 +-
 include/configs/xpedite517x.h| 2 +-
 include/configs/xpedite520x.h| 2 +-
 include/configs/xpedite537x.h| 2 +-
 include/configs/xpedite550x.h| 2 +-
 30 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 5249751..444a1fc 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -831,7 +831,7 @@ unsigned long get_board_ddr_clk(void);
"consoledev=ttyS0\0"\
"ramdiskaddr=200\0" \
"ramdiskfile=b4860qds/ramdisk.uboot\0"  \
-   "fdtaddr=c0\0"  \
+   "fdtaddr=1e0\0" \
"fdtfile=b4860qds/b4860qds.dtb\0"   \
"bdev=sda3\0"
 
@@ -869,7 +869,7 @@ unsigned long get_board_ddr_clk(void);
  "setenv bootargs root=/dev/ram rw "   \
  "console=$consoledev,$baudrate $othbootargs;" \
  "setenv ramdiskaddr 0x0200;"  \
- "setenv fdtaddr 0x00c0;"  \
+ "setenv fdtaddr 0x01e0;"  \
  "setenv loadaddr 0x100;"  \
  "bootm $loadaddr $ramdiskaddr $fdtaddr"
 
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index b092933..9e56640 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -404,7 +404,7 @@ extern unsigned long get_sdram_size(void);
"consoledev=ttyS0\0"\
"ramdiskaddr=200\0" \
"ramdiskfile=rootfs.ext2.gz.uboot\0"\
-   "fdtaddr=c0\0"  \
+   "fdtaddr=1e0\0" \
"fdtfile=bsc9131rdb.dtb\0"  \
"bdev=sda1\0"   \
"hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"\
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index aaddfca..4ca9fc0 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -648,7 +648,7 @@ combinations. this should be removed later
"consoledev=ttyS0\0"\
"ramdiskaddr=200\0" \
"ramdiskfile=rootfs.ext2.gz.uboot\0"\
-   "fdtaddr=c0\0"  \
+   "fdtaddr=1e0\0" \
"fdtfile=bsc9132qds.dtb\0"  \
"bdev=sda1\0"   \
CONFIG_DEF_HWCONFIG\
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 1e5b501..a36e6be 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -531,7 +531,7 @@
"consoledev=ttyS0\0"\
"ramdiskaddr=200\0" \
"ramdiskfile=rootfs.ext2.gz.uboot\0"\
-   "fdtaddr=c0\0"  \
+   "fdtaddr=1e0\0" \
"fdtfile=name/of/device-tree.dtb\0" \
"othbootargs=ramdisk_size=60\0" \
 
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 03f17f9..a4e8f55 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -728,7 +728,7 @@
 "consoledev=ttyS0\0"   \
 "ramdiskaddr=200\0"\
 "ramdiskfile=8536ds/ramdisk.uboot\0"   

[U-Boot] [PATCH] powerpc/86xx: Increase boot map size to 256 MiB

[Scott Wood]

This is what Linux maps on classic PPC during boot, and modern kernel
images don't fit within the current 8 MiB uncompressed limit.

Adjust image load addresses to be above this limit to avoid conflicts.

Signed-off-by: Scott Wood 
---
 include/configs/MPC8610HPCD.h | 13 +++--
 include/configs/MPC8641HPCN.h |  9 +
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index f6d45a9..a19f4ab 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -477,7 +477,8 @@
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ   (8 << 20)   /* Initial Memory map for 
Linux*/
+#define CONFIG_SYS_BOOTMAPSZ   (256 << 20) /* Initial Memory map for 
Linux*/
+#define CONFIG_SYS_BOOTM_LEN   (256 << 20) /* Increase max gunzip size */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
@@ -498,7 +499,7 @@
 #define CONFIG_NETMASK 255.255.255.0
 
 /* default location for tftp and bootm */
-#define CONFIG_LOADADDR100
+#define CONFIG_LOADADDR0x1000
 
 #define CONFIG_BOOTDELAY 10/* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */
@@ -567,9 +568,9 @@
"cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)\
" $filesize\0"  \
 "consoledev=ttyS0\0"   \
-"ramdiskaddr=200\0"\
+"ramdiskaddr=0x1800\0" \
 "ramdiskfile=8610hpcd/ramdisk.uboot\0" \
-"fdtaddr=c0\0" \
+"fdtaddr=0x17c0\0" \
 "fdtfile=8610hpcd/mpc8610_hpcd.dtb\0"  \
 "bdev=sda3\0"  \
 "en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \
@@ -605,9 +606,9 @@
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
"consoledev=ttyS0\0"\
-   "ramdiskaddr=200\0" \
+   "ramdiskaddr=0x1800\0"  \
"ramdiskfile=8610hpcd/ramdisk.uboot\0"  \
-   "fdtaddr=c0\0"  \
+   "fdtaddr=0x17c0\0"  \
"fdtfile=8610hpcd/mpc8610_hpcd.dtb\0"   \
"bdev=sda3\0"
 #endif
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 9b2623c..756bb29 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -637,7 +637,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ   (8 << 20)   /* Initial Memory map for 
Linux*/
+#define CONFIG_SYS_BOOTMAPSZ   (256 << 20) /* Initial Memory map for 
Linux*/
+#define CONFIG_SYS_BOOTM_LEN   (256 << 20) /* Increase max gunzip size */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial 
port */
@@ -664,7 +665,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_NETMASK 255.255.255.0
 
 /* default location for tftp and bootm */
-#define CONFIG_LOADADDR100
+#define CONFIG_LOADADDR0x1000
 
 #define CONFIG_BOOTDELAY 10/* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS /* the boot command will set bootargs */
@@ -686,9 +687,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
"cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE)\
" $filesize\0"  \
"consoledev=ttyS0\0"\
-   "ramdiskaddr=200\0" \
+   "ramdiskaddr=0x1800\0"  
\
"ramdiskfile=your.ramdisk.u-boot\0" \
-   "fdtaddr=c0\0"  \
+   "fdtaddr=0x17c0\0"  \
"fdtfile=mpc8641_hpcn.dtb\0"\
"en-wd=mw.b ffdf0010 0x08; echo -expect:- 08; md.b ffdf0010 1\0"
\
"dis-wd=mw.b ffdf0010 0x00; echo -expect:- 00; md.b ffdf0010 1\0" \
-- 
2.7.4

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Re: [U-Boot] [PATCHv7 1/6] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

[york sun]

On 06/28/2016 05:29 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang 
>
> This function assume that the d-cache and MMU has been enabled earlier,
> so it just created MMU table in main memory. But the assumption is not
> always correct, for example, the early setup is done in EL3, while
> enable_caches() is called when the PE has turned into another EL.
>
> Define the function mmu_setup() for fsl-layerscape to cover the weak
> one.
>
> Signed-off-by: Hou Zhiqiang 
> ---
> V7:
>  - no change
>

This set is applied to fsl-qoriq master. Awaiting upstream.
Thanks.

York

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