Re: [U-Boot-Users] How do work qemu_mips image?

2008-06-17 Thread Nobuhiro Iwamatsu 
Hi, Vlad.

2008/6/17 Vlad Lungu <[EMAIL PROTECTED]>:
>> U-boot log:
>>   $ ln -s u-boot.bin mips_bios.bin
>>   $ xps-iwamatsu(iwamatsu:)$ qemu-system-mips -L . /dev/null -nographic
> I think that's the problem. There was a patch to Qemu on April 23 to add 
> flash support
> to the qemu_mips target. Now you have to do qemu-system-mips -pflash 
> filename. Just copy
> u-boot.bin to filename before.
>
>>
>>   U-Boot 1.3.3-00235-ga94f22f-dirty (Jun 16 2008 - 19:18:35)
>>
>>   Board: Qemu -M mips CPU: 24Kf proc_id=0x19300
>>   DRAM:  128 MB
>>   (stopped)
>
> If it says something like " invalid flash size 0Mb " after DRAM: 128 MB then 
> it stops
> that's definitely your problem. Use SVN HEAD from Qemu instead of 0.9.1.

I used newist Qemu and use -pflash option.
Work fine!

Thank you for yor advice.

Best regards,
 Nobuhiro
-- 
--
Nobuhiro Iwamatsu

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Re: [U-Boot-Users] Stops booting after RAM info

2008-06-17 Thread Andrejs Cainikovs 
Wolfgang Denk wrote:
> In message <[EMAIL PROTECTED]> you wrote:
>   
>> As far as I know CFG_MAX_FLASH_BANKS should be set to 1 always.
>> Multiple flash banks in u-boot are not supported.
>> 
>
> H? Who claims so?
>
> What do you think how these boards are working then:
>
> include/configs/ADCIOP.h:#define CFG_MAX_FLASH_BANKS  2   /* max number 
> of memory banks   */
> include/configs/BAB7xx.h:#define CFG_MAX_FLASH_BANKS 2   /* max 
> number of memory banks*/
> include/configs/CCM.h:#define CFG_MAX_FLASH_BANKS 2   /* max number 
> of memory banks   */
> ...
>
> ???
>   
Huh!? Well, there is some time since we have implemented the flash 
support for our board (Atmel AT91RM9200 based),
but at the moment we have done that, as far as I remember it was 
impossible to support both chips we have.
>   
>>  > Flash:  0 kB
>> This message is saying that u-boot was unable to detect the flash chip 
>> itself.
>> The easiest way to get you flash working:
>> 1. add flash id in include/flash.h (check your flash datasheet)
>> 
>
> NO Use the CFI driver instead!!!
>
>   
>> 2. based on board/../flash.c get it working (probably you will need only 
>> sector organization, also a datasheet material)
>> 
>
> NO Do not add custom drivers unless *really*, I mean REALLY
> necessary.
>   
Our boards flash driver is the same as in board/atmel/at91rm9200dk/flash.c
The only thing that was modified is the flash identification routine, as 
there was no support for AT49BV642D.
The flash organization for this chip is the same as in AT49BV6416 which 
exists in the sources, so we haven't changed a lot.

So, I think that's all are board dependent what and where are easier 
and/or faster to implement.
> Best regards,
>
> Wolfgang Denk
>
>   
Kind regards,
Andrejs Cainikovs.

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[U-Boot-Users] [PATCH 1/2] mpc85xx: use IS_E_PROCESSOR macro

2008-06-17 Thread Kim Phillips 
Signed-off-by: Kim Phillips <[EMAIL PROTECTED]>
---
as requested by galak.

 cpu/mpc85xx/cpu.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 2b7e753..a2b11cc 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -97,7 +97,7 @@ int checkcpu (void)
if (cpu) {
puts(cpu->name);
 
-   if (svr & 0x8)
+   if (IS_E_PROCESSOR(svr))
puts("E");
} else {
puts("Unknown");
-- 
1.5.6.rc2.26.g8c37


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[U-Boot-Users] [PATCH 2/2] mpc83xx: move CPU_TYPE_ENTRY over to processor.h

2008-06-17 Thread Kim Phillips 
to avoid this:

cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the 
location of the previous definition

Signed-off-by: Kim Phillips <[EMAIL PROTECTED]>
---
 cpu/mpc83xx/cpu.c   |1 -
 include/asm-ppc/processor.h |7 +++
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 36de78d..cc03f8a 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -44,7 +44,6 @@ int checkcpu(void)
char buf[32];
int i;
 
-#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
const struct cpu_type {
char name[15];
u32 partid;
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 4bfd9f9..cf44f4f 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -979,8 +979,15 @@ struct cpu_type {
 
 struct cpu_type *identify_cpu(uint ver);
 
+#if defined(CONFIG_MPC85xx)
 #define CPU_TYPE_ENTRY(n, v) \
{ .name = #n, .soc_ver = SVR_##v, }
+#else
+#if defined(CONFIG_MPC83XX)
+#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
+#endif
+#endif
+
 
 #ifndef CONFIG_MACH_SPECIFIC
 extern int _machine;
-- 
1.5.6.rc2.26.g8c37


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Re: [U-Boot-Users] Stops booting after RAM info

2008-06-17 Thread Wolfgang Denk 
In message <[EMAIL PROTECTED]> you wrote:
> 
> As far as I know CFG_MAX_FLASH_BANKS should be set to 1 always.
> Multiple flash banks in u-boot are not supported.

H? Who claims so?

What do you think how these boards are working then:

include/configs/ADCIOP.h:#define CFG_MAX_FLASH_BANKS2   /* max number 
of memory banks   */
include/configs/BAB7xx.h:#define CFG_MAX_FLASH_BANKS 2   /* max 
number of memory banks*/
include/configs/CCM.h:#define CFG_MAX_FLASH_BANKS   2   /* max number 
of memory banks   */
include/configs/CPU86.h:#define CFG_MAX_FLASH_BANKS 2   /* max num of 
memory banks  */
include/configs/CPU87.h:#define CFG_MAX_FLASH_BANKS 2   /* max num of 
memory banks  */
include/configs/CU824.h:#define CFG_MAX_FLASH_BANKS 2   /* Max number 
of flash banks*/
include/configs/ELPPC.h:#define CFG_MAX_FLASH_BANKS 2   /* max 
number of memory banks*/
include/configs/EXBITGEN.h:#define CFG_MAX_FLASH_BANKS  5   /* max number 
of memory banks   */
include/configs/IceCube.h:#define CFG_MAX_FLASH_BANKS   2   /* max num of 
memory banks  */
include/configs/LANTEC.h:#define CFG_MAX_FLASH_BANKS2   /* max number 
of memory banks   */
include/configs/M54455EVB.h:#   define CFG_MAX_FLASH_BANKS  2   /* max 
number of memory banks */
include/configs/M54455EVB.h:#   define CFG_MAX_FLASH_BANKS  3   /* max 
number of memory banks */
include/configs/M5475EVB.h:#define CFG_MAX_FLASH_BANKS  2   /* max 
number of memory banks */
include/configs/M5485EVB.h:#define CFG_MAX_FLASH_BANKS  2   /* max 
number of memory banks */
include/configs/MOUSSE.h:#define CFG_MAX_FLASH_BANKS 3   /* Max number 
of flash banks */
include/configs/MPC8349ITX.h:#define CFG_MAX_FLASH_BANKS2   
/* number of banks */
include/configs/MPC8544DS.h:#define CFG_MAX_FLASH_BANKS 2   /* 
number of banks */
include/configs/MPC8548CDS.h:#define CFG_MAX_FLASH_BANKS2   
/* number of banks */
include/configs/MPC8555CDS.h:#define CFG_MAX_FLASH_BANKS2   
/* number of banks */
include/configs/MUSENKI.h:#define CFG_MAX_FLASH_BANKS   2   /* Max number 
of flash banks*/
include/configs/NETPHONE.h:#define CFG_MAX_FLASH_BANKS  2   /* max number 
of memory banks   */
include/configs/NETTA2.h:#define CFG_MAX_FLASH_BANKS2   /* max number 
of memory banks   */
include/configs/OCRTC.h:#define CFG_MAX_FLASH_BANKS 2   /* max number 
of memory banks   */
include/configs/ORSG.h:#define CFG_MAX_FLASH_BANKS  2   /* max number 
of memory banks   */
include/configs/P3G4.h:#define CFG_MAX_FLASH_BANKS  2   /* max number 
of memory banks   */
include/configs/Rattler.h:#define CFG_JFFS2_NUM_BANKS   CFG_MAX_FLASH_BANKS
include/configs/SMN42.h:#define CFG_MAX_FLASH_BANKS 2   /* max number 
of memory banks   */
include/configs/Sandpoint8245.h:#define CFG_MAX_FLASH_BANKS 2   /* max 
number of memory banks   */
include/configs/TQM823L.h:#define CFG_MAX_FLASH_BANKS   2   /* max number 
of memory banks */
include/configs/TQM834x.h: * When CFG_MAX_FLASH_BANKS_DETECT is defined, the 
actual number of Flash
include/configs/TQM834x.h: * tqm834x_num_flash_banks. The value of 
CFG_MAX_FLASH_BANKS_DETECT is only
include/configs/TQM834x.h: * used instead of CFG_MAX_FLASH_BANKS to allocate 
the array flash_info, and
include/configs/TQM834x.h: * CFG_MAX_FLASH_BANKS as the number of actual banks 
on the board, it is
include/configs/TQM834x.h:#define CFG_MAX_FLASH_BANKS_DETECT2
include/configs/TQM834x.h:#define CFG_MAX_FLASH_BANKS (tqm834x_num_flash_banks)
include/configs/TQM855L.h:#define CFG_MAX_FLASH_BANKS   2   /* max number 
of memory banks */
include/configs/TQM85xx.h:#define CFG_MAX_FLASH_BANKS   2   /* number of 
banks  */
include/configs/TQM862L.h:#define CFG_MAX_FLASH_BANKS   2   /* max number 
of memory banks */
include/configs/W7OLMC.h:#define CFG_MAX_FLASH_BANKS2   /* max 
number of memory banks   */
include/configs/W7OLMG.h:#define CFG_MAX_FLASH_BANKS2   /* max 
number of memory banks   */
include/configs/ZUMA.h:#define CFG_MAX_FLASH_BANKS  3   /* max number 
of memory banks   */
include/configs/actux4.h:#define CFG_MAX_FLASH_BANKS2
include/configs/bamboo.h:#define CFG_MAX_FLASH_BANKS3   /* number of 
banks  */
include/configs/bf533-ezkit.h:#define CFG_MAX_FLASH_BANKS   3   /* max 
number of memory banks */
include/configs/c2mon.h:#define CFG_MAX_FLASH_BANKS 2   /* max number 
of memory banks   */
include/configs/cogent_mpc8xx.h:#define CFG_MAX_FLASH_BANKS 2   /* max 
number of memory banks   */
include/configs/ebony.h:#define CFG_MAX_FLASH_BANKS 3

Re: [U-Boot-Users] u-boot and CONFIG_MTD_NAND_ECC_SMC patch

2008-06-17 Thread Scott Wood 
mark roths wrote:
> Sorry if this has been covered already, the problem exists in all the u-boot
> versions I have up to 1.2.0.

1.2.0 is rather old; you should check the latest code when submitting 
bug reports and patches.

> *** ../u-boot-1.1.5/drivers/nand/nand_ecc.c 2006-10-20
> 08:54:33.0 -0700
> --- drivers/nand/nand_ecc.c 2008-06-10 12:59:21.0 -0700
> ***
> *** 118,123 
> --- 118,124 
>  {
>u_char idx, reg1, reg2, reg3;
>int j;
> +   u_char tmp0, tmp1;
> 
>/* Initialize variables */
>reg1 = reg2 = reg3 = 0;
> ***
> *** 140,148 
> --- 141,157 
>/* Create non-inverted ECC code from line parity */
>nand_trans_result(reg2, reg3, ecc_code);
> 
> + #define CONFIG_MTD_NAND_ECC_SMC
>/* Calculate final ECC code */
> + #ifdef CONFIG_MTD_NAND_ECC_SMC
> +   tmp0 = ~ecc_code[0];
> +   tmp1 = ~ecc_code[1];
> +   ecc_code[0] = tmp1;
> +   ecc_code[1] = tmp0;
> + #else
>ecc_code[0] = ~ecc_code[0];
>ecc_code[1] = ~ecc_code[1];
> + #endif

The current code appears to have a similar change already.

In the future, please use unified diffs, avoid whitespace mangling, and 
add a Signed-off-by: line.

-Scott

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Re: [U-Boot-Users] Coldfire 5272C3 Ethernet Support?

2008-06-17 Thread Liew Tsi Chung 
Andrew,
 
Thanks for pointing out the problem. The Ethernet unable to transmit
and causes "TX timeout" is due to timer function (udelay) is not working
properly and used an incorrect timer memory mapped. Please append
defined(CONFIG_M5272) after CONFIG_M5253 in
/include/asm-m68k/timer.h. I will provide the patch sometimes
next week.
 
Regards,
TsiChung
 



From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of
[EMAIL PROTECTED]
Sent: Monday, June 16, 2008 4:37 PM
To: u-boot-users@lists.sourceforge.net
Subject: [U-Boot-Users] Coldfire 5272C3 Ethernet Support?


Is ethernet support currently working for the Coldfire 5272C3 eval board
off the git repository?  Whenever I'm trying to transmit (ping, etc) I'm
getting a "TX timeout" and no packets are making it to the wire.  From
what I can tell my receives aren't going much better.
 
Going back through the archives I found a post from March that seemed to
bring up the same issue but with no visible resolution.  If the tip is
broken does anyone know what the last version that was functional on the
5272C3 was?
 
Thanks,
 
Andrew Beard

This email and any attachments are only for use by the intended
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Re: [U-Boot-Users] Coldfire 547x, Linux and big memory.

2008-06-17 Thread Liew Tsi Chung 
Luigi,

I believe the kernel you retrieve from Freescale side is based on dBug
bootloader and is not u-boot compatible; thus, will cause error when
trying to bring up kernel from u-boot. An engineer is working on the new
update release for 547x_8x soon. Once the kernel is updated, I believe
no update is needed to be done in u-boot side.

Regards,
TsiChung

-Original Message-
From: Luigi 'Comio' Mantellini [mailto:[EMAIL PROTECTED] 
Sent: Thursday, June 05, 2008 2:53 AM
To: U-Boot-Users
Cc: Liew Tsi Chung
Subject: Coldfire 547x, Linux and big memory.

Hi List,
Hi Tsi-Ching Liew,

I'm using u-boot 1.3.2 (trunk) on my application in order to boot the
freescale linux kernel for mcf547x cpus. My application has a lot of
memory (256MB) and this causes difficulties to start the linux kernel.

The Head.S code of the mcf547x Linux Kernel allows a one-to-one TLB map
for the first 16MB of memory (mcf547x can use up to 1M for page). From
this observation it is mandatory that U-BOOT should call the kernel
allowing all structures (board descr., intrd, env and command line) onto
the first 16M of physical RAM.

The solutions can be:

- to use the env variables bootm_low = 0 and bootm_size = 0x100
(16M)
- modify the code of do_bootm function in order to limitate mem_size to
16M
- Pray the Freescale to modify the kernel code in order to use a better
and more flexible initialization code.

I'm studying for smart modifications for Kernel and U-Boot (that hasn't
guilt).


Best regards,

luigi

-- 
 __   Luigi Mantellini
   .'__'. R&D - Software
  (.'  '.)Industrie Dial Face S.p.A.
  ( :==: )Via Canzo, 4
  ('.__.')20068 Peschiera Borromeo (MI), Italy
   '.__.' Tel.: +39 02 5167 2813
  Fax:  +39 02 5167 2459
Ind.  Dial Face   Email: [EMAIL PROTECTED]
www.idf-hit.com   GPG fingerprint: 3DD1 7B71 FBDF 6376 1B4A
   B003 175F E979 907E 1650





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Re: [U-Boot-Users] Stops booting after RAM info

2008-06-17 Thread Alessandro Rubini 

> As far as I know CFG_MAX_FLASH_BANKS should be set to 1 always.
> Multiple flash banks in u-boot are not supported.

I have a system with two banks. 

   u-boot> flinfo

   Bank # 1: CFI conformant FLASH (16 x 16)  Size: 16 MB in 131 Sectors
 Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
 Erase timeout: 4096 ms, write timeout: 1 ms
 Buffer write timeout: 2 ms, buffer size: 64 bytes
   
 Sector Start Addresses:
 6000   RO   60008000   RO   6001   RO   60018000   [...]
   
   Bank # 2: CFI conformant FLASH (16 x 16)  Size: 16 MB in 131 Sectors
 Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
 Erase timeout: 4096 ms, write timeout: 1 ms
 Buffer write timeout: 2 ms, buffer size: 64 bytes
   
 Sector Start Addresses:
 1000   RO   10008000   RO   1001   RO   10018000   [...]

As expected, it also works in the older board with one bank only (no
CFI QRY found for second bank and everything continues as smooth as always).

/alessandro

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Re: [U-Boot-Users] Stops booting after RAM info

2008-06-17 Thread Andrejs Cainikovs 
Hi,

As far as I know CFG_MAX_FLASH_BANKS should be set to 1 always.
Multiple flash banks in u-boot are not supported.

 > Flash:  0 kB
This message is saying that u-boot was unable to detect the flash chip 
itself.
The easiest way to get you flash working:
1. add flash id in include/flash.h (check your flash datasheet)
2. based on board/../flash.c get it working (probably you will need only 
sector organization, also a datasheet material)

Hope this helps.

Regards,
Andrejs Cainikovs.

navin karnam wrote:
> I changed CFG_MAX_FLASH_BANKS from 2 to 1 soi am getting the
> message as
> Flash:  0 kB
> *** Warning - bad CRC, using default environment
>
> and stops there.
>
> On Tue, Jun 17, 2008 at 10:29 AM, navin karnam <[EMAIL PROTECTED] 
> > wrote:
>
> Hi all,
>
> I tried to debug why it is stopping after
>
> DRAM Configuration:
> Bank #0: a000 64 MB
> Bank #1: a400  0 kB
> Bank #2: a800  0 kB
> Bank #3: ac00  0 kB
>
> It is unable to find the flash type;
> and control is not coming out of flash_init() function.
>
> Regards,
> Naveen.
>
> On Mon, Jun 16, 2008 at 1:35 PM, navin karnam
> <[EMAIL PROTECTED] > wrote:
>
>
>
> -- Hi all,
>
> I am new to this list, I planned port u-boot on my board(pxa255),
> followed the procedure in README and i am able to compile the
> uboot.
>
> I loaded the image on board. The messages i got when i boot
> the board
> are
>
> -
> U-Boot 0.4.5 (Jun 16 2008 - 12:24:00)
>
> U-Boot code: A300 -> A301BD30  BSS: -> A301FE98
> DRAM Configuration:
> Bank #0: a000 64 MB
> Bank #1: a400  0 kB
> Bank #2: a800  0 kB
> Bank #3: ac00  0 kB
> -
>
>
> and it stops at that point. Please give me an hint where i am
> making the
> mistake.
>
> Regards,
> Naveen
>
>
>
>
> -- 
>
>
>
>
> -- 
>
> 
>
> -
> Check out the new SourceForge.net Marketplace.
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>
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Re: [U-Boot-Users] [PATCH v4] fdt: add crypto node handling for MPC8{3, 5}xxE processors

2008-06-17 Thread Kumar Gala 

On Jun 16, 2008, at 3:55 PM, Kim Phillips wrote:

> Delete the crypto node if not on an E-processor.  If on 8360 or 834x  
> family,
> check rev and up-rev crypto node (to SEC rev. 2.4 property values)
> if on an 'EA' processor, e.g. MPC8349EA.
>
> Signed-off-by: Kim Phillips <[EMAIL PROTECTED]>
> ---
> diff from v3: prepended "Delete the" to the patch commit message.
> mumble.  Thanks gvb.
>
> common/fdt_support.c|   87 ++ 
> +
> cpu/mpc83xx/fdt.c   |   18 +
> cpu/mpc85xx/fdt.c   |5 ++
> include/asm-ppc/processor.h |9 
> include/fdt_support.h   |6 +++
> include/mpc83xx.h   |7 +++-
> 6 files changed, 131 insertions(+), 1 deletions(-)

Can you fixup cpu/mpc85xx/cpu.c:

 if (svr & 0x8)
 puts("E");

to be
if (IS_E_PROCESSOR(svr)
puts("E");

- k


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Re: [U-Boot-Users] How do work qemu_mips image?

2008-06-17 Thread Vlad Lungu 
Nobuhiro Iwamatsu wrote:
> Hi,  all.
> 
> I want to use MIPS archtechtute on Qemu.
> I compiled qemu_mips and read doc/README.qemu_mips and was going
> to work it, but U-boot boot stopped.
> Is this right behavior?

I forgot to look if the README is the right one, but ...

> Please give me advice to work a qemu_mips image on Qemu.
> 
> ---
> U-boot version:
>   Get from Git tree ( hash:a94f22f08f280905926219e568568964cb9eeb9d)
[snip]
> use Qemu version:
>   0.9.1
> 
> U-boot log:
>   $ ln -s u-boot.bin mips_bios.bin
>   $ xps-iwamatsu(iwamatsu:)$ qemu-system-mips -L . /dev/null -nographic
I think that's the problem. There was a patch to Qemu on April 23 to add flash 
support
to the qemu_mips target. Now you have to do qemu-system-mips -pflash filename. 
Just copy
u-boot.bin to filename before.

> 
>   U-Boot 1.3.3-00235-ga94f22f-dirty (Jun 16 2008 - 19:18:35)
> 
>   Board: Qemu -M mips CPU: 24Kf proc_id=0x19300
>   DRAM:  128 MB
>   (stopped)

If it says something like " invalid flash size 0Mb " after DRAM: 128 MB then it 
stops
that's definitely your problem. Use SVN HEAD from Qemu instead of 0.9.1.

Regards,
Vlad

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Re: [U-Boot-Users] [PATCH][AT91][Re-submit] DataFlash AT45DB021 support

2008-06-17 Thread Sergey Lapin 
Hi, all!

> > On 11:06 Thu 05 Jun , Sergey Lapin wrote:
> > > Some boards based on AT91SAM926X-EK use smaller DF chips to keep
> > > bootstrap, u-boot and its environment, using NAND or other external
> > > storage for kernel and rootfs. This patch adds support for
> > > small 1024x263 chip.
> > > 
> > > Signed-off-by: Sergey Lapin <[EMAIL PROTECTED]>
> > Scott will you handle this patch or I will do?
> > 
> > Best Regards,
> > J.
> 
> It's not NAND; go ahead and take it.
> 
> -Scott
Any updates about this?

Thanks a lot,
S.




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Re: [U-Boot-Users] [PATCH] Add sata sil3114 support (V2)

2008-06-17 Thread Tor Krill 


Hi,

On 5/29/2008, "Tor Krill" <[EMAIL PROTECTED]> wrote:

>Add support for Silicon Images sil3114 sata chip using libata
>
>Changes since last version
>* use debug() print instead of local version
>* Coding standard and whitespace fixes
>
>Signed-off-by: Tor Krill <[EMAIL PROTECTED]>

I have received no comments on the last version of this patch. Any
posibility on getting it added?

/Tor

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Re: [U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support

2008-06-17 Thread Michal Simek 
If you can't find who is it - because I think there is no any special custodian
for disks, Wolfgang Denk is that person.

And please send your emails about U-BOOT directly to mailing list not personally
to me. If you want use to me for a support, we can sign a contract.

Michal


> Sorry Michael but I'm pretty new... how can I know who is it?
> I looked into MAINTAINERS and CREDITS but no disk/ directory found.
> 
> Regards,
> Antonio
> 
> 2008/6/16 Michal Simek <[EMAIL PROTECTED] >:
> 
> 
> 
> > 2008/6/16 Michal Simek <[EMAIL PROTECTED] 
> >>:
> >
> > Hi Antonio
> >
> > I am not responsible for this part of U-BOOT but your patch
> contain
> > coding style
> > violation.
> >
> > Regards,
> > Michal Simek
> >
> > > Logic unit:
> > > Purpose:Add support for bare partitions (no partition table)
> > > Author: Antnoio R. Costa  atmel.com
> 
> > >
> > > Date  : 11 Jun 2008
> > >
> > > Status:
> > > ~~
> > > Some SD cards are not formatted with a partition table but with
> > > just a bare partition at the beginnig of the memory.
> > >
> > > I modified get_partition_info_extended to call test_block_type
> > > as done by print_partition_extended. In this way bare FAT
> partitions
> > > are recognised. Now we need a test for Ext2.
> > >
> > > Signed-off-by: Antonio R. Costa <[EMAIL PROTECTED]
> 
> > >>
> > >
> > > diff --git a/disk/part_dos.c b/disk/part_dos.c
> > > index 4d778ec..e5cc8aa 100644
> > > --- a/disk/part_dos.c
> > > +++ b/disk/part_dos.c
> > > @@ -1,4 +1,7 @@
> > >  /*
> > > + * (C) Copyright 2008 Atmel Corp.
> > > + * Antonio R. Costa  atmel.com
>  >
> > > + *   gmail.com
> 
> > >
> >
> > choose only one email
> >
> >
> > Ok
> >
> >
> >
> >
> > >   * (C) Copyright 2001
> > >   * Raymond Lo, [EMAIL PROTECTED] 
> >
> > >   * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
> 
> > >.
> > > @@ -53,6 +56,11 @@ static inline int le32_to_int(unsigned
> char *le32)
> > >  );
> > >  }
> > >
> > > +static inline int le16_to_int(unsigned char *le16)
> > > +{
> > > +return ((le16[1] << 8) + le16[0]);
> > > +}
> > > +
> >
> > this should be in header file
> >
> >
> > why? le32_to_int is defined in this file just above my function ???
> >
> OK, keep it.
> 
> >
> > >  static inline int is_extended(int part_type)
> > >  {
> > >  return (part_type == 0x5 ||
> > > @@ -166,12 +174,20 @@ static int get_partition_info_extended
> > (block_dev_desc_t *dev_desc, int ext_part
> > >   unsigned char buffer[DEFAULT_SECTOR_SIZE];
> > >   dos_partition_t *pt;
> > >   int i;
> > > -
> > > +
> >
> > Coding style issue.
> >
> > What is this ? Some kind of white spaces instead tabs or what?
> 
> In our initial patch, you had on this line tab - look at it.
> 
> And send this patch with cc to person who is responsible for this
> part of u-boot.
> 
> Michal
> 
> > >   if (dev_desc->block_read (dev_desc->dev,
> ext_part_sector, 1,
> > (ulong *) buffer) != 1) {
> > >   printf ("** Can't read partition table on
> %d:%d **\n",
> > >   dev_desc->dev, ext_part_sector);
> > >   return -1;
> > >   }
> > > +
> > > +/*
> > > + * ARC:  This check is bad:
> > > + * unfortunately both MBR and FAT bootsector
> > > + * have a sign 0x55aa @ 0x1FF
> > > + * I replaced it by test_block_type as in
> > > + * print_partition_extended
> > > +
> > >   if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 ||
> > >   buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
> > >   printf ("bad MBR sector signature 0x%02x%02x\n",
> > > @@ -179,7 +195,19 @@ static int get_partition_info_extended
> > (block_dev_desc_t *dev_desc, int ext_part
> > >   buffer[DOS_PART_MAGIC_OFFSET + 1]);
> >

[U-Boot-Users] Need clarification !!

2008-06-17 Thread Amit Kumar 
Hello Guys,
I have one clarification related to PXA255 code in U-boot.
If in board/pxa255_idp/config.mkTEXT_BASE = 0xa308 (this is RAM 
address in my board)

then because of -Ttext option (in u-boot/config.mk 
file), in U-boot.map file .text section starts from 0xa308 address.
So all the symbols like _start, _armboot_start get 
addresses with respect to 0xa308 address only.
I am using JFLASH to download the code in FLASH and 
running the code from FLASH. I am disabling that part of code which relocates 
the binary from FLASH to RAM.
What I don't understand is when in MAP file all the 
symbols have addresses of RAM then after downloading in FLASH, how code is 
executing?

Regards
Amit Kumar


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[U-Boot-Users] [PATCH][RFC] pci: Divided pci code of the powerpc

2008-06-17 Thread Nobuhiro Iwamatsu 
A source code of pci is written mainly on powerpc.
Macro uses a pci source code of powerpc because other architecture
(ex. SuperH) doesn't work.

I made asm-ppc/pci.h and moved macro of pci.
Other archtecture need to make the following macro in asm-xxx/pci.h
 #define pci_phys_to_mem(dev, addr)  (addr)
 #define pci_mem_to_phys(dev, addr)  (addr)
 #define pci_phys_to_io(dev, addr)   (addr)
 #define pci_io_to_phys(dev, addr)   (addr)

Or have to make a function for pci address conversion.
However, I want comment because I do not know the other architecture.

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 include/asm-ppc/pci.h |   53 +
 include/asm-sh/pci.h  |5 
 include/pci.h |   22 +---
 3 files changed, 59 insertions(+), 21 deletions(-)
 create mode 100644 include/asm-ppc/pci.h

diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
new file mode 100644
index 000..d5f8475
--- /dev/null
+++ b/include/asm-ppc/pci.h
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH 
+ * Andreas Heppel <[EMAIL PROTECTED]>
+ *
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aloong with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_PCI_H
+#define _ASM_PCI_H
+
+extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
+   unsigned long addr, unsigned long 
flags);
+extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose,
+ phys_addr_t addr, unsigned long 
flags);
+
+#define pci_phys_to_bus(dev, addr, flags) \
+   pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags))
+#define pci_bus_to_phys(dev, addr, flags) \
+   pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags))
+
+#define pci_phys_to_mem(dev, addr) pci_phys_to_bus((dev), (addr), 
PCI_REGION_MEM)
+#define pci_mem_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), 
PCI_REGION_MEM)
+#define pci_phys_to_io(dev, addr)  pci_phys_to_bus((dev), (addr), 
PCI_REGION_IO)
+#define pci_io_to_phys(dev, addr)  pci_bus_to_phys((dev), (addr), 
PCI_REGION_IO)
+
+#ifdef CONFIG_MPC824X
+extern void pci_mpc824x_init (struct pci_controller *hose);
+#endif
+
+#ifdef CONFIG_MPC85xx
+extern void pci_mpc85xx_init (struct pci_controller *hose);
+#endif
+
+#endif /* _ASM_PCI_H */
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index bc59491..1f24fb6 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -44,4 +44,9 @@ int pci_sh4_read_config_dword(struct pci_controller *hose,
 int pci_sh4_write_config_dword(struct pci_controller *hose,
pci_dev_t dev, int offset, u32 value);

+#define pci_phys_to_mem(dev, addr) (addr)
+#define pci_mem_to_phys(dev, addr) (addr)
+#define pci_phys_to_io(dev, addr)  (addr)
+#define pci_io_to_phys(dev, addr)  (addr)
+
 #endif /* _ASM_PCI_H_ */
diff --git a/include/pci.h b/include/pci.h
index 1c8e216..9b61635 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -432,21 +432,6 @@ extern __inline__ void pci_set_ops(struct pci_controller 
*hose,

 extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 
cfg_data);

-extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
-   unsigned long addr, unsigned long 
flags);
-extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose,
- phys_addr_t addr, unsigned long 
flags);
-
-#define pci_phys_to_bus(dev, addr, flags) \
-   pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags))
-#define pci_bus_to_phys(dev, addr, flags) \
-   pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags))
-
-#define pci_phys_to_mem(dev, addr) pci_phys_to_bus((dev), (addr), 
PCI_REGION_MEM)
-#define pci_mem_to_phys(dev, addr) pci_bus_to_phys((dev), (addr), 
PCI_REGION_MEM)
-#define pci_phys_to_io(dev, addr)  pci_phys_to_bus((dev), (addr), 
PCI_REGION_IO)
-#define pci_io_to_phys(dev, addr)  pci_bus_to_phys((dev), (addr), 
PCI_REGION_IO)
-
 extern int pci_hose_read_config

[U-Boot-Users] [PATCH 9/9] sh: Update Renesas R2DPlus board

2008-06-17 Thread Nobuhiro Iwamatsu 
New NOR Flash board support and remove old type flash board config.
And Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 include/configs/r2dplus.h |   42 +-
 1 files changed, 9 insertions(+), 33 deletions(-)

diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index c20baca..e269336 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -35,12 +35,6 @@
 #define CONFIG_BOOTARGS"console=ttySC0,115200"
 #define CONFIG_ENV_OVERWRITE   1

-/* Network setting */
-#define CONFIG_NETMASK 255.0.0.0
-#define CONFIG_IPADDR  10.0.192.51
-#define CONFIG_SERVERIP10.0.0.1
-#define CONFIG_GATEWAYIP   10.0.0.1
-
 /* SDRAM */
 #define CFG_SDRAM_BASE (0x8C00)
 #define CFG_SDRAM_SIZE (0x0400)
@@ -60,45 +54,27 @@
 #define CFG_LOAD_ADDR  (CFG_SDRAM_BASE + 32 * 1024 * 1024)
 /* Address of u-boot image in Flash */
 #define CFG_MONITOR_BASE   (CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN(128 * 1024)
+#define CFG_MONITOR_LEN(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN (256 * 1024)
+#define CFG_MALLOC_LEN (1024 * 1024)
 /* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_SIZE  (256)
 #define CFG_BOOTMAPSZ  (8 * 1024 * 1024)

 /*
- * NOR Flash
+ * NOR Flash ( Spantion S29GL256P )
  */
 #define CFG_FLASH_CFI
 #define CFG_FLASH_CFI_DRIVER
-
-#if defined(CONFIG_R2DPLUS_OLD)
-#define CFG_FLASH_BASE (0xA000)
-#define CFG_MAX_FLASH_BANKS (1)/* Max number of
-* Flash memory banks
-*/
-#define CFG_MAX_FLASH_SECT  142
-#define CFG_FLASH_BANKS_LIST{ CFG_FLASH_BASE }
-
-#else /* CONFIG_R2DPLUS_OLD */
-
 #define CFG_FLASH_BASE (0xA000)
-#define CFG_FLASH_CFI_WIDTH0x04/* 32bit */
-#define CFG_MAX_FLASH_BANKS(2)
-#define CFG_MAX_FLASH_SECT 270
-#define CFG_FLASH_BANKS_LIST{ CFG_FLASH_BASE,\
-   CFG_FLASH_BASE + 0x10,\
-   CFG_FLASH_BASE + 0x40,\
-   CFG_FLASH_BASE + 0x70, }
-#endif /* CONFIG_R2DPLUS_OLD */
+#define CFG_MAX_FLASH_BANKS (1)
+#define CFG_MAX_FLASH_SECT  256
+#define CFG_FLASH_BANKS_LIST   { CFG_FLASH_BASE }

 #define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE  0x2
-#define CFG_ENV_SIZE   (CFG_ENV_SECT_SIZE)
-#define CFG_ENV_ADDR   (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-#define CFG_FLASH_ERASE_TOUT   12
-#define CFG_FLASH_WRITE_TOUT   500
+#define CFG_ENV_SECT_SIZE  0x4
+#define CFG_ENV_SIZE(CFG_ENV_SECT_SIZE)
+#define CFG_ENV_ADDR(CFG_MONITOR_BASE + CFG_MONITOR_LEN)

 /*
  * SuperH Clock setting
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 8/9] sh: Update Renesas R7780MP board

2008-06-17 Thread Nobuhiro Iwamatsu 
New NOR Flash board support and remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 include/configs/r7780mp.h |   41 +++--
 1 files changed, 23 insertions(+), 18 deletions(-)

diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 4e89580..1668ba7 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -1,7 +1,7 @@
 /*
  * Configuation settings for the Renesas R7780MP board
  *
- * Copyright (C) 2007 Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
+ * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
  * Copyright (C) 2008 Yusuke Goda <[EMAIL PROTECTED]>
  *
  * See file CREDITS for list of people who contributed to this
@@ -31,7 +31,8 @@
 #define CONFIG_SH4A1
 #define CONFIG_CPU_SH7780  1
 #define CONFIG_R7780MP 1
-#define __LITTLE_ENDIAN 1
+#define CFG_R7780MP_OLD_FLASH  1
+#define __LITTLE_ENDIAN__ 1

 /*
  * Command line configuration.
@@ -59,12 +60,6 @@
 /* check for keypress on bootdelay==0 */
 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/

-/* Network setting */
-#define CONFIG_NETMASK 255.0.0.0
-#define CONFIG_IPADDR  10.0.192.82
-#define CONFIG_SERVERIP10.0.0.1
-#define CONFIG_GATEWAYIP   10.0.0.1
-
 #define CFG_SDRAM_BASE (0x0800)
 #define CFG_SDRAM_SIZE (128 * 1024 * 1024)

@@ -80,22 +75,30 @@
 #define CFG_MEMTEST_START  (CFG_SDRAM_BASE)
 #define CFG_MEMTEST_END(TEXT_BASE - 0x10)

-/* NOR Flash (S29PL127J60TFI130) */
+/* Flash board support */
 #define CFG_FLASH_BASE (0xA000)
-#define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
-#define CFG_MAX_FLASH_BANKS (2)
-#define CFG_MAX_FLASH_SECT  270
-#define CFG_FLASH_BANKS_LIST{ CFG_FLASH_BASE,\
+#ifdef CFG_R7780MP_OLD_FLASH
+/* NOR Flash (S29PL127J60TFI130) */
+# define CFG_FLASH_CFI_WIDTH   FLASH_CFI_32BIT
+# define CFG_MAX_FLASH_BANKS   (2)
+# define CFG_MAX_FLASH_SECT270
+# define CFG_FLASH_BANKS_LIST  { CFG_FLASH_BASE,\
CFG_FLASH_BASE + 0x10,\
CFG_FLASH_BASE + 0x40,\
CFG_FLASH_BASE + 0x70, }
+#else /* CFG_R7780MP_OLD_FLASH */
+/* NOR Flash (Spantion S29GL256P) */
+# define CFG_MAX_FLASH_BANKS   (1)
+# define CFG_MAX_FLASH_SECT256
+# define CFG_FLASH_BANKS_LIST  { CFG_FLASH_BASE }
+#endif /* CFG_R7780MP_OLD_FLASH */

 #define CFG_LOAD_ADDR  (CFG_SDRAM_BASE + 4 * 1024 * 1024)
 /* Address of u-boot image in Flash */
 #define CFG_MONITOR_BASE   (CFG_FLASH_BASE)
-#define CFG_MONITOR_LEN(112 * 1024)
+#define CFG_MONITOR_LEN(256 * 1024)
 /* Size of DRAM reserved for malloc() use */
-#define CFG_MALLOC_LEN (256 * 1024)
+#define CFG_MALLOC_LEN (1204 * 1024)

 /* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_SIZE  (256)
@@ -110,7 +113,7 @@
 #define CFG_FLASH_EMPTY_INFO

 #define CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE  (16 * 1024)
+#define CFG_ENV_SECT_SIZE  (256 * 1024)
 #define CFG_ENV_SIZE   (CFG_ENV_SECT_SIZE)
 #define CFG_ENV_ADDR   (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 #define CFG_FLASH_ERASE_TOUT   12
@@ -141,8 +144,10 @@
 #endif /* CONFIG_CMD_PCI */

 #if defined(CONFIG_CMD_NET)
-/* #define CONFIG_NET_MULTI
-   #define CONFIG_RTL8169 */
+/*
+#define CONFIG_NET_MULTI
+#define CONFIG_RTL8169
+*/
 /* AX88696L Support(NE2000 base chip) */
 #define CONFIG_DRIVER_NE2000
 #define CONFIG_DRIVER_AX88796L
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 6/9] sh: Update Hitachi MS7722SE board

2008-06-17 Thread Nobuhiro Iwamatsu 
Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 include/configs/ms7722se.h |4 
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index 8d92a13..7298e55 100644
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -40,10 +40,6 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_BOOTDELAY   3
 #define CONFIG_BOOTARGS"console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK  255.255.255.0
-#define CONFIG_IPADDR  192.168.0.22
-#define CONFIG_SERVERIP192.168.0.1
-#define CONFIG_GATEWAYIP   192.168.0.1

 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 7/9] sh: Update Renesas Migo-R board

2008-06-17 Thread Nobuhiro Iwamatsu 
Remove network setting from config file.

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 include/configs/MigoR.h |4 
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index 99e1179..fa0e5db 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -45,10 +45,6 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_BOOTDELAY   3
 #define CONFIG_BOOTARGS"console=ttySC0,115200 root=1f01"
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR  192.168.10.100
-#define CONFIG_SERVERIP192.168.10.77
-#define CONFIG_GATEWAYIP   192.168.10.77

 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 5/9] sh: Cleanup source code of SH7763RDP

2008-06-17 Thread Nobuhiro Iwamatsu 
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 board/sh7763rdp/sh7763rdp.c |   17 +
 1 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/board/sh7763rdp/sh7763rdp.c b/board/sh7763rdp/sh7763rdp.c
index 6f9501b..92ac7b7 100644
--- a/board/sh7763rdp/sh7763rdp.c
+++ b/board/sh7763rdp/sh7763rdp.c
@@ -49,19 +49,20 @@ int board_init(void)
 {
vu_short dat;

-   *(vu_short *)(CPU_CMDREG) |= 0x0001;
+   /* Enable mode */
+   writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG);

/* GPIO Setting (eth1) */
-   dat = *(vu_short *)(PSEL1);
-   *(vu_short *)PSEL1 = ((dat & ~0xff00) | 0x2400);
-   *(vu_short *)PFCR = 0;
-   *(vu_short *)PGCR = 0;
-   *(vu_short *)PHCR = 0;
+   dat = inw(PSEL1);
+   writew(((dat & ~0xff00) | 0x2400), PSEL1);
+   writew(0, PFCR);
+   writew(0, PGCR);
+   writew(0, PHCR);

return 0;
 }

-int dram_init (void)
+int dram_init(void)
 {
DECLARE_GLOBAL_DATA_PTR;

@@ -71,6 +72,6 @@ int dram_init (void)
return 0;
 }

-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {
 }
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 3/9] sh: Cleanup source code of R7780MP

2008-06-17 Thread Nobuhiro Iwamatsu 
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 board/r7780mp/r7780mp.c |   22 ++
 1 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/board/r7780mp/r7780mp.c b/board/r7780mp/r7780mp.c
index 1a37711..19c35d3 100644
--- a/board/r7780mp/r7780mp.c
+++ b/board/r7780mp/r7780mp.c
@@ -38,12 +38,12 @@ int checkboard(void)
 int board_init(void)
 {
/* SCIF Enable */
-   *(vu_short*)PHCR = 0x;
+   writew(0x0, PHCR);

return 0;
 }

-int dram_init (void)
+int dram_init(void)
 {
DECLARE_GLOBAL_DATA_PTR;

@@ -53,29 +53,27 @@ int dram_init (void)
return 0;
 }

-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {

 }

-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
 {
/* if reset = 1 IDE reset will be asserted */
-   if (idereset){
-   (*(vu_short *)FPGA_CFCTL) = 0x432;
+   if (idereset) {
+   writew(0x432, FPGA_CFCTL);
 #if defined(CONFIG_R7780MP)
-   (*(vu_short *)FPGA_CFPOW) |= 0x01;
+   writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
 #else
-   (*(vu_short *)FPGA_CFPOW) |= 0x02;
+   writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
 #endif
-   (*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+   writew(0x01, FPGA_CFCDINTCLR);
}
 }

-#if defined(CONFIG_PCI)
 static struct pci_controller hose;
 void pci_init_board(void)
 {
-   pci_sh7780_init( &hose );
+   pci_sh7780_init(&hose);
 }
-#endif
-- 
1.5.5.1



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[U-Boot-Users] [PATCH 4/9] sh: Cleanup source code of R2DPlus

2008-06-17 Thread Nobuhiro Iwamatsu 
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 board/r2dplus/r2dplus.c |   28 +++-
 1 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/board/r2dplus/r2dplus.c b/board/r2dplus/r2dplus.c
index 2ee3ea2..8fb8ff6 100644
--- a/board/r2dplus/r2dplus.c
+++ b/board/r2dplus/r2dplus.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 

 int checkboard(void)
@@ -37,7 +38,7 @@ int board_init(void)
return 0;
 }

-int dram_init (void)
+int dram_init(void)
 {
DECLARE_GLOBAL_DATA_PTR;

@@ -52,25 +53,26 @@ int board_late_init(void)
return 0;
 }

-#define FPGA_BASE  0xA400
-#define FPGA_CFCTL (FPGA_BASE + 0x04)
-#define FPGA_CFPOW (FPGA_BASE + 0x06)
-#define FPGA_CFCDINTCLR(FPGA_BASE + 0x2A)
+#define FPGA_BASE  0xA400
+#define FPGA_CFCTL (FPGA_BASE + 0x04)
+#define CFCTL_EN   (0x432)
+#define FPGA_CFPOW (FPGA_BASE + 0x06)
+#define CFPOW_ON   (0x02)
+#define FPGA_CFCDINTCLR(FPGA_BASE + 0x2A)
+#define CFCDINTCLR_EN  (0x01)

-void ide_set_reset (int idereset)
+void ide_set_reset(int idereset)
 {
/* if reset = 1 IDE reset will be asserted */
-   if (idereset){
-   (*(vu_short *)FPGA_CFCTL) = 0x432;
-   (*(vu_short *)FPGA_CFPOW) |= 0x02;
-   (*(vu_short *)FPGA_CFCDINTCLR) = 0x01;
+   if (idereset) {
+   outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
+   outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
+   outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
}
 }

-#if defined(CONFIG_PCI)
 static struct pci_controller hose;
 void pci_init_board(void)
 {
-   pci_sh7751_init( &hose );
+   pci_sh7751_init(&hose);
 }
-#endif /* CONFIG_PCI */
-- 
1.5.5.1




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[U-Boot-Users] [PATCH 2/9] sh: Cleanup source code of MS7722SE

2008-06-17 Thread Nobuhiro Iwamatsu 
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 board/ms7722se/ms7722se.c |8 
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c
index 0d3d55c..cf02242 100644
--- a/board/ms7722se/ms7722se.c
+++ b/board/ms7722se/ms7722se.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007
+ * Copyright (C) 2007,2008
  * Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
  *
  * Copyright (C) 2007
@@ -43,7 +43,7 @@ int board_init(void)
return 0;
 }

-int dram_init (void)
+int dram_init(void)
 {
DECLARE_GLOBAL_DATA_PTR;

@@ -53,7 +53,7 @@ int dram_init (void)
return 0;
 }

-void led_set_state (unsigned short value)
+void led_set_state(unsigned short value)
 {
-   *((volatile unsigned short *) LED_BASE) = (value & 0xFF);
+   writew(value & 0xFF, LED_BASE);
 }
-- 
1.5.5.1



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[U-Boot-Users] [PATCH 1/9] sh: Cleanup source code of MS7720SE

2008-06-17 Thread Nobuhiro Iwamatsu 
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
 board/ms7720se/ms7720se.c |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/board/ms7720se/ms7720se.c b/board/ms7720se/ms7720se.c
index ad76c0b..af62cdf 100644
--- a/board/ms7720se/ms7720se.c
+++ b/board/ms7720se/ms7720se.c
@@ -40,7 +40,6 @@ int checkboard(void)

 int board_init(void)
 {
-
return 0;
 }

-- 
1.5.5.1





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[U-Boot-Users] [PATCH][RFC] pci: Add check PCI bridge class (Re: [PATCH][RFC] pci: Remove CONFIG_PCI_SKIP_HOST_BRIDGE and Add check PCI class of host bridge)

2008-06-17 Thread Nobuhiro Iwamatsu 
Nobuhiro Iwamatsu wrote:
> Hi, all.
> 
> 2008/5/13 Wolfgang Denk <[EMAIL PROTECTED]>:
>> In message <[EMAIL PROTECTED]> you wrote:
>>> I made the patch that applied your comment.
>>> This patch skips PCI bridge ( Class code : 0x06XX).
>>>
>>> Could you check this patch?
>> Thanks - but note that this will not make it in the v1.3.3 release in
>> any case.
> 
> Does the developer and Board maintainer get a problem with this patch?
> Would you test this patch?

Sorry , I forgot attached patch.

Best regards,
  Nobuhiro
---
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.

This patch add check PCI bridge class.

  - 0x0604 PCI to AGP bridge / PCI to PCI bridge
  - 0x0605 PCI to PCMCIA bridge
  - 0x0606 Nu Bus bridge
  - 0x0607 PCMCIA CardBus controller
  - 0x0608 RACEWay bridge

Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
  drivers/pci/pci.c |   23 +++
  1 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b3ae3b1..39ca130 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -425,14 +425,21 @@ int pci_hose_scan_bus(struct pci_controller *hose, int 
bus)
 dev <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
 dev += PCI_BDF(0,0,1))
{
+   /* Read class register */
+   pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
/* Skip our host bridge */
-   if ( dev == PCI_BDF(hose->first_busno,0,0) ) {
-#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE)  /* don't skip host 
bridge */
-   /*
-* Only skip hostbridge configuration if 
"pciconfighost" is not set
-*/
-   if (getenv("pciconfighost") == NULL) {
-   continue; /* Skip our host bridge */
+   if (dev == PCI_BDF(hose->first_busno,0,0)) {
+   /* CPU to PCI bridge check */
+   if (((class & 0xFF00) == 0x0600) && (class != 0x0680))
+#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */
+   {
+   /*
+* Only skip hostbridge configuration if
+* "pciconfighost" is not set
+*/
+   if (getenv("pciconfighost") == NULL) {
+   continue; /* Skip our host bridge */
+   }
}
  #else
continue; /* Skip our host bridge */
@@ -474,7 +481,7 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)

  #ifdef CONFIG_PCI_SCAN_SHOW
/* Skip our host bridge */
-   if ( dev != PCI_BDF(hose->first_busno,0,0) ) {
+   if (((class & 0xFF00) != 0x0600) || (class == 0x0680)) {
unsigned char int_line;

pci_hose_read_config_byte(hose, dev, 
PCI_INTERRUPT_LINE,
-- 1.5.5.1


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Re: [U-Boot-Users] [PATCH 1/1] FAT Bare Partition Support

2008-06-17 Thread Antonio R. Costa 
2008/6/16 Jerry Van Baren <[EMAIL PROTECTED]>:

> Michal Simek wrote:
>
>> Hi Antonio
>>
>> I am not responsible for this part of U-BOOT but your patch contain coding
>> style
>> violation.
>>
>> Regards,
>> Michal Simek
>>
>>  Logic unit:
>>> Purpose:Add support for bare partitions (no partition table)
>>> Author: Antnoio R. Costa  atmel.com>
>>> Date  : 11 Jun 2008
>>>
>>> Status:
>>> ~~
>>> Some SD cards are not formatted with a partition table but with
>>> just a bare partition at the beginnig of the memory.
>>>
>>> I modified get_partition_info_extended to call test_block_type
>>> as done by print_partition_extended. In this way bare FAT partitions
>>> are recognised. Now we need a test for Ext2.
>>>
>>> Signed-off-by: Antonio R. Costa <[EMAIL PROTECTED]>
>>>
>>> diff --git a/disk/part_dos.c b/disk/part_dos.c
>>> index 4d778ec..e5cc8aa 100644
>>> --- a/disk/part_dos.c
>>> +++ b/disk/part_dos.c
>>>
>>
> [snip]
>
>  +static inline int le16_to_int(unsigned char *le16)
>>> +{
>>> +return ((le16[1] << 8) + le16[0]);
>>> +}
>>> +
>>>
>>
>> this should be in header file
>>
>
> Please use  rather than making Yet Another Define. Note
> that the subdirectory asm gets symlinked to the appropriate arch-specific
> subdirectory and then the right endian munching is selected and it Just
> Works[tm].
>
> PowerPC example:
> <
> http://git.denx.de/?p=u-boot.git;a=blob;f=include/asm-ppc/byteorder.h;h=3f5bcf63a1f980eb0c5e95e458119f55f5855274;hb=HEAD
> >
>


Telling the truth it seems that I've used this function during debug in fact
at a deeper look it seems it disappeared from the code a part the
definition.
Ok I'm going to fix the problem and re-submit.

In these cases is there a special manner to format the subject to make an
explicit reference to a patched patch :) ?

Regards,
Antonio


>
> [snip]
>
>  Regards,
>> Michal Simek
>>
>
> Thanks,
> gvb
>
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