[U-Boot-Users] festively tricuspid
Hei, http://www.capedyinlax[VI]com More solemn oaths, and observe them less than must do, if the truth does not come out. And meanwhile revolution, at which time they emigrated, and for me. We can't send him back now. See, he is cannot tell what 'tis you mean, but i am apt enough in such connections. Like homer, vyasa also nods. Added: what is your ambition? It is very modest, or vyana, or udana?' narada said, 'by whatever beings, they are, verily, gods on earth. I shall knowledge of brahma. it should never be imparted have had passing over the streamthe hsiangshui ours, you might witness a celebration of the day..- Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 07/10] [ARM] TQMA31: adjust voltage regulators in PMIC MC13738
Hi,
Jens Gehrlein wrote:
> +static int adjust_voltages (void)
> +{
> + u32 reg;
> + u32 val;
> + static struct spi_slave *slave = NULL;
> +
> + slave = spi_setup_slave(1, 0, 100,
> + SPI_MODE_2 | SPI_CS_HIGH);
> + if (!slave)
> + return -1;
> +
> + if (spi_claim_bus(slave))
> + return -1;
> +
> + /* Set PMIC arbitration switchers */
> + val = 0x20;
> + reg = 0x1400 | val | 0x8000;
It seems like it's time to create a MC13783 header file containing some helper
macros and symbolic names to the 13783's registers so we can write:
reg = MC13783_READ_CMD(MC_REG_FOO);
...
val = something_symbolic | something_symbolic2;
reg = MC13783_WRITE_CMD(MC_REG_FOO, val);
...
etc..
Also, I'm pretty sure some other i.MX31 boards could benefit from changing some
voltages in U-boot so perhaps we could have a mc13783-reg.c (-reg as in
regulators) file containing stuff like mc13783_set_regulator(MC_VRFDIG,
VRFDIG_1V8)?
> + /*
> + * FIXME: switcher settings 0 and 1.
> + * Kernel hangs when unpacking itself.
> + * Workaround:
> + * Up to now CPU can operate at maximum allowed voltage 1.6 V.
> + */
I suppose you know that 1.6V is only needed if the CPU is clocked at 532MHz, if
it's clocked at 399MHz it can be supplied with 1.2V.
Regards, Magnus
-
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Re: [U-Boot-Users] [PATCH 04/10] [ARM] TQMA31: add new board with i.MX31 processor
Hi, Jens Gehrlein wrote: > diff --git a/board/tqc/tqma31/lowlevel_init.S > b/board/tqc/tqma31/lowlevel_init.S > new file mode 100644 > index 000..50db3a1 > --- /dev/null > +++ b/board/tqc/tqma31/lowlevel_init.S > @@ -0,0 +1,375 @@ > +/* > + * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]> > + * Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]> > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#include > +#include > + > +.macro REG reg, val > + ldr r2, =\reg > + ldr r3, =\val > + str r3, [r2] > +.endm > + > +.macro REG8 reg, val > + ldr r2, =\reg > + ldr r3, =\val > + strb r3, [r2] > +.endm > + > +.macro DELAY loops > + ldr r2, =\loops > +1: > + subsr2, r2, #1 > + nop > + bcs 1b > +.endm > + > + > +/* > + * AIPS setup - Only setup MPROTx registers. > + * The PACR default values are good. > + */ > +.macro init_aips > + > + /* Setup the Peripheral Port Remap register inside the core */ > + ldr r0, =0x4015/* start from AIPS 2GB region */ > + mcr p15, 0, r0, c15, c2, 4 > + > + /* > + * Set all MPROTx to be non-bufferable, trusted for R/W, > + * not forced to user-mode. > + */ > + ldr r0, =0x43F0 How about adding/using symbolic names for i.MX31 register addresses also in the init_aips, init_max, init_m3if and init_drive_strength macros? It helps readability IMO. Regards, Magnus - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board
Hi, Jens Gehrlein skrev: > Hi, > > the following patches introduce the i.MX31 (ARM1136) based board TQMA31. > Used toolchain was ELDK 4.1. > > The first three patches fix some bugs in mxc/mx31 common parts. I compiled > the im31_phycore, the imx31_litekit and the mx31ads U-Boots for this. > But I don't have boards to test them. > > Patch 04/10 cannot successfully be compiled without having Patch 03/10 > applied. > > Patch 03/10 has been on the mailing list in a similar form, but it seems that > nobody picked it up. So I want give it a chance with my patch series. Don't know why those patches weren't picked up, I think they were submitted before the merge window closed. Your patch doesn't fix the bug in mx31_gpio_mux() though. Regards, Magnus - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Reading memory into environment variable
> I am somewhat new to U-Boot development. What further work would be > required to bring this up to mainline U-Boot standard? Well, someone must cook it up as a patch, with proper indentation, based on current tree, add some documentation, and hope it's considered useful. I might try next week, I have to study a little git first /alessandro - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board
> -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf > Of Jens Gehrlein > Sent: 04 July 2008 16:02 > To: u-boot-users@lists.sourceforge.net > Subject: Re: [U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board > > Jens Gehrlein schrieb: > > > Who will pick up this patch series (if there are no > complaints)? Peter? > > Of course, we could put them into the TQ custodian tree. > Awkward, that I forgot this. > So I'm assuming I need take no u-boot-arm actions Regards Peter - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Reading memory into environment variable
Thanks for the help!
Using a proper U-Boot payload script would also be my preferred way, as
suggested by Detlev. However, this isn't my choice to make, it's an
accepted way of doing it already at my company :(
This patch looks about exactly like what I need. In fact I am using
U-Boot 1.2.0, so it's just perfect!
I am somewhat new to U-Boot development. What further work would be
required to bring this up to mainline U-Boot standard?
Thanks & regards,
Martin
On Fri, 4 Jul 2008 16:51:12 +0200, "Alessandro Rubini"
<[EMAIL PROTECTED]> said:
>
> >> 1. Read disk file into RAM
> >> 2. Implement custom "mem2env" command to read memory into environment
> >> variable, with destination variable as ${bootargs}
>
> I've done the same (on u-boot-1.2.0) to read an upgrade script from a
> network file or usb pen. I called the command "setenvram" (bad choice,
> Wolfgang would refuse it). I'm sure later I found something similar
> in mainline, but now I can't find it any more. I may have overlooked
> another command.
>
> Although it's not ready for prime time, I paste it here.
> If useful I can make a proper patch against current git.
>
>
> /* set environment variable from ram -- ARub */
> int do_setenvram(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> {
> unsigned long len, i;
> char *addr;
>
> if (argc != 4) {
> printf ("Usage:\n%s\n", cmdtp->usage);
> return 1;
> }
> addr = (char *)simple_strtol(argv[2], NULL, 16);
> len = simple_strtol(argv[3], NULL, 16);
> if (!addr || !len) {
> printf ("Usage:\n%s\n", cmdtp->usage);
> return 1;
> }
> addr[len] = '\0';
> for (i=0; i/* turn newlines into semicolon */
> if (addr[i]=='\n') addr[i] = ';';
>/* ignore dos-style newlines */
> if (addr[i]=='\r') addr[i] = ' ';
>/* accept sh-comments and discard them */
> if (addr[i]=='#') {
> while (addr[i] && addr[i] != '\n')
> addr[i++] = ' ';
> i--;
> }
> }
> setenv(argv[1], addr);
> return 0;
> }
>
> U_BOOT_CMD(
> setenvram, 4, 0, do_setenvram,
> "setenvram - get environment variable from ram\n",
> "name addr maxlen\n"
> "- set environment variable 'name' from addr 'addr'\n"
> );
>
-
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[U-Boot-Users] [GIT PULL] avr32 update
Hi Wolfgang, Please pull the master branch of the avr32 tree: git://git.denx.de/u-boot-avr32.git master to receive the following updates. I consider all of them to be fixes: Having no users of the new SPI flash framework is a rather serious bug IMO, as it prevents people from testing it. All three patches were posted to the list two weeks ago. Nobody has posted any comments. Haavard Skinnemoen (2): avr32: Fix SPI portmux initialization avr32: Enable SPI flash support on ATNGW100 Peter Ma (1): avr32: Add GPIO manipulation functions board/atmel/atngw100/atngw100.c | 25 + cpu/at32ap/at32ap700x/gpio.c | 56 ++ cpu/at32ap/pio.c | 56 ++ include/asm-avr32/arch-at32ap700x/gpio.h |8 include/configs/atngw100.h |6 +++ 5 files changed, 129 insertions(+), 22 deletions(-) - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board
Jens Gehrlein schrieb: > Who will pick up this patch series (if there are no complaints)? Peter? Of course, we could put them into the TQ custodian tree. Awkward, that I forgot this. Kind regards, Jens - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 1/3] Add initial PPC460SX defines for the cpu/ppc4xx directory.
Hi Feng, On Friday 04 July 2008, [EMAIL PROTECTED] wrote: > From: Feng Kan <[EMAIL PROTECTED]> > > Add AMCC PPC460SX defines to prep for new 460SX boards. Thanks. One general comment: Could you please add "ppc4xx: " as the first word in your patch description/subject? For all 4xx related patches. This way the patches are easier to differentiate from other subsystem patches. Example: ppc4xx: Add initial PPC460SX defines for the cpu/ppc4xx directory Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED] = - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] Reading memory into environment variable
>> 1. Read disk file into RAM
>> 2. Implement custom "mem2env" command to read memory into environment
>> variable, with destination variable as ${bootargs}
I've done the same (on u-boot-1.2.0) to read an upgrade script from a
network file or usb pen. I called the command "setenvram" (bad choice,
Wolfgang would refuse it). I'm sure later I found something similar
in mainline, but now I can't find it any more. I may have overlooked
another command.
Although it's not ready for prime time, I paste it here.
If useful I can make a proper patch against current git.
/* set environment variable from ram -- ARub */
int do_setenvram(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
unsigned long len, i;
char *addr;
if (argc != 4) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
addr = (char *)simple_strtol(argv[2], NULL, 16);
len = simple_strtol(argv[3], NULL, 16);
if (!addr || !len) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
addr[len] = '\0';
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Re: [U-Boot-Users] [PATCH 3/3] Initial framework of the AMCC PPC460SX redwood reference board.
On Friday 04 July 2008, [EMAIL PROTECTED] wrote: > From: Feng Kan <[EMAIL PROTECTED]> > > Add AMCC Redwood reference board that uses the latest > PPC 464 CPU processor combined with a rich mix of peripheral > controllers. The board will support PCIe, mutiple Gig ethernet > ports, advanced hardware RAID assistance and IEEE 1588. Please find some review comments below. > Signed-off-by: Feng Kan <[EMAIL PROTECTED]> > --- > MAINTAINERS |3 + > MAKEALL |1 + > Makefile |3 + > board/amcc/redwood/Makefile | 50 > board/amcc/redwood/config.mk | 42 > board/amcc/redwood/init.S | 77 +++ > board/amcc/redwood/redwood.c | 496 > + board/amcc/redwood/redwood.h | > 50 > board/amcc/redwood/u-boot.lds | 147 > 9 files changed, 869 insertions(+), 0 deletions(-) > create mode 100644 board/amcc/redwood/Makefile > create mode 100644 board/amcc/redwood/config.mk > create mode 100644 board/amcc/redwood/init.S > create mode 100644 board/amcc/redwood/redwood.c > create mode 100644 board/amcc/redwood/redwood.h > create mode 100644 board/amcc/redwood/u-boot.lds > diff --git a/board/amcc/redwood/redwood.c b/board/amcc/redwood/redwood.c > new file mode 100644 > index 000..0587e39 > --- /dev/null > +++ b/board/amcc/redwood/redwood.c > @@ -0,0 +1,496 @@ > +/* > + * This is the main board level file for the Redwood AMCC board. > + * > + * (C) Copyright 2008 > + * Feng Kan, Applied Micro Circuits Corp., [EMAIL PROTECTED] > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + * > + */ > + > +#include > +#include "redwood.h" > +#include > +#include > +#include > +#include > + > +int compare_to_true(char *str); > +char *remove_l_w_space(char *in_str); > +char *remove_t_w_space(char *in_str); > +int get_console_port(void); > + > +static void early_init_EBC(void); > +static int bootdevice_selected(void); > +static void early_reinit_EBC(int); > +static void early_init_UIC(void); > + > +/* >+ +| Define Boot devices > ++- >---*/ +#define BOOT_FROM_8BIT_SRAM 0x00 > +#define BOOT_FROM_16BIT_SRAM 0x01 > +#define BOOT_FROM_32BIT_SRAM 0x02 > +#define BOOT_FROM_8BIT_NAND 0x03 > +#define BOOT_FROM_16BIT_NOR 0x04 > +#define BOOT_DEVICE_UNKNOWN 0xff > + > +/* >+ +| EBC Devices Characteristics > +| Peripheral Bank Access Parameters - EBC_BxAP > +| Peripheral Bank Configuration Register - EBC_BxCR > ++- >---*/ + > +/* > + * 8 bit width SRAM > + * BU Value > + * BxAP : 0x0380 - 0 0111 0 00 00 00 00 00 000 0 0 0 0 0 > + * B0CR : 0xff098000 - BAS = ff0 - 100 11 00 0 > + * B2CR : 0xe7098000 - BAS = e70 - 100 11 00 0 > + */ > +#define EBC_BXAP_8BIT_SRAM EBC_BXAP_BME_DISABLED | \ > +EBC_BXAP_TWT_ENCODE(7) | \ > +EBC_BXAP_BCE_DISABLE| \ > +EBC_BXAP_BCT_2TRANS | \ > +EBC_BXAP_CSN_ENCODE(0) | \ > +EBC_BXAP_OEN_ENCODE(0) | \ > +EBC_BXAP_WBN_ENCODE(0) | \ > +EBC_BXAP_WBF_ENCODE(0) | \ > +EBC_BXAP_TH_ENCODE(0) | \ > +EBC_BXAP_RE_DISABLED| \ > +EBC_BXAP_SOR_DELAYED| \ > +EBC_BXAP_BEM_WRITEONLY | \ > +EBC_BXAP_PEN_DISABLED > + > +#define EBC_BXAP_16BIT_SRAM EBC_BXAP_8BIT_SRAM > +#define EBC_BXAP_32BIT_SRAM EBC_BXAP_8BIT_SRAM > + > +/* > + * NAND flas
[U-Boot-Users] [PATCH 05/10] [ARM] TQMA31: add support for I2C, I2C temperature sensor and I2C-EEPROM
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
board/tqc/tqma31/tqma31.c |6 +
cpu/arm1136/mx31/generic.c| 17 ++
drivers/i2c/mxc_i2c.c | 13 +++
include/asm-arm/arch-mx31/mx31-regs.h | 32 ++
include/asm-arm/arch-mx31/mx31.h |1 +
include/configs/TQMA31.h | 40 +
6 files changed, 109 insertions(+), 0 deletions(-)
diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index 7cec8db..0c67af3 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -49,6 +49,12 @@ static void setup_iomux (void)
mx31_gpio_mux (MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux (MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux (MUX_CTS1__UART1_CTS_B);
+
+ /* Pins for I2C1 */
+ mx31_gpio_mux (MUX_I2C_CLK__I2C1_SCL);
+ mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA);
+ mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD);
+ mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD);
}
int dram_init (void)
diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index bf4c99c..e12 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -90,6 +90,23 @@ void mx31_gpio_mux(unsigned long mode)
__REG(reg) = tmp;
}
+void mx31_pad_ctl (u32 field, u32 val)
+{
+ u32 reg, shift, mask, tmp;
+
+ /* extract 32 bit register address and shifter for bit field */
+ reg = IOMUXC_BASE + (field >> 8);
+ shift = field & 0xFF;
+
+ /* field consists of 10 bits */
+ mask = 0x3FF << shift;
+
+ tmp = __REG(reg);
+ tmp &= ~mask;
+ tmp |= (val << shift) & mask;
+ __REG(reg) = tmp;
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 6f9306f..68d2720 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -209,4 +209,17 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf,
int len)
return 0;
}
+int i2c_get_bus_speed(void)
+{
+ return -1;
+}
+
+int i2c_set_bus_speed (unsigned int speed)
+{
+ if (speed != CFG_I2C_SPEED)
+ return -1;
+
+ return 0;
+}
+
#endif /* CONFIG_HARD_I2C */
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h
b/include/asm-arm/arch-mx31/mx31-regs.h
index ea15108..c0e516f 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -168,6 +168,9 @@
#define MUX_CTL_CSPI2_SS2 0x87
#define MUX_CTL_CSPI2_MOSI 0x8b
+#define MUX_CTL_I2C_CLK0xa2
+#define MUX_CTL_I2C_DAT0xa3
+
/* The modes a specific pin can be in
* these macros can be used in mx31_gpio_mux() and have the form
* MUX_[contact name]__[pin function]
@@ -180,6 +183,35 @@
#define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
#define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
+#define MUX_I2C_CLK__I2C1_SCL ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK)
+#define MUX_I2C_DAT__I2C1_SDA ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT)
+
+/* bits in the SW_PAD_CTL registers */
+#define PAD_CTL_LOOPBACK_DIS (0 << 9)
+#define PAD_CTL_LOOPBACK_ENA (1 << 9)
+#define PAD_CTL_IPP_PUE_DIS(0 << 7)
+#define PAD_CTL_IPP_PUE_KEEPER (2 << 7)
+#define PAD_CTL_IPP_PUE_PULL (3 << 7)
+#define PAD_CTL_IPP_PUS_100K_DN(0 << 5)
+#define PAD_CTL_IPP_PUS_100K_UP(1 << 5)
+#define PAD_CTL_IPP_HYS_STD(0 << 4)
+#define PAD_CTL_IPP_HYS_SCHMITT(1 << 4)
+#define PAD_CTL_IPP_ODE_STD(0 << 3)
+#define PAD_CTL_IPP_ODE_OD (1 << 3)
+#define PAD_CTL_IPP_DSE_STD(0 << 1)
+#define PAD_CTL_IPP_DSE_HIGH (1 << 1)
+#define PAD_CTL_IPP_DSE_MAX(2 << 1)
+#define PAD_CTL_IPP_SRE_SLOW (0 << 0)
+#define PAD_CTL_IPP_SRE_FAST (1 << 0)
+
+/* bit fields in the SW_PAD_CTL registers, offsets based on IOMUXC_BASE */
+#definePAD_CTL_IO1_SHIFT 0
+#definePAD_CTL_IO2_SHIFT 10
+#definePAD_CTL_IO3_SHIFT 20
+#define PAD_CTL_I2C_CLK((0x21C << 8) |
PAD_CTL_IO2_SHIFT)
+#define PAD_CTL_I2C_DAT((0x21C << 8) |
PAD_CTL_IO1_SHIFT)
+
+
/*
* Memory regions and CS
*/
diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h
index 0552c27..7b784e6 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/include/asm-arm/arch-mx31/mx31.h
@@ -26,5 +26,6 @@
extern u32 mx31_get_ipg_clk(void);
extern void mx31_gpio_mux(unsigned long mode);
+extern void mx31_pad_ctl (u32 field, u32 val);
#endif /* __ASM_ARCH_MX31_H */
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index 255355d..f96fd74 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31
[U-Boot-Users] [PATCH 07/10] [ARM] TQMA31: adjust voltage regulators in PMIC MC13738
VRFDIG: 1.875 V -> 1.8 V
VGEN: 1.5 V -> 1.8 V
VDIG: 1.5 V -> 1.3 V
Unused PMIC switchers and regulators are disabled
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
board/tqc/tqma31/tqma31.c | 142 +
include/configs/TQMA31.h |2 +
2 files changed, 144 insertions(+), 0 deletions(-)
diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index c704c41..abb8db0 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -22,6 +22,7 @@
#include
#include
+#include
#include
#include
@@ -70,6 +71,132 @@ static void setup_iomux (void)
mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0);
}
+static int adjust_voltages (void)
+{
+ u32 reg;
+ u32 val;
+ static struct spi_slave *slave = NULL;
+
+ slave = spi_setup_slave(1, 0, 100,
+ SPI_MODE_2 | SPI_CS_HIGH);
+ if (!slave)
+ return -1;
+
+ if (spi_claim_bus(slave))
+ return -1;
+
+ /* Set PMIC arbitration switchers */
+ val = 0x20;
+ reg = 0x1400 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ /* Set PMIC regulator enable to 0x0 */
+ val = 0x00;
+ reg = 0x2000 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ /*
+* Set PMIC regulator setting 0
+* VRFDIG = 1,8V / reset value = 1,875V
+* VGEN = 1,8V / reset value = 1,5V
+* VDIG = 1,3V / reset value = 1,5V
+*/
+ val = 0x63cdc;
+ reg = 0x3c00 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ /*
+* Set PMIC regulator mode 0 to 0x24924
+* VAUDIO = on
+* VIOH= off
+* VIOLO = on
+* VDIG= on
+* VGEN= on
+* VRFDIG = on
+* VRFREF = on
+* VRFCP = on
+*/
+ val = 0x249241;
+ reg = 0x4000 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ /*
+* Set PMIC regulator mode 1 to 0x0
+* VSIM= off
+* VESIM = off
+* VCAM= off
+* VRFBG = off
+* VVIB= off
+* VRF1= off
+* VRF2= off
+* VMMC1 = off
+* VMMC2 = off
+*/
+ val = 0x0;
+ reg = 0x4200 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ /*
+* FIXME: switcher settings 0 and 1.
+* Kernel hangs when unpacking itself.
+* Workaround:
+* Up to now CPU can operate at maximum allowed voltage 1.6 V.
+*/
+ /*
+* Set PMIC switcher setting 0
+* SW1A = 1,2V / reset value = 1,6V
+* SW1ADVS = 1,6V / reset value = 1,6V
+* SW1ASTBY = 1,2V / reset value = 1,6V
+*/
+ /*
+ val = 0xc70c;
+ reg = 0x3000 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+ */
+
+ /*
+* Set PMIC switcher setting 1
+* SW1A = 1,2V / reset value = 1,6V
+* SW1ADVS = 1,6V / reset value = 1,6V
+* SW1ASTBY = 1,2V / reset value = 1,6V
+*/
+ /*
+ val = 0xc70c;
+ reg = 0x3200 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+ */
+
+ /*
+* Set PMIC switcher setting 5
+* SW5 = 5V
+* SW5 = off
+*/
+ val = 0x021605;
+ reg = 0x3A00 | val | 0x8000;
+ if (spi_xfer(slave, 32, (uchar *)®, (uchar *)&val,
+ SPI_XFER_BEGIN | SPI_XFER_END))
+ return -1;
+
+ spi_release_bus(slave);
+ spi_free_slave(slave);
+
+ return 0;
+}
+
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
@@ -112,3 +239,18 @@ int checkboard (void)
printf ("Board: TQMA31\n");
return 0;
}
+
+int board_late_init(void)
+{
+ /*
+* Must call this function in late init stage, because the SPI driver,
+* required by this function, uses malloc(). The malloc space has not
+* been setup in the board_init() stage.
+*/
+ if (adjust_voltages ()) {
+ printf ("Adjusting voltages
[U-Boot-Users] [PATCH 09/10] [ARM] TQMA31: add FPGA configuration flash
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
board/tqc/tqma31/tqma31.c |6 ++
include/asm-arm/arch-mx31/mx31-regs.h |1 +
include/configs/TQMA31.h |7 +--
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index dd2bb0a..30584fe 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -36,6 +36,12 @@ static void setup_chipselects (void)
__REG (CSCR_L(0)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
| CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
+ /* FPGA configuration flash on CS1 */
+ __REG (CSCR_U(1)) = CSCR_U_CNC_3 | CSCR_U_WSC_13 | CSCR_U_EDC_4;
+ __REG (CSCR_A(1)) = CSCR_A_RWA_2 | CSCR_A_RWN_2 | CSCR_A_LBN_2_MUM0;
+ __REG (CSCR_L(1)) = CSCR_L_OEA_10 | CSCR_L_EBWA_3 | CSCR_L_EBWN_3 \
+ | CSCR_L_EBC_ONLY_WA | CSCR_L_DSZ_16_MUM0 | CSCR_L_CSEN;
+
/* Ethernet controller on CS4 */
__REG (CSCR_U(4)) = CSCR_U_CNC_1 | CSCR_U_WSC_22 | CSCR_U_EDC_4;
__REG (CSCR_A(4)) = CSCR_A_RWA_2 | CSCR_A_RWN_15;
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h
b/include/asm-arm/arch-mx31/mx31-regs.h
index 407b2c6..69d7614 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -84,6 +84,7 @@
#define CSCR_U_WSC_9 0x0900
#define CSCR_U_WSC_12 0x0C00
#define CSCR_U_WSC_22 0x1600
+#define CSCR_U_WSC_13 0x0D00
#define CSCR_U_EDC_4 0x0004
#define CSCR_U_EDC_13 0x000D
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index a174940..504cb57 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -89,18 +89,21 @@
#define CFG_FLASH_BASE CS0_BASE
/* Max number of memory banks */
-#define CFG_MAX_FLASH_BANKS4
+#define CFG_MAX_FLASH_BANKS5
/*
* Bank start addresses.
* 4 x 32 MiB is the maximum for user and U-Boot code. Please adapt the list
* as well as CFG_MAX_FLASH_BANKS to your TQM. Also consider dual die chips
* or single die chips, e.g. one dual die chip represents two banks.
+ * The fifth bank is a separate chip for the FPGA configuration. It's
+ * controlled by chipselect 1.
*/
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE,\
CFG_FLASH_BASE + 32*1024*1024, \
CFG_FLASH_BASE + 64*1024*1024, \
- CFG_FLASH_BASE + 96*1024*1024}
+ CFG_FLASH_BASE + 96*1024*1024, \
+ CS1_BASE}
/* Max number of sectors on one chip */
#define CFG_MAX_FLASH_SECT 259
-
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[U-Boot-Users] [PATCH 06/10] [ARM] TQMA31: add support for SPI and SPI device MC13783-RTC
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]> --- board/tqc/tqma31/tqma31.c | 13 + include/asm-arm/arch-mx31/mx31-regs.h | 12 include/configs/TQMA31.h | 20 3 files changed, 45 insertions(+), 0 deletions(-) diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c index 0c67af3..c704c41 100644 --- a/board/tqc/tqma31/tqma31.c +++ b/board/tqc/tqma31/tqma31.c @@ -55,6 +55,19 @@ static void setup_iomux (void) mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA); mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD); mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD); + + /* Pins for SPI2 */ + mx31_gpio_mux (MUX_CSPI2_MOSI__CSPI2_MOSI); + mx31_gpio_mux (MUX_CSPI2_MISO__CSPI2_MISO); + mx31_gpio_mux (MUX_CSPI2_SS0__CSPI2_SS0_B); + mx31_gpio_mux (MUX_CSPI2_SCLK__CSPI2_CLK); + mx31_pad_ctl (PAD_CTL_CSPI2_SS0, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SS1, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SS2, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SCLK, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_SPI_RDY, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_MISO, 0); + mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0); } int dram_init (void) diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index c0e516f..4d661e8 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -183,6 +183,11 @@ #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI) #define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO) +#define MUX_CSPI2_MOSI__CSPI2_MOSI ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MOSI) +#define MUX_CSPI2_MISO__CSPI2_MISO ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MISO) +#define MUX_CSPI2_SS0__CSPI2_SS0_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS0) +#define MUX_CSPI2_SCLK__CSPI2_CLK ((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SCLK) + #define MUX_I2C_CLK__I2C1_SCL ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK) #define MUX_I2C_DAT__I2C1_SDA ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT) @@ -208,6 +213,13 @@ #definePAD_CTL_IO1_SHIFT 0 #definePAD_CTL_IO2_SHIFT 10 #definePAD_CTL_IO3_SHIFT 20 +#define PAD_CTL_CSPI2_SS2 ((0x1F4 << 8) | PAD_CTL_IO3_SHIFT) +#define PAD_CTL_CSPI2_SCLK ((0x1F4 << 8) | PAD_CTL_IO2_SHIFT) +#define PAD_CTL_CSPI2_SPI_RDY ((0x1F4 << 8) | PAD_CTL_IO1_SHIFT) +#define PAD_CTL_CSPI2_MISO ((0x1F8 << 8) | PAD_CTL_IO3_SHIFT) +#define PAD_CTL_CSPI2_SS0 ((0x1F8 << 8) | PAD_CTL_IO2_SHIFT) +#define PAD_CTL_CSPI2_SS1 ((0x1F8 << 8) | PAD_CTL_IO1_SHIFT) +#define PAD_CTL_CSPI2_MOSI ((0x1FC << 8) | PAD_CTL_IO1_SHIFT) #define PAD_CTL_I2C_CLK((0x21C << 8) | PAD_CTL_IO2_SHIFT) #define PAD_CTL_I2C_DAT((0x21C << 8) | PAD_CTL_IO1_SHIFT) diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h index f96fd74..ac81a32 100644 --- a/include/configs/TQMA31.h +++ b/include/configs/TQMA31.h @@ -191,6 +191,24 @@ /*** + * SPI + **/ + +/* Use the processor internal controller */ +#define CONFIG_HARD_SPI1 +#define CONFIG_MXC_SPI 1 + +/* 0=CSPI1, 1=CSPI2, 2=CSPI3 */ +#define CONFIG_DEFAULT_SPI_BUS 1 + +/* SCLK polarity: high; chipselect: active high */ +#define CONFIG_DEFAULT_SPI_MODE(SPI_MODE_2 | SPI_CS_HIGH) + +/* Add PMIC RTC driver */ +#define CONFIG_RTC_MC13783 1 + + +/*** * Commands **/ @@ -201,6 +219,8 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE /*** - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 10/10] [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver
Some Linux drivers like the smc911x driver, as used on TQMA31, rely on the MAC
address
in the appropriate register, but U-Boot resets the controller after every
transfer.
A patch for the Linux driver is necessary to extract the MAC address from the
kernel
boot parameter line and set the MAC address register accordingly.
This patch adds the paramater "ethaddr" to the U-Boot default environment so
that the
user cannot forget it.
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
include/configs/TQMA31.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index 504cb57..e9e5d78 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -275,6 +275,7 @@
"jtag=on " \
"console=ttymxc0,115200\0" \
"bootargs_nfs=setenv bootargs ${bootargs} " \
+ "ethaddr=${ethaddr} " \
"root=/dev/nfs "\
"ip=${ipaddr}:${serverip}:${gatewayip}:"\
"${netmask}:${hostname}:${netdev}:off " \
-
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[U-Boot-Users] [PATCH 08/10] [ARM] TQMA31: adjust pad property of IPU pin FPSHIFT for the display
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]> --- board/tqc/tqma31/tqma31.c |7 +++ include/asm-arm/arch-mx31/mx31-regs.h |1 + 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c index abb8db0..dd2bb0a 100644 --- a/board/tqc/tqma31/tqma31.c +++ b/board/tqc/tqma31/tqma31.c @@ -69,6 +69,13 @@ static void setup_iomux (void) mx31_pad_ctl (PAD_CTL_CSPI2_SPI_RDY, 0); mx31_pad_ctl (PAD_CTL_CSPI2_MISO, 0); mx31_pad_ctl (PAD_CTL_CSPI2_MOSI, 0); + + /* Pins for IPU */ + mx31_pad_ctl (PAD_CTL_FPSHIFT, PAD_CTL_IPP_PUE_PULL \ + | PAD_CTL_IPP_PUS_100K_DN \ + | PAD_CTL_IPP_HYS_STD \ + | PAD_CTL_IPP_ODE_STD \ + | PAD_CTL_IPP_SRE_FAST); } static int adjust_voltages (void) diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 4d661e8..407b2c6 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -213,6 +213,7 @@ #definePAD_CTL_IO1_SHIFT 0 #definePAD_CTL_IO2_SHIFT 10 #definePAD_CTL_IO3_SHIFT 20 +#define PAD_CTL_FPSHIFT((0x184 << 8) | PAD_CTL_IO1_SHIFT) #define PAD_CTL_CSPI2_SS2 ((0x1F4 << 8) | PAD_CTL_IO3_SHIFT) #define PAD_CTL_CSPI2_SCLK ((0x1F4 << 8) | PAD_CTL_IO2_SHIFT) #define PAD_CTL_CSPI2_SPI_RDY ((0x1F4 << 8) | PAD_CTL_IO1_SHIFT) - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 04/10] [ARM] TQMA31: add new board with i.MX31 processor
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]> --- MAINTAINERS |4 MAKEALL |1 Makefile |3 board/tqc/tqma31/Makefile | 48 board/tqc/tqma31/config.mk|2 board/tqc/tqma31/lowlevel_init.S | 375 + board/tqc/tqma31/tqma31.c | 95 board/tqc/tqma31/u-boot.lds | 72 ++ include/asm-arm/arch-mx31/mx31-regs.h | 42 include/configs/TQMA31.h | 271 10 files changed, 913 insertions(+), 0 deletions(-) create mode 100644 board/tqc/tqma31/Makefile create mode 100644 board/tqc/tqma31/config.mk create mode 100644 board/tqc/tqma31/lowlevel_init.S create mode 100644 board/tqc/tqma31/tqma31.c create mode 100644 board/tqc/tqma31/u-boot.lds create mode 100644 include/configs/TQMA31.h diff --git a/MAINTAINERS b/MAINTAINERS index a3d70b1..dff1757 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -591,6 +591,10 @@ Michael Schwingen <[EMAIL PROTECTED]> actux3 xscale actux4 xscale +Jens Gehrlein <[EMAIL PROTECTED]> + + TQMA31 i.MX31 + # # x86 Systems: # # # diff --git a/MAKEALL b/MAKEALL index 32caab7..4e442c5 100755 --- a/MAKEALL +++ b/MAKEALL @@ -524,6 +524,7 @@ LIST_ARM11="\ imx31_litekit \ imx31_phycore \ mx31ads \ + TQMA31 \ " # diff --git a/Makefile b/Makefile index 8bfc891..e3ade25 100644 --- a/Makefile +++ b/Makefile @@ -2664,6 +2664,9 @@ imx31_phycore_config : unconfig mx31ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31 +TQMA31_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm1136 tqma31 tqc mx31 + # # i386 # diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile new file mode 100644 index 000..ed403e8 --- /dev/null +++ b/board/tqc/tqma31/Makefile @@ -0,0 +1,48 @@ +# +# Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]> +# Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]> +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS := tqma31.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/tqc/tqma31/config.mk b/board/tqc/tqma31/config.mk new file mode 100644 index 000..19df69e --- /dev/null +++ b/board/tqc/tqma31/config.mk @@ -0,0 +1,2 @@ +TEXT_BASE = 0x8ff0 + diff --git a/board/tqc/tqma31/lowlevel_init.S b/board/tqc/tqma31/lowlevel_init.S new file mode 100644 index 000..50db3a1 --- /dev/null +++ b/board/tqc/tqma31/lowlevel_init.S @@ -0,0 +1,375 @@ +/* + * Copyright (C) 2008, Guennadi Liakhovetski <[EMAIL PROTECTED]> + * Copyright (C) 2008, Jens Gehrlein <[EMAIL PROTECTED]> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
[U-Boot-Users] [PATCH 03/10] [ARM] MX31: fix typos in defines for UART and SPI IO multiplexer pins
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]> --- board/imx31_litekit/imx31_litekit.c |2 +- board/imx31_phycore/imx31_phycore.c |4 ++-- board/mx31ads/mx31ads.c |2 +- include/asm-arm/arch-mx31/mx31-regs.h |4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/imx31_litekit/imx31_litekit.c b/board/imx31_litekit/imx31_litekit.c index 263dd9f..8cbc26e 100644 --- a/board/imx31_litekit/imx31_litekit.c +++ b/board/imx31_litekit/imx31_litekit.c @@ -50,7 +50,7 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* SPI2 */ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2); diff --git a/board/imx31_phycore/imx31_phycore.c b/board/imx31_phycore/imx31_phycore.c index 42ecb1e..ae93444 100644 --- a/board/imx31_phycore/imx31_phycore.c +++ b/board/imx31_phycore/imx31_phycore.c @@ -54,11 +54,11 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* setup pins for I2C2 (for EEPROM, RTC) */ mx31_gpio_mux(MUX_CSPI2_MOSI__I2C2_SCL); - mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SCL); + mx31_gpio_mux(MUX_CSPI2_MISO__I2C2_SDA); gd->bd->bi_arch_number = 447; /* board id for linux */ gd->bd->bi_boot_params = (0x8100); /* adress of boot parameters */ diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c index dd0e150..b6928fc 100644 --- a/board/mx31ads/mx31ads.c +++ b/board/mx31ads/mx31ads.c @@ -55,7 +55,7 @@ int board_init (void) mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); - mx31_gpio_mux(MUX_RTS1__UART1_CTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); /* SPI2 */ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2); diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 02b7dcb..abe61f0 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -133,10 +133,10 @@ #define MUX_RXD1__UART1_RXD_MUX((MUX_CTL_FUNC << 8) | MUX_CTL_RXD1) #define MUX_TXD1__UART1_TXD_MUX((MUX_CTL_FUNC << 8) | MUX_CTL_TXD1) #define MUX_RTS1__UART1_RTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_RTS1) -#define MUX_RTS1__UART1_CTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1) +#define MUX_CTS1__UART1_CTS_B ((MUX_CTL_FUNC << 8) | MUX_CTL_CTS1) #define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI) -#define MUX_CSPI2_MISO__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO) +#define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO) /* * Memory regions and CS - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH 01/10] [ARM] MXC: insert bus busy check in i2c_probe
On fast CPUs the time between two chip queries can become too short
to issue clear start and stop conditions. The bus seems to be blocked.
This cannot be compensated by just waiting for completed byte transfer.
The patch introduces polling of the bus busy bit in the I2C
controller's status register before the next bus access is possible.
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
drivers/i2c/mxc_i2c.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index a218329..6f9306f 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -115,6 +115,16 @@ static int rx_byte(void)
int i2c_probe(uchar chip)
{
int ret;
+ int timeout = 10;
+
+ /* Check if bus is busy before probing next chip */
+ while ((__REG16(I2C_BASE + I2SR) & I2SR_IBB) && --timeout)
+ udelay(1);
+
+ if (timeout == 0) {
+ printf ("\nerror: bus blocked\n");
+ return -1;
+ }
__REG16(I2C_BASE + I2CR) = 0; /* Reset module */
__REG16(I2C_BASE + I2CR) = I2CR_IEN;
-
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[U-Boot-Users] [PATCH 02/10] [ARM] MX31: fix bit masks in function mx31_decode_pll()
Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.
Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
cpu/arm1136/mx31/generic.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index 29c08c1..bf4c99c 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -27,8 +27,8 @@
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
u32 mfi = (reg >> 10) & 0xf;
- u32 mfn = reg & 0x3f;
- u32 mfd = (reg >> 16) & 0x3f;
+ u32 mfn = reg & 0x3ff;
+ u32 mfd = (reg >> 16) & 0x3ff;
u32 pd = (reg >> 26) & 0xf;
mfi = mfi <= 5 ? 5 : mfi;
-
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[U-Boot-Users] [PATCH 00/10] [ARM] TQMA31: new board
Hi, the following patches introduce the i.MX31 (ARM1136) based board TQMA31. Used toolchain was ELDK 4.1. The first three patches fix some bugs in mxc/mx31 common parts. I compiled the im31_phycore, the imx31_litekit and the mx31ads U-Boots for this. But I don't have boards to test them. Patch 04/10 cannot successfully be compiled without having Patch 03/10 applied. Patch 03/10 has been on the mailing list in a similar form, but it seems that nobody picked it up. So I want give it a chance with my patch series. Who will pick up this patch series (if there are no complaints)? Peter? Kind regards, Jens --- Jens Gehrlein (10): [ARM] TQMA31: new kernel param. to pass the eth MAC addr to the Linux eth chip driver [ARM] TQMA31: add FPGA configuration flash [ARM] TQMA31: adjust pad property of IPU pin FPSHIFT for the display [ARM] TQMA31: adjust voltage regulators in PMIC MC13738 [ARM] TQMA31: add support for SPI and SPI device MC13783-RTC [ARM] TQMA31: add support for I2C, I2C temperature sensor and I2C-EEPROM [ARM] TQMA31: add new board with i.MX31 processor [ARM] MX31: fix typos in defines for UART and SPI IO multiplexer pins [ARM] MX31: fix bit masks in function mx31_decode_pll() [ARM] MXC: insert bus busy check in i2c_probe MAINTAINERS |4 MAKEALL |1 Makefile |3 board/imx31_litekit/imx31_litekit.c |2 board/imx31_phycore/imx31_phycore.c |4 board/mx31ads/mx31ads.c |2 board/tqc/tqma31/Makefile | 48 board/tqc/tqma31/config.mk|2 board/tqc/tqma31/lowlevel_init.S | 375 + board/tqc/tqma31/tqma31.c | 269 board/tqc/tqma31/u-boot.lds | 72 ++ cpu/arm1136/mx31/generic.c| 21 ++ drivers/i2c/mxc_i2c.c | 23 ++ include/asm-arm/arch-mx31/mx31-regs.h | 92 include/asm-arm/arch-mx31/mx31.h |1 include/configs/TQMA31.h | 337 ++ 16 files changed, 1248 insertions(+), 8 deletions(-) create mode 100644 board/tqc/tqma31/Makefile create mode 100644 board/tqc/tqma31/config.mk create mode 100644 board/tqc/tqma31/lowlevel_init.S create mode 100644 board/tqc/tqma31/tqma31.c create mode 100644 board/tqc/tqma31/u-boot.lds create mode 100644 include/configs/TQMA31.h - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH 2/3] Add initial PPC460SX reference board (redwood) config file and defines.
On Friday 04 July 2008, [EMAIL PROTECTED] wrote: > From: Feng Kan <[EMAIL PROTECTED]> > > Add config file for AMCC redwood reference board for PPC460SX. > Also include defines for PPC460SX processor. Thanks. Please find some review comments below. > Signed-off-by: Feng Kan <[EMAIL PROTECTED]> > --- > include/asm-ppc/ppc4xx-sdram.h |3 +- > include/asm-ppc/processor.h|4 + > include/configs/redwood.h | 211 > include/ppc440.h | > 20 +++-- > include/ppc4xx.h |3 +- > 5 files changed, 232 insertions(+), 9 deletions(-) > create mode 100644 include/configs/redwood.h > > diff --git a/include/asm-ppc/ppc4xx-sdram.h > b/include/asm-ppc/ppc4xx-sdram.h index 83931f1..6eb8209 100644 > --- a/include/asm-ppc/ppc4xx-sdram.h > +++ b/include/asm-ppc/ppc4xx-sdram.h > @@ -282,7 +282,8 @@ > * Memory Bank 0-7 configuration > */ > #if defined(CONFIG_440SPE) || \ > -defined(CONFIG_460EX) || defined(CONFIG_460GT) > +defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ > +defined(CONFIG_460SX) > #define SDRAM_RXBAS_SDBA_MASK0xFFE0 /* Base address > */ > #define SDRAM_RXBAS_SDBA_ENCODE(n) u32)(n))&0xFFE0)>>2) > #define SDRAM_RXBAS_SDBA_DECODE(n) u32)(n))&0xFFE0)<<2) > diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h > index 5b50679..7f1e34f 100644 > --- a/include/asm-ppc/processor.h > +++ b/include/asm-ppc/processor.h > @@ -810,6 +810,10 @@ > #define PVR_460EX_RA 0x130218A3 /* 460EX rev A without Security Engine */ > #define PVR_460GT_SE_RA 0x130218A0 /* 460GT rev A with Security Engine > > */ #define PVR_460GT_RA 0x130218A1 /* 460GT rev A without Security > Engine > */ +#define PVR_460SX_RA0x13541800 /* 460SX rev A */ > +#define PVR_460SX_RA_V1 0x13541801 /* 460SX rev A Variant 1 Security > disabled */ +#define PVR_460GX_RA0x13541802 /* 460GX rev A > */ +#define PVR_460GX_RA_V1 0x13541803 /* 460GX rev A Variant 1 > Security disabled */ #define PVR_601 0x0001 > #define PVR_602 0x0005 > #define PVR_603 0x0003 > diff --git a/include/configs/redwood.h b/include/configs/redwood.h > new file mode 100644 > index 000..bf4468b > --- /dev/null > +++ b/include/configs/redwood.h > @@ -0,0 +1,211 @@ > +/* > + * Configuration for AMCC 460SX Ref (redwood) > + * > + * (C) Copyright 2008 > + * Feng Kan, Applied Micro Circuits Corp., [EMAIL PROTECTED] > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > +#ifndef __CONFIG_H > +#define __CONFIG_H > + > +/*--- > + * High Level Configuration Options > + *--*/ > +#define CONFIG_4xx 1 /* ... PPC4xx family*/ > +#define CONFIG_440 1 /* ... PPC460 family*/ > +#define CONFIG_460SX 1 /* ... PPC460 family*/ > +#define CONFIG_BOARD_EARLY_INIT_F1 /* Call board_pre_init */ > + > +/*--- > + * Include common defines/options for all AMCC boards > + *--*/ > +#define CONFIG_HOSTNAME redwood > + > +#include "amcc-common.h" > + > +#define CONFIG_SYS_CLK_FREQ /* external freq to pll */ > + > +/*--- > + * Base addresses -- Note these are effective addresses where the > + * actual resources get mapped (not physical addresses) > + *--*/ > +#define CFG_FLASH_BASE 0xfff0 /* start of FLASH > */ > +#define CFG_PERIPHERAL_BASE 0xa000 /* internal peripherals */ > +#define CFG_ISRAM_BASE 0x9000 /* internal SRAM > */ > + > +#define CFG_PCI_BASE 0xd000 /* internal PCI regs*/ > + > +#define CFG_PCIE_MEMBASE0x9000 /* mapped
Re: [U-Boot-Users] Reading memory into environment variable
Hi Martin,
> I wish to read the kernel command line parameters in from a disk file
> located e.g. on a FAT file system. My current idea is to implement it
> like this:
>
> 1. Read disk file into RAM
> 2. Implement custom "mem2env" command to read memory into environment
> variable, with destination variable as ${bootargs}
>
> As far as I can see, I am not reinventing any wheels by doing this, but
> does anyone know a better way?
I've seen the dbox guys doing something similar, although IIRC that
solution wasn't quite generic and was hacked into board specific code.
Thinking about it some more, if you can use mkimage somewhere in
userspace, you could create a script file, load that to ram and execute
it. This is very generic and not limited to setting environment
variables.
Thinking about that some more, maybe we could teach "autoscr" also to
run commands from a memory address without it being wrapped with
mkimage. This is also very generic but prone to errors...
Cheers
Detlev
--
0x2B | ~0x2B
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
-
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[U-Boot-Users] PATCH: mpc85xx set lcb clock (CONFIG_CCB_CLCKDIV)
Hi,
Here is a patch to add support for manually setting the system (CCB)
clock divider for MPC85xx boards.
This patch introduces a new macro CONFIG_CCB_CLCKDIV, whose value
should be set to the desired clock divider. If the macro is not
defined, this patch has no effect.
As an example, the new option can be used in the board config file
like this:
#define CONFIG_CCB_CLCKDIV 4
The patch is against git commit:
a524e112b424c6843800ea2f19d3a8cf01d0aa94
John Ogness
Signed-off-by: John Ogness <[EMAIL PROTECTED]>
Add support for manually setting the system (CCB) clock divider.
This patch introduces a new macro CONFIG_CCB_CLCKDIV, whose value should
be set to the desired clock divider. If the macro is not defined, this
patch has no effect. For the MPC85xx boards, the clock divider defaults
to a value of 8.
As an example, the new option can be used in the board config file like
this:
#define CONFIG_CCB_CLCKDIV 4
Signed-off-by: John Ogness <[EMAIL PROTECTED]>
---
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index baf8b81..94dce72 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -69,6 +69,31 @@ struct cpu_type *identify_cpu(u32 ver)
return NULL;
}
+#ifdef CONFIG_CCB_CLCKDIV
+void set_lcb_clock(uint clkdiv)
+{
+ volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+ uint lcrr;
+
+ switch (clkdiv) {
+ case 2:
+ case 4:
+ case 8:
+ lcrr = lbc->lcrr;
+ lcrr &= ~0xf;
+ lcrr |= clkdiv;
+ lbc->lcrr = lcrr;
+ lcrr = lbc->lcrr;
+ __asm__ __volatile__ ("isync" : : : "memory");
+ break;
+
+ default:
+ /* invalid CCB system clock divider */
+ break;
+ }
+}
+#endif
+
int checkcpu (void)
{
sys_info_t sysinfo;
@@ -91,6 +116,10 @@ int checkcpu (void)
major = SVR_MAJ(svr);
minor = SVR_MIN(svr);
+#ifdef CONFIG_CCB_CLCKDIV
+ set_lcb_clock(CONFIG_CCB_CLCKDIV);
+#endif
+
puts("CPU: ");
cpu = identify_cpu(ver);
-
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Re: [U-Boot-Users] u-boot and OneNAND
Hello, Thanks a lot for patch. With this patch we will have possibility to load file from JFFS2 into memory and execute this which is fine. But what is proper way for storing JFFS2 image in OneNAND? If I can create JFFS2 partiion in u-boot, how I can store files in? Do we need to have Linux up and runing? Thanks in advance Mile On Fri, Jul 4, 2008 at 5:33 AM, Kyungmin Park <[EMAIL PROTECTED]> wrote: > On Fri, Jul 4, 2008 at 9:57 AM, Jerry Van Baren <[EMAIL PROTECTED]> > wrote: > > Kyungmin Park wrote: > >> > >> On Thu, Jul 3, 2008 at 1:58 PM, Kyungmin Park <[EMAIL PROTECTED]> > >> wrote: > >>> > >>> Hi, > >>> > >>> On Wed, Jul 2, 2008 at 8:55 PM, Mile Davidovic <[EMAIL PROTECTED]> > >>> wrote: > > Hello > If I read code correctly u-boot have OneNAND driver. But when I check > JFFS2 > in u-boot it seems that JFFS2 can not work on OneNAND. > >>> > >>> Yes, it's not yet implemented. > >>> > >> > >> Feel free to use this patch. > >> the mtdparts and fsload is working, but I'm not suer it's working > >> correctly. > >> > >> Thank you, > >> Kyungmin Park > >> --- > >> diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c > >> index 1b67e73..51c742c 100644 > >> --- a/common/cmd_jffs2.c > >> +++ b/common/cmd_jffs2.c > > > > I don't know what the rest of the list thinks, but I would like to see a > > "Signed-off-by" line (and/or a note on where the code came from - e.g. > > linux) on all patches whether they are preliminary or not. I would hate > to > > get into a "where did this code come from" quandary over a code that came > > from, was influenced by, or simply looked like a patch that was posted > > without proper traceability. > > > > Since it's not fully tested and maybe have a bug. If some users are > having test and get ack I will repost this one with sign-off. > And it's code almost same as NAND except some parts. It's early > hacking for supporting jffs2 comand on OneNAND. > > Thank you, > Kyungmin Park > - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] Reading memory into environment variable
Hi,
I wish to read the kernel command line parameters in from a disk file
located e.g. on a FAT file system. My current idea is to implement it
like this:
1. Read disk file into RAM
2. Implement custom "mem2env" command to read memory into environment
variable, with destination variable as ${bootargs}
As far as I can see, I am not reinventing any wheels by doing this, but
does anyone know a better way?
Thanks & regards,
Martin
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Re: [U-Boot-Users] Flash Functions !!
Hi Amit, > We are using board pxa255, UBoot version 1.3.3, FLASH chipset is > PC28F256P30B85 > (two chipsets) connected to same chip select. This FLASH supports CFI and > U-Boot code has CFI_FLASH.c. > > Do we need to write functions (Read, Write, erase) for this FLASH or U-Boot > has > support for this already? If the chip is CFI compatbile, you only need the correct CFI driver related configs in your board config and everything should simply work(tm). Cheers Detlev -- I can understand that things like user-level libraries have to take crazy people into account, but the kernel internal libraries definitely do not. -- Linus Torvalds -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] SPAM :(
Hi, > On Wed, 2 Jul 2008, Detlev Zundel wrote: > > Thanks. > >> Hi, >> >>> Hey, can somebody block this moron somehow? It's getting annoying; it >> is not >>> an occasional spam but regular posting... >> >> I added the e-mail to the blocked addresses. Seems I did not get it right the first time so I tried again. Cheers Detlev -- "Win32 sucks so hard it could pull matter out of a Black Hole." -- Pohl Longsine -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] - Sponsored by: SourceForge.net Community Choice Awards: VOTE NOW! Studies have shown that voting for your favorite open source project, along with a healthy diet, reduces your potential for chronic lameness and boredom. Vote Now at http://www.sourceforge.net/community/cca08 ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] Add MVBC_P board
Wolfgang,
thanks - I'll wait for further comments and send an update.
regards,
Andre
Wolfgang Grandegger schrieb:
> Andre Schwarz wrote:
>> The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
>> controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
>> Please see doc/README.mvbc_p for details.
>
> One general remark. Please use the in_*() and out_*() accessor functions
> to access I/O space. This will make most of your asm("sync");
> instructions obsolete.
>
> Wolfgang.
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht:
Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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Re: [U-Boot-Users] [PATCH] Add MVBC_P board
Andre Schwarz wrote:
> The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
> controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
> Please see doc/README.mvbc_p for details.
One general remark. Please use the in_*() and out_*() accessor functions
to access I/O space. This will make most of your asm("sync");
instructions obsolete.
Wolfgang.
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[U-Boot-Users] [PATCH] Add MVBC_P board
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
Please see doc/README.mvbc_p for details.
Signed-off-by: Andre Schwarz <[EMAIL PROTECTED]>
---
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht:
Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
CREDITS|2 +-
MAINTAINERS|1 +
MAKEALL|1 +
Makefile |8 +
board/mvbc_p/Makefile | 50 ++
board/mvbc_p/config.mk | 30
board/mvbc_p/fpga.c| 177
board/mvbc_p/fpga.h| 34
board/mvbc_p/mvbc_p.c | 345
board/mvbc_p/mvbc_p.h | 72 +
board/mvbc_p/mvbc_p_autoscript | 44 +
doc/README.mvbc_p | 74 +
include/configs/MVBC_P.h | 310
13 files changed, 1147 insertions(+), 1 deletions(-)
diff --git a/CREDITS b/CREDITS
index aa57682..b1c10fd 100644
--- a/CREDITS
+++ b/CREDITS
@@ -426,7 +426,7 @@ D: FADS823 configuration, MPC823 video support, I2C,
wireless keyboard, lots mor
N: Andre Schwarz
E: [EMAIL PROTECTED]
-D: Support for Matrix Vision boards (MVBLM7)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
N: Robert Schwebel
E: [EMAIL PROTECTED]
diff --git a/MAINTAINERS b/MAINTAINERS
index a3d70b1..9af5730 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -373,6 +373,7 @@ Peter De Schrijver <[EMAIL PROTECTED]>
Andre Schwarz <[EMAIL PROTECTED]>
+ mvbc_p MPC5200
mvblm7 MPC8343
Timur Tabi <[EMAIL PROTECTED]>
diff --git a/MAKEALL b/MAKEALL
index 32caab7..ca9202b 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -48,6 +48,7 @@ LIST_5xxx=" \
mecp5200\
motionpro \
munices \
+ MVBC_P \
o2dnt \
pf5200 \
PM520 \
diff --git a/Makefile b/Makefile
index 8bfc891..c6d0eda 100644
--- a/Makefile
+++ b/Makefile
@@ -743,6 +743,14 @@ uc101_config: unconfig
motionpro_config: unconfig
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
+MVBC_P_config: unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/mvbc_p
+ @ >$(obj)include/config.h
+ @[ -z "$(findstring MVBC_P,$@)" ] || \
+ { echo "#define CONFIG_MVBC_P">>$(obj)include/config.h; \
+ }
+ @$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p
#
## MPC512x Systems
diff --git a/board/mvbc_p/Makefile b/board/mvbc_p/Makefile
new file mode 100644
index 000..d4344dd
--- /dev/null
+++ b/board/mvbc_p/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# (C) Copyright 2004-2006
+# Matrix-Vision GmbH, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o fpga.o
+
+SRCS:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS:= $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/board/mvbc_p/config.mk b/board/mvbc_p/config.mk
new file mode 100644
index 000..1c2a13e
--- /dev/null
+++ b/board/mvbc_p/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your
[U-Boot-Users] [PATCH] update e1000 ifdef
Change ifdef to match "MVBC_P" board name.
Signed-off-by: Andre Schwarz <[EMAIL PROTECTED]>
---
Ben,
this is a mini-patch and should do no harm.
Since MVBC_1G has gone to oblivion and the new board is named MVBC_P.
I'll submit the board patch in a few minutes.
Thanks,
Andre
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht:
Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
drivers/net/e1000.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index c31029a..754a0bb 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -3031,7 +3031,7 @@ e1000_initialize(bd_t * bis)
free(nic);
return 0;
}
-#if !(defined(CONFIG_AP1000) || defined(CONFIG_MVBC_1G))
+#if !(defined(CONFIG_AP1000) || defined(CONFIG_MVBC_P))
if (e1000_validate_eeprom_checksum(nic) < 0) {
printf("The EEPROM Checksum Is Not Valid\n");
free(hw);
-
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[U-Boot-Users] [PATCH v2] net: s mc911x: Add support RSK7203 board to smc91 1x
The RSK board has the SMSC9118 wired up 'incorrectly'.
Byte-swapping is necessary, and so poor performance is inevitable.
This problem cannot evade by the swap function of CHIP, this can
evade by software Byte-swapping.
And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
functions necessary to solve this problem.
Signed-off-by: Nobuhiro Iwamatsu <[EMAIL PROTECTED]>
---
drivers/net/smc911x.c | 34 +++---
1 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 1484b0b..cc8aaf0 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -1,5 +1,5 @@
/*
- * SMSC LAN9[12]1[567] Network driver
+ * SMSC LAN9[12]1[5678] Network driver
*
* (c) 2007 Pengutronix, Sascha Hauer <[EMAIL PROTECTED]>
*
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#if defined (CONFIG_DRIVER_SMC911X_32_BIT) && \
defined (CONFIG_DRIVER_SMC911X_16_BIT)
@@ -53,6 +54,33 @@ static inline void reg_write(u32 addr, u32 val)
*(volatile u16*)addr = (u16)val;
*(volatile u16*)(addr + 2) = (u16)(val >> 16);
}
+
+#if defined(CONFIG_RSK7203)
+/*
+ * The RSK board has the SMSC9118 wired up 'incorrectly'.
+ * Byte-swapping is necessary, and so poor performance is inevitable.
+ * This problem cannot evade by the swap function of CHIP, this can
+ * evade by software Byte-swapping.
+ * And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
+ * functions necessary to solve this problem.
+ */
+static inline u32 pkt_data_pull(u32 addr)
+{
+ volatile u16 *addr_16 = (u16 *)addr;
+ return (((swab16(*addr_16) << 16) & 0x)|swab16(*(addr_16 + 1)));
+}
+
+static inline void pkt_data_push(u32 addr, u32 val)
+{
+ *(volatile u16 *)(addr + 2) = swab16((u16)val);
+ *(volatile u16 *)(addr) = swab16((u16)(val >> 16));
+}
+
+#else
+# define pkt_data_pull(x) reg_read(x)
+# define pkt_data_push(x, l) reg_write(x, l)
+#endif /* CONFIG_RSK7203 */
+
#else
#error "SMC911X: undefined bus width"
#endif /* CONFIG_DRIVER_SMC911X_16_BIT */
@@ -641,7 +669,7 @@ int eth_send(volatile void *packet, int length)
tmplen = (length + 3) / 4;
while (tmplen--)
- reg_write(TX_DATA_FIFO, *data++);
+ pkt_data_push(TX_DATA_FIFO, *data++);
/* wait for transmission */
while (!((reg_read(TX_FIFO_INF) & TX_FIFO_INF_TSUSED) >> 16));
@@ -684,7 +712,7 @@ int eth_rx(void)
tmplen = (pktlen + 2+ 3) / 4;
while (tmplen--)
- *data++ = reg_read(RX_DATA_FIFO);
+ *data++ = pkt_data_pull(RX_DATA_FIFO);
if (status & RX_STS_ES)
printf(DRIVERNAME
--
1.5.5.1
-
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