Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support
Hi, Ben. Thank you for your check. 2008/6/10 Ben Warren [EMAIL PROTECTED]: Hi Nobuhiro, Nobuhiro Iwamatsu wrote: Renesas SH7763 has 2 channel Ethernet device. This is 10/100/1000 Base support. But this patch check 10/100 Base only. Where's the code that has this driver being initialized by net/eth.c? Is it in another patch or should I just go to bed? Yes , this driver initialize used eth_init. Thank you. snip This code has quite a few magic numbers. Considering that you're submitting a header file too, it's hard to justify not adding mnemonics. snip Another magic number that should be a #defined bit mask Thanks. I will rewrite and cleanup soruce code. snip diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h new file mode 100644 index 000..12a4528 --- /dev/null +++ b/drivers/net/sh_eth.h @@ -0,0 +1,195 @@ snip Please use the accessors in include/asm-sh/io.h instead of defining your own. OK. I revise the place that you pointed out and resend it. I thank for your check. Best regards, Nobuhiro - Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support
Hi Nobuhiro,
Nobuhiro Iwamatsu wrote:
Renesas SH7763 has 2 channel Ethernet device.
This is 10/100/1000 Base support.
But this patch check 10/100 Base only.
Signed-off-by: Nobuhiro Iwamatsu [EMAIL PROTECTED]
---
drivers/net/Makefile |1 +
drivers/net/sh_eth.c | 599
++
drivers/net/sh_eth.h | 195
Where's the code that has this driver being initialized by net/eth.c? Is
it in another patch or should I just go to bed?
3 files changed, 795 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/sh_eth.c
create mode 100644 drivers/net/sh_eth.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5b031c9..e2a6b35 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,6 +66,7 @@ COBJS-y += uli526x.o
COBJS-y += vsc7385.o
COBJS-$(CONFIG_XILINX_EMAC) += xilinx_emac.o
COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
+COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
COBJS:= $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
new file mode 100644
index 000..869a8f0
--- /dev/null
+++ b/drivers/net/sh_eth.c
@@ -0,0 +1,599 @@
+/*
+ * sh_eth.c - Driver for Renesas SH7763's ethernet controler.
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (c) 2008 Nobuhiro Iwamatsu
+ * Copyright (c) 2007 Carlos Munoz [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include config.h
+#include common.h
+#include malloc.h
+#include net.h
+#include asm/errno.h
+
+#include sh_eth.h
+
+#ifndef CONFIG_SH_ETHER_USE_PORT
+# error Please define CONFIG_SH_ETHER_USE_PORT
+#endif
+#ifndef CONFIG_SH_ETHER_PHY_ADDR
+# error Please define CONFIG_SH_ETHER_PHY_ADDR
+#endif
+
+extern int eth_init(bd_t *bd);
+extern void eth_halt(void);
+extern int eth_rx(void);
+extern int eth_send(volatile void *packet, int length);
+
+static struct dev_info_s *dev;
+
+/*
+ * Bits are written to the PHY serially using the
+ * PIR register, just like a bit banger.
+ */
+static void sh_eth_mii_write_phy_bits(int port, u32 val, int len)
+{
+ int i;
+ u32 pir;
+
+ /* Bit positions is 1 less than the number of bits */
+ for (i = len - 1; i = 0; i--) {
+ /* Write direction, bit to write, clock is low */
+ pir = 2 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ /* Write direction, bit to write, clock is high */
+ pir = 3 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ /* Write direction, bit to write, clock is low */
+ pir = 2 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ }
+}
+
+static void sh_eth_mii_bus_release(int port)
+{
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+ /* Read direction, clock is high */
+ OUT32(PIR(port), 1);
+ PHY_DELAY;
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+}
+
+static void sh_eth_mii_ind_bus_release(int port)
+{
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+}
+
+static int sh_eth_mii_read_phy_bits(int port, u32 * val, int len)
+{
+ int i;
+ u32 pir;
+
+ *val = 0;
+ for (i = len - 1; i = 0; i--) {
+ /* Read direction, clock is high */
+ OUT32(PIR(port), 1);
+ PHY_DELAY;
+ /* Read bit */
+ pir = IN32(PIR(port));
+ *val |= (pir 8) ? 1 i : 0;
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+ }
+
+ return 0;
+}
+
+/* To read a phy register, mii managements frames are sent to the phy.
+ The frames look like this:
+ pre (32 bits):0x
+ st (2 bits): 01
+ op (2bits): 10: read 01: write
+ phyad (5 bits): x
+ regad (5 bits): x
+ ta (Bus release):
+ data (16 bits): read data */
+static u32 sh_eth_mii_read_phy_reg(int port, u8 phy_addr, int reg)
+{
+ u32 val;
+
+ /* Sent
Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support
Hello, Ben. On Fri, 06 Jun 2008 16:17:48 +0900 Nobuhiro Iwamatsu [EMAIL PROTECTED] wrote: Renesas SH7763 has 2 channel Ethernet device. This is 10/100/1000 Base support. But this patch check 10/100 Base only. Signed-off-by: Nobuhiro Iwamatsu [EMAIL PROTECTED] --- drivers/net/Makefile |1 + drivers/net/sh_eth.c | 599 ++ drivers/net/sh_eth.h | 195 3 files changed, 795 insertions(+), 0 deletions(-) create mode 100644 drivers/net/sh_eth.c create mode 100644 drivers/net/sh_eth.h Please apply this code to your net tree? Best regards, Nobuhiro -- Nobuhiro Iwamatsu - Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
Re: [U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support
Hi Nobuhiro, Nobuhiro Iwamatsu wrote: Hello, Ben. On Fri, 06 Jun 2008 16:17:48 +0900 Nobuhiro Iwamatsu [EMAIL PROTECTED] wrote: Renesas SH7763 has 2 channel Ethernet device. This is 10/100/1000 Base support. But this patch check 10/100 Base only. Signed-off-by: Nobuhiro Iwamatsu [EMAIL PROTECTED] --- drivers/net/Makefile |1 + drivers/net/sh_eth.c | 599 ++ drivers/net/sh_eth.h | 195 3 files changed, 795 insertions(+), 0 deletions(-) create mode 100644 drivers/net/sh_eth.c create mode 100644 drivers/net/sh_eth.h Please apply this code to your net tree? I've scanned over the code and plan to give it a more thorough review tonight. regards, Ben - Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php ___ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
[U-Boot-Users] [PATCH] net: sh: Renesas SH7763 Ethernet device support
Renesas SH7763 has 2 channel Ethernet device.
This is 10/100/1000 Base support.
But this patch check 10/100 Base only.
Signed-off-by: Nobuhiro Iwamatsu [EMAIL PROTECTED]
---
drivers/net/Makefile |1 +
drivers/net/sh_eth.c | 599 ++
drivers/net/sh_eth.h | 195
3 files changed, 795 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/sh_eth.c
create mode 100644 drivers/net/sh_eth.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5b031c9..e2a6b35 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,6 +66,7 @@ COBJS-y += uli526x.o
COBJS-y += vsc7385.o
COBJS-$(CONFIG_XILINX_EMAC) += xilinx_emac.o
COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
+COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
new file mode 100644
index 000..869a8f0
--- /dev/null
+++ b/drivers/net/sh_eth.c
@@ -0,0 +1,599 @@
+/*
+ * sh_eth.c - Driver for Renesas SH7763's ethernet controler.
+ *
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (c) 2008 Nobuhiro Iwamatsu
+ * Copyright (c) 2007 Carlos Munoz [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include config.h
+#include common.h
+#include malloc.h
+#include net.h
+#include asm/errno.h
+
+#include sh_eth.h
+
+#ifndef CONFIG_SH_ETHER_USE_PORT
+# error Please define CONFIG_SH_ETHER_USE_PORT
+#endif
+#ifndef CONFIG_SH_ETHER_PHY_ADDR
+# error Please define CONFIG_SH_ETHER_PHY_ADDR
+#endif
+
+extern int eth_init(bd_t *bd);
+extern void eth_halt(void);
+extern int eth_rx(void);
+extern int eth_send(volatile void *packet, int length);
+
+static struct dev_info_s *dev;
+
+/*
+ * Bits are written to the PHY serially using the
+ * PIR register, just like a bit banger.
+ */
+static void sh_eth_mii_write_phy_bits(int port, u32 val, int len)
+{
+ int i;
+ u32 pir;
+
+ /* Bit positions is 1 less than the number of bits */
+ for (i = len - 1; i = 0; i--) {
+ /* Write direction, bit to write, clock is low */
+ pir = 2 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ /* Write direction, bit to write, clock is high */
+ pir = 3 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ /* Write direction, bit to write, clock is low */
+ pir = 2 | ((val 1 i) ? 1 2 : 0);
+ OUT32(PIR(port), pir);
+ PHY_DELAY;
+ }
+}
+
+static void sh_eth_mii_bus_release(int port)
+{
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+ /* Read direction, clock is high */
+ OUT32(PIR(port), 1);
+ PHY_DELAY;
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+}
+
+static void sh_eth_mii_ind_bus_release(int port)
+{
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+}
+
+static int sh_eth_mii_read_phy_bits(int port, u32 * val, int len)
+{
+ int i;
+ u32 pir;
+
+ *val = 0;
+ for (i = len - 1; i = 0; i--) {
+ /* Read direction, clock is high */
+ OUT32(PIR(port), 1);
+ PHY_DELAY;
+ /* Read bit */
+ pir = IN32(PIR(port));
+ *val |= (pir 8) ? 1 i : 0;
+ /* Read direction, clock is low */
+ OUT32(PIR(port), 0);
+ PHY_DELAY;
+ }
+
+ return 0;
+}
+
+/* To read a phy register, mii managements frames are sent to the phy.
+ The frames look like this:
+ pre (32 bits): 0x
+ st (2 bits):01
+ op (2bits): 10: read 01: write
+ phyad (5 bits): x
+ regad (5 bits): x
+ ta (Bus release):
+ data (16 bits): read data */
+static u32 sh_eth_mii_read_phy_reg(int port, u8 phy_addr, int reg)
+{
+ u32 val;
+
+ /* Sent mii management frame */
+ /* pre */
+ sh_eth_mii_write_phy_bits(port, 0x, 32);
+ /* st (start of frame) */
+ sh_eth_mii_write_phy_bits(port, 0x1, 2);
+ /* op (code) */
+
