date:20070513

Re: [uClinux-dev] [PATCH]coldfire qspi driver

2007-05-13 Thread Steve Bennett


Hi Greg,

Access to the m25p80 flash and the mmc/sd card are both
over over the spi bus. This is some crude mechanism to
prevent conflicts between the two. Mike promised something
better in the future and I'll understand if you can't take this
one until then.

Cheers,
Steve

Greg Ungerer wrote:

Hi Steve,

Steve Bennett wrote:
This patch adds support for the SPI driver for Freescale Coldfire QSPI 
module
in master mode. Tested with the 5282 processor, but should also work 
with other

Coldfire variants.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>


Why is there mutex calls for the qspi module in platforms mtd
map driver?  This seems very out of place.

And the changes to drivers/spi/spi.c, I can't see that being
accepted in mainline.

Regards
Greg



diff -urN uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c 
uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c
--- uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c
2006-10-09 10:01:47.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c
2007-05-11 16:12:09.0 +1000

@@ -201,6 +201,7 @@
 addr = instr->addr;
 len = instr->len;
 
+qspi_mutex_down("m25p80");

   down(&flash->lock);
 
 /* now erase those sectors */

@@ -216,6 +217,7 @@
 }
 
   up(&flash->lock);

+qspi_mutex_up("m25p80");
 
 instr->state = MTD_ERASE_DONE;

 mtd_erase_callback(instr);
@@ -260,6 +262,7 @@
 if (retlen)
 *retlen = 0;
 
+qspi_mutex_down("m25p80");

 down(&flash->lock);
 
 /* Wait till previous write/erase is done. */

@@ -282,6 +285,7 @@
 *retlen = m.actual_length - sizeof(flash->command);
 
   up(&flash->lock);

+qspi_mutex_up("m25p80");
 
 return 0;

 }
@@ -323,6 +327,7 @@
 t[1].tx_buf = buf;
 spi_message_add_tail(&t[1], &m);
 
+qspi_mutex_down("m25p80");

   down(&flash->lock);
 
 /* Wait until finished previous write command. */

@@ -385,6 +390,7 @@
  }
 
 up(&flash->lock);

+qspi_mutex_up("m25p80");
 
 return 0;

 }
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig 
uClinux-dist/linux-2.6.x/drivers/spi/Kconfig
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Kconfig2007-05-11 
16:12:05.0 +1000

@@ -103,6 +103,15 @@
   GPIO lines to provide the SPI bus. This can be used where
   the inbuilt hardware cannot provide the transfer mode, or
   where the board is using non hardware connected pins.
+  +config SPI_COLDFIRE
+tristate "Coldfire QSPI SPI Master"
+depends on SPI_MASTER && COLDFIRE && EXPERIMENTAL
+help
+  SPI driver for Freescale Coldfire QSPI module in master mode.
+  Tested with the 5282 processor, but should also work with other
+  Coldfire variants.
+
 #
 # Add new SPI master controllers in alphabetical order above this line
 #
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile 
uClinux-dist/linux-2.6.x/drivers/spi/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Makefile2007-05-11 
16:12:05.0 +1000

@@ -17,6 +17,7 @@
 obj-$(CONFIG_SPI_MPC83xx)+= spi_mpc83xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)+= spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)+= spi_s3c24xx.o
+obj-$(CONFIG_SPI_COLDFIRE)+= spi_coldfire.o
 obj-$(CONFIG_MCFQSPI)+= mcf_qspi.o
 obj-$(CONFIG_DS1305)+= DS1305RTC.o
 # ... add above this line ...
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c 
uClinux-dist/linux-2.6.x/drivers/spi/spi.c
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c2006-11-30 
09:27:55.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/spi.c2007-05-11 
16:12:09.0 +1000

@@ -25,6 +25,40 @@
 #include 
 #include 
 
+#if 1

+
+EXPORT_SYMBOL(qspi_mutex_down);
+EXPORT_SYMBOL(qspi_mutex_up);
+
+static DECLARE_MUTEX(sem);
+
+ /**
+  * qspi_mutex_down.
+  * get in line for the qspi mutex
+  * the internal kernel calls do not hold the mutex themselves and so 
down/up

+  * must be called manually. This introduces a new level of complexity,
+  * but is required, as it may be necessary for some drivers to
+  * hold the mutex through more than one transaction.
+  */
+ void qspi_mutex_down(char *s){
+ //printk( "d:%s", s);
+  down_interruptible(&sem);
+  //printk( "-");
+ }
+
+ /**
+  * qspi_mutex up
+  * signal the qspi mutex.
+  * see qspi_mutex_down
+  */
+ void qspi_mutex_up(char *s){
+ //printk( "%s:", s);
+  up(&sem);
+  //printk( "u\n");
+ }
+
+ #endif
+
 
 /* SPI bustype and spi_master class are registered after board init code

  * provides the SPI device tables, ensuring that both are present by the
@@ -360,7 +394,7 @@
 if (!dev)
 return NULL;
 
-master = kzalloc(size + sizeof *master, SLAB_KERNEL);

+master = kzalloc(size + sizeof

Re: [uClinux-dev] [PATCH]Common names for MCF I2C

2007-05-13 Thread Greg Ungerer


Hi Steve,

Steve Bennett wrote:

Great. The matching 528x changes should still be needed though.


I have committed that part.

Regards
Greg




Greg Ungerer wrote:

Hi Steve,

The changes to m532xsim.h have already been made (and sent to me)
by Sebastian Hess and Thomas Brinker. They are queued in my patch
set already for main line inclusion.

Regards
Greg



Steve Bennett wrote:




The MCF I2C-related register definitions have been renamed separately
for the MCF 528x and 532x series. This breaks the i2c-mcf driver.
I see no reason not to use common names, thus making the i2c-mcf driver
work again.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c 
uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
--- uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
2006-12-12 23:21:50.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
2007-05-11 16:12:16.0 +1000

@@ -501,7 +501,7 @@
 /* Port AS Pin Assignment Register (PASPAR)*/
 /*PASPA1 = 11 = AS1 pin is I2C SDA*/
 /*PASPA0 = 11 = AS0 pin is I2C SCL*/
-*MCF_GPIO_PASPAR |= 0x000F;/* u16 declaration */
+*MCF5282_GPIO_PASPAR |= 0x000F;/* u16 declaration */
 #endif
 
 
diff -urN 
uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h
2007-01-25 10:44:14.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
2007-05-11 16:12:16.0 +1000

@@ -63,31 +76,31 @@
 *
 */
 /* Read/Write access macros for general use */
-#define MCF5282_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 
0x0300) // Address -#define MCF5282_I2C_I2FDR   (volatile u8 *) 
(MCF_IPSBAR + 0x0304) // Freq Divider
-#define MCF5282_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 
0x0308) // Control
-#define MCF5282_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 
0x030C) // Status
-#define MCF5282_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 
0x0310) // Data I/O
+#define MCF_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // 
Address +#define MCF_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 
0x0304) // Freq Divider
+#define MCF_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // 
Control
+#define MCF_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // 
Status
+#define MCF_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // 
Data I/O
 
 /* Bit level definitions and macros */
-#define MCF5282_I2C_I2ADR_ADDR(x)   
(((x)&0x7F)<<0x01)

+#define MCF_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
 
-#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F))

+#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F))
 
-#define MCF5282_I2C_I2CR_IEN(0x80)// I2C enable

-#define MCF5282_I2C_I2CR_IIEN   (0x40)  // interrupt enable
-#define MCF5282_I2C_I2CR_MSTA   (0x20)  // master/slave mode
-#define MCF5282_I2C_I2CR_MTX(0x10)  // transmit/receive mode
-#define MCF5282_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
-#define MCF5282_I2C_I2CR_RSTA   (0x04)  // repeat start
-
-#define MCF5282_I2C_I2SR_ICF(0x80)  // data transfer bit
-#define MCF5282_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
-#define MCF5282_I2C_I2SR_IBB(0x20)  // I2C bus busy
-#define MCF5282_I2C_I2SR_IAL(0x10)  // aribitration lost
-#define MCF5282_I2C_I2SR_SRW(0x04)  // slave read/write
-#define MCF5282_I2C_I2SR_IIF(0x02)  // I2C interrupt
-#define MCF5282_I2C_I2SR_RXAK   (0x01)  // received acknowledge
+#define MCF_I2C_I2CR_IEN(0x80)// I2C enable
+#define MCF_I2C_I2CR_IIEN   (0x40)  // interrupt enable
+#define MCF_I2C_I2CR_MSTA   (0x20)  // master/slave mode
+#define MCF_I2C_I2CR_MTX(0x10)  // transmit/receive mode
+#define MCF_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
+#define MCF_I2C_I2CR_RSTA   (0x04)  // repeat start
+
+#define MCF_I2C_I2SR_ICF(0x80)  // data transfer bit
+#define MCF_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
+#define MCF_I2C_I2SR_IBB(0x20)  // I2C bus busy
+#define MCF_I2C_I2SR_IAL(0x10)  // aribitration lost
+#define MCF_I2C_I2SR_SRW(0x04)  // slave read/write
+#define MCF_I2C_I2SR_IIF(0x02)  // I2C interrupt
+#define MCF_I2C_I2SR_RXAK   (0x01)  // received acknowledge
 
 
 
diff -urN 
uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h
2006-05-26 16:18:02.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h
2007-05-11 16:12:16.0 +1000

@@ -131,33 +131,33 @@
  ***

[uClinux-dev] Re: Upstream merge of big patch

2007-05-13 Thread Greg Ungerer


Hi Thomas,

Thomas Brinker wrote:

Are there any planes to merge the whole uclinux big patch to kernel mainline?


No :-)

The big patch contains many things that are just not acceptable,
or not ready, for main line yet.

The small patch, the -uc patch, is this list of items that I
think are ready for mainline.

Regards
Greg




Greg Ungerer  --  Chief Software Dude   EMAIL: [EMAIL PROTECTED]
Secure Computing CorporationPHONE:   +61 7 3435 2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
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Re: [uClinux-dev] [PATCH]coldfire qspi driver

2007-05-13 Thread Greg Ungerer


Hi Steve,

Steve Bennett wrote:

This patch adds support for the SPI driver for Freescale Coldfire QSPI module
in master mode. Tested with the 5282 processor, but should also work with other
Coldfire variants.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>


Why is there mutex calls for the qspi module in platforms mtd
map driver?  This seems very out of place.

And the changes to drivers/spi/spi.c, I can't see that being
accepted in mainline.

Regards
Greg




diff -urN uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c 
uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c
--- uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c  2006-10-09 
10:01:47.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c   2007-05-11 
16:12:09.0 +1000
@@ -201,6 +201,7 @@
addr = instr->addr;
len = instr->len;
 
+	qspi_mutex_down("m25p80");

down(&flash->lock);
 
 	/* now erase those sectors */

@@ -216,6 +217,7 @@
}
 
   	up(&flash->lock);

+   qspi_mutex_up("m25p80");
 
 	instr->state = MTD_ERASE_DONE;

mtd_erase_callback(instr);
@@ -260,6 +262,7 @@
if (retlen)
*retlen = 0;
 
+	qspi_mutex_down("m25p80");

down(&flash->lock);
 
 	/* Wait till previous write/erase is done. */

@@ -282,6 +285,7 @@
*retlen = m.actual_length - sizeof(flash->command);
 
   	up(&flash->lock);

+   qspi_mutex_up("m25p80");
 
 	return 0;

 }
@@ -323,6 +327,7 @@
t[1].tx_buf = buf;
spi_message_add_tail(&t[1], &m);
 
+	qspi_mutex_down("m25p80");

down(&flash->lock);
 
 	/* Wait until finished previous write command. */

@@ -385,6 +390,7 @@
}
 
 	up(&flash->lock);

+   qspi_mutex_up("m25p80");
 
 	return 0;

 }
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig 
uClinux-dist/linux-2.6.x/drivers/spi/Kconfig
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig   2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Kconfig2007-05-11 
16:12:05.0 +1000
@@ -103,6 +103,15 @@
  GPIO lines to provide the SPI bus. This can be used where
  the inbuilt hardware cannot provide the transfer mode, or
  where the board is using non hardware connected pins.
+	  
+config SPI_COLDFIRE

+   tristate "Coldfire QSPI SPI Master"
+   depends on SPI_MASTER && COLDFIRE && EXPERIMENTAL
+   help
+ SPI driver for Freescale Coldfire QSPI module in master mode.
+ Tested with the 5282 processor, but should also work with other
+ Coldfire variants.
+
 #
 # Add new SPI master controllers in alphabetical order above this line
 #
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile 
uClinux-dist/linux-2.6.x/drivers/spi/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile  2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Makefile   2007-05-11 
16:12:05.0 +1000
@@ -17,6 +17,7 @@
 obj-$(CONFIG_SPI_MPC83xx)  += spi_mpc83xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)  += spi_s3c24xx.o
+obj-$(CONFIG_SPI_COLDFIRE) += spi_coldfire.o
 obj-$(CONFIG_MCFQSPI)  += mcf_qspi.o
 obj-$(CONFIG_DS1305)   += DS1305RTC.o
 #  ... add above this line ...
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c 
uClinux-dist/linux-2.6.x/drivers/spi/spi.c
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c 2006-11-30 
09:27:55.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/spi.c  2007-05-11 16:12:09.0 
+1000
@@ -25,6 +25,40 @@
 #include 
 #include 
 
+#if 1

+
+EXPORT_SYMBOL(qspi_mutex_down);
+EXPORT_SYMBOL(qspi_mutex_up);
+
+static DECLARE_MUTEX(sem);
+
+ /**
+  * qspi_mutex_down.
+  * get in line for the qspi mutex
+  * the internal kernel calls do not hold the mutex themselves and so down/up
+  * must be called manually. This introduces a new level of complexity,
+  * but is required, as it may be necessary for some drivers to
+  * hold the mutex through more than one transaction.
+  */
+ void qspi_mutex_down(char *s){
+//printk( "d:%s", s);
+down_interruptible(&sem);
+//printk( "-");
+ }
+
+ /**
+  * qspi_mutex up
+  * signal the qspi mutex.
+  * see qspi_mutex_down
+  */
+ void qspi_mutex_up(char *s){
+//printk( "%s:", s);
+up(&sem);
+//printk( "u\n");
+ }
+
+ #endif
+
 
 /* SPI bustype and spi_master class are registered after board init code

  * provides the SPI device tables, ensuring that both are present by the
@@ -360,7 +394,7 @@
if (!dev)
return NULL;
 
-	master = kzalloc(size + sizeof *master, SLAB_KERNEL);

+   master = kzalloc(size + sizeof *master, GFP_KERNEL);
if (!master)
return NULL;
 
@@ -447,7 +481,9 @@

  */
 void spi_unregister_master(struct spi_master *master)
 {
-   (void) device_for_each_child(master->cde

[uClinux-dev] Upstream merge of big patch

2007-05-13 Thread Thomas Brinker

Hi everybody!

Are there any planes to merge the whole uclinux big patch to kernel mainline?

Regards
Thomas


-- 
Dipl.-Ing. Thomas Brinker, emlix GmbH, http://www.emlix.com
Fon +49 30 275911-00, Fax -33, Poststr. 4/5, 10178 Berlin, Germany
Geschäftsführung: Dr. Uwe Kracke, Dr. Cord Seele, Ust-IdNr.: DE 205 198 055
Sitz der Gesellschaft: Göttingen, Amtsgericht Göttingen HR B 3160

emlix - your embedded linux partner
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Re: [uClinux-dev] [PATCH]Common names for MCF I2C

2007-05-13 Thread Steve Bennett


Great. The matching 528x changes should still be needed though.

Greg Ungerer wrote:

Hi Steve,

The changes to m532xsim.h have already been made (and sent to me)
by Sebastian Hess and Thomas Brinker. They are queued in my patch
set already for main line inclusion.

Regards
Greg



Steve Bennett wrote:




The MCF I2C-related register definitions have been renamed separately
for the MCF 528x and 532x series. This breaks the i2c-mcf driver.
I see no reason not to use common names, thus making the i2c-mcf driver
work again.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c 
uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
--- uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
2006-12-12 23:21:50.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
2007-05-11 16:12:16.0 +1000

@@ -501,7 +501,7 @@
 /* Port AS Pin Assignment Register (PASPAR)*/
 /*PASPA1 = 11 = AS1 pin is I2C SDA*/
 /*PASPA0 = 11 = AS0 pin is I2C SCL*/
-*MCF_GPIO_PASPAR |= 0x000F;/* u16 declaration */
+*MCF5282_GPIO_PASPAR |= 0x000F;/* u16 declaration */
 #endif
 
 
diff -urN 
uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h
2007-01-25 10:44:14.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
2007-05-11 16:12:16.0 +1000

@@ -63,31 +76,31 @@
 *
 */
 /* Read/Write access macros for general use */
-#define MCF5282_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) 
// Address -#define MCF5282_I2C_I2FDR   (volatile u8 *) 
(MCF_IPSBAR + 0x0304) // Freq Divider
-#define MCF5282_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) 
// Control
-#define MCF5282_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) 
// Status
-#define MCF5282_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) 
// Data I/O
+#define MCF_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // 
Address +#define MCF_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 
0x0304) // Freq Divider
+#define MCF_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // 
Control
+#define MCF_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // 
Status
+#define MCF_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // 
Data I/O
 
 /* Bit level definitions and macros */
-#define MCF5282_I2C_I2ADR_ADDR(x)   
(((x)&0x7F)<<0x01)

+#define MCF_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
 
-#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F))

+#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F))
 
-#define MCF5282_I2C_I2CR_IEN(0x80)// I2C enable

-#define MCF5282_I2C_I2CR_IIEN   (0x40)  // interrupt enable
-#define MCF5282_I2C_I2CR_MSTA   (0x20)  // master/slave mode
-#define MCF5282_I2C_I2CR_MTX(0x10)  // transmit/receive mode
-#define MCF5282_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
-#define MCF5282_I2C_I2CR_RSTA   (0x04)  // repeat start
-
-#define MCF5282_I2C_I2SR_ICF(0x80)  // data transfer bit
-#define MCF5282_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
-#define MCF5282_I2C_I2SR_IBB(0x20)  // I2C bus busy
-#define MCF5282_I2C_I2SR_IAL(0x10)  // aribitration lost
-#define MCF5282_I2C_I2SR_SRW(0x04)  // slave read/write
-#define MCF5282_I2C_I2SR_IIF(0x02)  // I2C interrupt
-#define MCF5282_I2C_I2SR_RXAK   (0x01)  // received acknowledge
+#define MCF_I2C_I2CR_IEN(0x80)// I2C enable
+#define MCF_I2C_I2CR_IIEN   (0x40)  // interrupt enable
+#define MCF_I2C_I2CR_MSTA   (0x20)  // master/slave mode
+#define MCF_I2C_I2CR_MTX(0x10)  // transmit/receive mode
+#define MCF_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
+#define MCF_I2C_I2CR_RSTA   (0x04)  // repeat start
+
+#define MCF_I2C_I2SR_ICF(0x80)  // data transfer bit
+#define MCF_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
+#define MCF_I2C_I2SR_IBB(0x20)  // I2C bus busy
+#define MCF_I2C_I2SR_IAL(0x10)  // aribitration lost
+#define MCF_I2C_I2SR_SRW(0x04)  // slave read/write
+#define MCF_I2C_I2SR_IIF(0x02)  // I2C interrupt
+#define MCF_I2C_I2SR_RXAK   (0x01)  // received acknowledge
 
 
 
diff -urN 
uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h
2006-05-26 16:18:02.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h
2007-05-11 16:12:16.0 +1000

@@ -131,33 +131,33 @@
  */
 
 /* Read/Write access macros for gener

Re: [uClinux-dev] [PATCH]Driver for access to MCF IPS

2007-05-13 Thread Steve Bennett

I agree. I'll see what this is used for and at least come up with an 
mmap interface to it.


Cheers,
Steve

Greg Ungerer wrote:

Hi Steve,

Steve Bennett wrote:

This patch adds a driver for simple access to the
Coldfire Internal Peripheral System (IPS) address space
via the /dev/ips char device.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>


I have some reservations about this one. Working with peripheral
space registers from user space is not something I want to
encourage.

And, even if I did, wouldn't mmap be a better interface to
them?

Regards
greg



diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile 
uClinux-dist/linux-2.6.x/drivers/char/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile2006-11-30 
12:03:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/Makefile2007-05-11 
16:12:16.0 +1000

@@ -54,6 +54,7 @@
 obj-$(CONFIG_HVCS)+= hvcs.o
 obj-$(CONFIG_SGI_MBCS)+= mbcs.o
 obj-$(CONFIG_MCF_QSPI)+= mcf_qspi.o
+obj-$(CONFIG_MCF_IPS)+= mcf_ips.o
 obj-$(CONFIG_BRIQ_PANEL)+= briq_panel.o
 
 obj-$(CONFIG_PRINTER)+= lp.o
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c 
uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c
--- uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c1970-01-01 
10:00:00.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c2007-05-11 
16:12:16.0 +1000

@@ -0,0 +1,184 @@
+/*
+ * linux-2.4.x/drivers/char/mcf_ips.c
+ *
+ * Internal Peripheral System Access Driver
+ *
+ * Copyright (C) 2005 Intec Automation ([EMAIL PROTECTED])
+ *
+ *
+ * Provides simple access to the Coldfire Internal Peripheral System
+ * address space via the /dev/ips char device.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEVICE_NAME "ips"
+
+/* Use a dynamically assigned misc device minor */
+/*#define IPS_MAJOR 0*/
+/* Or a statically assigned device major */
+#define IPS_MAJOR 122
+
+MODULE_AUTHOR("Mike Lavender <[EMAIL PROTECTED]>");
+MODULE_DESCRIPTION("Driver for Reading and Writing Peripherals");
+MODULE_SUPPORTED_DEVICE("Motorola MCF5282");
+MODULE_LICENSE("GPL");
+
+/* ioctl to set the read/write address */
+#define IPS_REG_SET 1
+
+static ssize_t
+ips_read(
+struct file *file,
+char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)buffer = *(char *)file->private_data;
+ret = 1;
+break;
+case 2:
+*(short *)buffer = *(short *)file->private_data;
+ret = 2;
+break;
+case 4:
+*(int *)buffer = *(int *)file->private_data;
+ret = 4;
+break;
+default:
+memcpy( buffer, (char *)file->private_data, length );
+ret = length;
+}
+
+return (ret);
+}
+
+static ssize_t
+ips_write(
+struct file *file,
+const char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)file->private_data = *(char *)buffer;
+ret = 1;
+break;
+case 2:
+*(short *)file->private_data = *(short *)buffer;
+ret = 2;
+break;
+case 4:
+*(int *)file->private_data = *(int *)buffer;
+ret = 4;
+break;
+default:
+memcpy( (char *)file->private_data, buffer, length );
+ret = length;
+}
+
+return (ret);
+}
+
+int
+ips_ioctl(
+struct inode *inode,
+struct file *file,
+unsigned int ioctl_num,
+unsigned long ioctl_param )
+{
+int ret = 0;
+
+switch (ioctl_num) {
+case IPS_REG_SET:
+file->private_data = (void *)ioctl_param;
+break;
+default:
+ret = -EINVAL;
+}
+
+return (ret);
+}
+
+static int
+ips_open(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+static int
+ips_release(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+/*  fixed for 2.4 kernel, owner was ifdef'ed out for 2.0 kernel */
+static struct file_operations fops = {
+owner:  THIS_MODULE,
+read:   ips_read,
+write:  ips_write,
+ioctl:  ips_ioctl,
+open:   ips_open,
+release:ips_release  /* a.k.a. close */
+};
+
+#if IPS_MAJOR == 0
+static struct miscdevice misc_fops = {
+.minor = MISC_DYNAMIC_MINOR,
+.name = DEVICE_NAME,
+.fops = &fops
+};
+#endif
+
+int __init
+ips_init(void)
+{
+int ret;
+
+#if IPS_MAJOR == 0
+ret = misc_register(&misc_fops);
+#else
+ret = register_chrdev(IPS_MAJOR, DEVICE_NAME, &fops);
+#endif
+   
+if (ret < 0) {

+

Re: [uClinux-dev] Patches for Intec coldfire 5282-based WildFire and WildFireMod

2007-05-13 Thread Greg Ungerer


Hi Steve,

Steve Bennett wrote:

Following are a series of patches which add support
for the Intec Automation ColdFire 5282-based boards,
the WildFire and WildFireMod.

These patches are all against uClinux-dist-20070130

Let me know if you want these updated against your
latest 2.6.21-uc0 or if you think some of these
should be submitted elsewhere.


For the most part it looks like the still apply (only 1 or 2
needed some fix ups).

I will carry them in the uClinux-dist, but only promote the
cpu/architectural code parts to mainline. If you want the
drivers to go into mainline then you will need to submit to
appropriate maintainers of those subsystems (or directly via
lkml).

I notice in some of the driver code (looks like it was written
by Mike Lavender) that the formating is not strictly kernel code
style compliant (for example '//' comments instead of /* */).
Would pay to fix that before sending upstream.

Regards
Greg



Greg Ungerer  --  Chief Software Dude   EMAIL: [EMAIL PROTECTED]
Secure Computing CorporationPHONE:   +61 7 3435 2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
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Re: [uClinux-dev] [PATCH]Driver for access to MCF IPS

2007-05-13 Thread Greg Ungerer


Hi Steve,

Steve Bennett wrote:

This patch adds a driver for simple access to the
Coldfire Internal Peripheral System (IPS) address space
via the /dev/ips char device.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>


I have some reservations about this one. Working with peripheral
space registers from user space is not something I want to
encourage.

And, even if I did, wouldn't mmap be a better interface to
them?

Regards
greg




diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile 
uClinux-dist/linux-2.6.x/drivers/char/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile 2006-11-30 
12:03:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/Makefile  2007-05-11 
16:12:16.0 +1000
@@ -54,6 +54,7 @@
 obj-$(CONFIG_HVCS) += hvcs.o
 obj-$(CONFIG_SGI_MBCS) += mbcs.o
 obj-$(CONFIG_MCF_QSPI) += mcf_qspi.o
+obj-$(CONFIG_MCF_IPS)  += mcf_ips.o
 obj-$(CONFIG_BRIQ_PANEL)   += briq_panel.o
 
 obj-$(CONFIG_PRINTER)		+= lp.o

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c 
uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c
--- uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c1970-01-01 
10:00:00.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c 2007-05-11 
16:12:16.0 +1000
@@ -0,0 +1,184 @@
+/*
+ * linux-2.4.x/drivers/char/mcf_ips.c
+ *
+ * Internal Peripheral System Access Driver
+ *
+ * Copyright (C) 2005 Intec Automation ([EMAIL PROTECTED])
+ *
+ *
+ * Provides simple access to the Coldfire Internal Peripheral System
+ * address space via the /dev/ips char device.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEVICE_NAME "ips"
+
+/* Use a dynamically assigned misc device minor */
+/*#define IPS_MAJOR 0*/
+/* Or a statically assigned device major */
+#define IPS_MAJOR 122
+
+MODULE_AUTHOR("Mike Lavender <[EMAIL PROTECTED]>");
+MODULE_DESCRIPTION("Driver for Reading and Writing Peripherals");
+MODULE_SUPPORTED_DEVICE("Motorola MCF5282");
+MODULE_LICENSE("GPL");
+
+/* ioctl to set the read/write address */
+#define IPS_REG_SET 1
+
+static ssize_t
+ips_read(
+struct file *file,
+char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)buffer = *(char *)file->private_data;
+ret = 1;
+break;
+case 2:
+*(short *)buffer = *(short *)file->private_data;
+ret = 2;
+break;
+case 4:
+*(int *)buffer = *(int *)file->private_data;
+ret = 4;
+break;
+default:
+memcpy( buffer, (char *)file->private_data, length );
+ret = length;
+}
+
+return (ret);
+}
+
+static ssize_t
+ips_write(
+struct file *file,
+const char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)file->private_data = *(char *)buffer;
+ret = 1;
+break;
+case 2:
+*(short *)file->private_data = *(short *)buffer;
+ret = 2;
+break;
+case 4:
+*(int *)file->private_data = *(int *)buffer;
+ret = 4;
+break;
+default:
+memcpy( (char *)file->private_data, buffer, length );
+ret = length;
+}
+
+return (ret);
+}
+
+int
+ips_ioctl(
+struct inode *inode,
+struct file *file,
+unsigned int ioctl_num,
+unsigned long ioctl_param )
+{
+int ret = 0;
+
+switch (ioctl_num) {
+case IPS_REG_SET:
+file->private_data = (void *)ioctl_param;
+break;
+default:
+ret = -EINVAL;
+}
+
+return (ret);
+}
+
+static int
+ips_open(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+static int
+ips_release(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+/*  fixed for 2.4 kernel, owner was ifdef'ed out for 2.0 kernel */
+static struct file_operations fops = {
+owner:  THIS_MODULE,
+read:   ips_read,
+write:  ips_write,
+ioctl:  ips_ioctl,
+open:   ips_open,
+release:ips_release  /* a.k.a. close */
+};
+
+#if IPS_MAJOR == 0
+static struct miscdevice misc_fops = {
+   .minor = MISC_DYNAMIC_MINOR,
+   .name = DEVICE_NAME,
+   .fops = &fops
+};
+#endif
+
+int __init
+ips_init(void)
+{
+   int ret;
+
+#if IPS_MAJOR == 0
+   ret = misc_register(&misc_fops);
+#else
+   ret = register_chrdev(IPS_MAJOR, DEVICE_NAME, &fops);
+#endif
+   
+   if (ret < 0) {
+   return -EIO;
+   }
+
+   printk("MCF IPS device driver installed\n");
+
+

Re: [uClinux-dev] [PATCH]Common names for MCF I2C

2007-05-13 Thread Greg Ungerer


Hi Steve,

The changes to m532xsim.h have already been made (and sent to me)
by Sebastian Hess and Thomas Brinker. They are queued in my patch
set already for main line inclusion.

Regards
Greg



Steve Bennett wrote:




The MCF I2C-related register definitions have been renamed separately
for the MCF 528x and 532x series. This breaks the i2c-mcf driver.
I see no reason not to use common names, thus making the i2c-mcf driver
work again.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c 
uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
--- uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c  2006-12-12 
23:21:50.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c   2007-05-11 
16:12:16.0 +1000
@@ -501,7 +501,7 @@
/* Port AS Pin Assignment Register (PASPAR) */
/*  PASPA1 = 11 = AS1 pin is I2C SDA*/
/*  PASPA0 = 11 = AS0 pin is I2C SCL*/
-   *MCF_GPIO_PASPAR |= 0x000F; /* u16 declaration */
+   *MCF5282_GPIO_PASPAR |= 0x000F; /* u16 declaration */
 #endif
 
 
diff -urN uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h

--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h  
2007-01-25 10:44:14.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h   2007-05-11 
16:12:16.0 +1000
@@ -63,31 +76,31 @@
 *
 */
 /* Read/Write access macros for general use */
-#define MCF5282_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // Address 
-#define MCF5282_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq Divider

-#define MCF5282_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // 
Control
-#define MCF5282_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // Status
-#define MCF5282_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // Data 
I/O
+#define MCF_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // Address 
+#define MCF_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq Divider

+#define MCF_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // Control
+#define MCF_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // Status
+#define MCF_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // Data I/O
 
 /* Bit level definitions and macros */

-#define MCF5282_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
+#define MCF_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
 
-#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F))

+#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F))
 
-#define MCF5282_I2C_I2CR_IEN(0x80)	// I2C enable

-#define MCF5282_I2C_I2CR_IIEN   (0x40)  // interrupt enable
-#define MCF5282_I2C_I2CR_MSTA   (0x20)  // master/slave mode
-#define MCF5282_I2C_I2CR_MTX(0x10)  // transmit/receive mode
-#define MCF5282_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
-#define MCF5282_I2C_I2CR_RSTA   (0x04)  // repeat start
-
-#define MCF5282_I2C_I2SR_ICF(0x80)  // data transfer bit
-#define MCF5282_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
-#define MCF5282_I2C_I2SR_IBB(0x20)  // I2C bus busy
-#define MCF5282_I2C_I2SR_IAL(0x10)  // aribitration lost
-#define MCF5282_I2C_I2SR_SRW(0x04)  // slave read/write
-#define MCF5282_I2C_I2SR_IIF(0x02)  // I2C interrupt
-#define MCF5282_I2C_I2SR_RXAK   (0x01)  // received acknowledge
+#define MCF_I2C_I2CR_IEN(0x80) // I2C enable
+#define MCF_I2C_I2CR_IIEN   (0x40)  // interrupt enable
+#define MCF_I2C_I2CR_MSTA   (0x20)  // master/slave mode
+#define MCF_I2C_I2CR_MTX(0x10)  // transmit/receive mode
+#define MCF_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
+#define MCF_I2C_I2CR_RSTA   (0x04)  // repeat start
+
+#define MCF_I2C_I2SR_ICF(0x80)  // data transfer bit
+#define MCF_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
+#define MCF_I2C_I2SR_IBB(0x20)  // I2C bus busy
+#define MCF_I2C_I2SR_IAL(0x10)  // aribitration lost
+#define MCF_I2C_I2SR_SRW(0x04)  // slave read/write
+#define MCF_I2C_I2SR_IIF(0x02)  // I2C interrupt
+#define MCF_I2C_I2SR_RXAK   (0x01)  // received acknowledge
 
 
 
diff -urN uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h

--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h  
2006-05-26 16:18:02.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h   2007-05-11 
16:12:16.0 +1000
@@ -131,33 +131,33 @@
  */
 
 /* Read/Write access macros for general use */
-#define MCF532x_I2C_I2ADR   (volat

[uClinux-dev] Re: uclinux with RAM size problem

2007-05-13 Thread Will Huang

Hi Greg,
Thanks for your kindness of helping me.
One more stupit question:
I have subscribed uClinux-dev Digest and I can recieve the digest, but I cannot 
find any reply message to my topic in my mailbox.
So I cannot reply any message to tell the list sort my message in correct thread.
I replied message from the digest now.
Would you mind telling me how to use mail list correctly?
Thanks again!

Will Huang
> Hi Will, 
> > will wrote: 
> > I have used 2x32M SDRAM on my board, the loader did chip select well and 
> > I think it is not neccesory to do chip select again > > > > in kernel, is that right? 
> > Normally that is right, the boot loader sets up chip selects and > SDRAM. 
 ÏÖÔÚ¹ºÂò21CNÆóÒµÓÊÏä,¼´¿ÉÓÃ100Ôª»»5000Ôª!ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡

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Re: [uClinux-dev] Re: uclinux with RAM size problem

2007-05-13 Thread Tao Wang

Hi,
 I don't have experiences related to dBUG and coldfire, but I think we can 
find some ways to find the reasom of problem.
  Firstly, you have checked the border of 64MB of SDRAM, so if you write 
0x5A into 0x3FF, what are the values at 0x2FF, 0x1FF, or 0xF. 
and what if you write 0x5A to 0x400, what happens?
  Then, if there is really working 64MB SDRAM, can you find an old stable 
version of Linux, and then run it with your ramdisk configuration, check the 
results.
  If is good, we can get that, there is something wrong during the porting, 
especialy related to memory, so you can compare the codes related to HW/LSP, 
maybe it is there.
  If not, I don't have any more ideas now, you can ask Ungreg, it is the 
guru of coldfire.
  I hope I am helpful, and good luck to you.

  May-14-2007

 will <[EMAIL PROTECTED]> wrote:  Hi Tao,
 I used a modified dBUG as my bootloader and I have used the 'mm' and 'md' 
commands to test my memory.
 The test result was just fine when I modified and read the very border of the 
64M memory. I am confused and the hardware designer is
 unreachable now. I port the kernel to the platform just according to the 
circuit diagram. Can you give me any suggestion?
 Thans!
 BR,
 Will Huang

> Hi, Mr. Huang, > I think you don't need to set the CS in kernel. As for the 
> SDRAM, it is not easy to make it work, so first, I think you'd better check 
> the problem in your bootloader, some bootloaders such as u-boot can do memory 
> write and read, so you can use these operations to check if the SDRAM on 
> board can be accessed properly. If not, the problem is in your bootloader, so 
> you may need to ask the hardware engineer, what is parameters of SDRAM, and 
> then how to initialize it to work properly. > In summay, testing the SDRAM 
> from bootloader if possible, then when it is passed the test, starting you 
> kernel load and boot. > Good luck to you. 

ÏÖÔÚ¹ºÂò21CNÆóÒµÓÊÏä,¼´¿ÉÓÃ100Ôª»»5000Ôª!
ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡
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will <[EMAIL PROTECTED]> wrote: Hi Tao,
 I used a modified dBUG as my bootloader and I have used the 'mm' and 'md' 
commands to test my memory.
 The test result was just fine when I modified and read the very border of the 
64M memory. I am confused and the hardware designer is
 unreachable now. I port the kernel to the platform just according to the 
circuit diagram. Can you give me any suggestion?
 Thans!
 BR,
 Will Huang

> Hi, Mr. Huang, > I think you don't need to set the CS in kernel. As for the 
> SDRAM, it is not easy to make it work, so first, I think you'd better check 
> the problem in your bootloader, some bootloaders such as u-boot can do memory 
> write and read, so you can use these operations to check if the SDRAM on 
> board can be accessed properly. If not, the problem is in your bootloader, so 
> you may need to ask the hardware engineer, what is parameters of SDRAM, and 
> then how to initialize it to work properly. > In summay, testing the SDRAM 
> from bootloader if possible, then when it is passed the test, starting you 
> kernel load and boot. > Good luck to you. 

ÏÖÔÚ¹ºÂò21CNÆóÒµÓÊÏä,¼´¿ÉÓÃ100Ôª»»5000Ôª!
ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡
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Re: [uClinux-dev] Re: uclinux with RAM size problem

2007-05-13 Thread Tao Wang

Hi,
 I don't have experiences related to dBUG and coldfire, but I think we can 
find some ways to find the reasom of problem.
 Firstly, you have checked the border of 64MB of SDRAM, so if you write 
0x5A into 0x3FF, what are the values at 0x2FF, 0x1FF, or 0xF. 
and what if you write 0x5A to 0x400, what happens?
 Then, if there is really working 64MB SDRAM, can you find an old stable 
version of Linux, and then run it with your ramdisk configuration, check the 
results.
 If is good, we can get that, there is something wrong during the porting, 
especialy related to memory, so you can compare the codes related to HW/LSP, 
maybe it is there.
 If not, I don't have any more ideas now, you can ask Ungreg, it is the 
guru of coldfire.
 I hope I am helpful, and good luck to you.

 May-14-2007

will <[EMAIL PROTECTED]> wrote: Hi Tao,
 I used a modified dBUG as my bootloader and I have used the 'mm' and 'md' 
commands to test my memory.
 The test result was just fine when I modified and read the very border of the 
64M memory. I am confused and the hardware designer is
 unreachable now. I port the kernel to the platform just according to the 
circuit diagram. Can you give me any suggestion?
 Thans!
 BR,
 Will Huang

> Hi, Mr. Huang, > I think you don't need to set the CS in kernel. As for the 
> SDRAM, it is not easy to make it work, so first, I think you'd better check 
> the problem in your bootloader, some bootloaders such as u-boot can do memory 
> write and read, so you can use these operations to check if the SDRAM on 
> board can be accessed properly. If not, the problem is in your bootloader, so 
> you may need to ask the hardware engineer, what is parameters of SDRAM, and 
> then how to initialize it to work properly. > In summay, testing the SDRAM 
> from bootloader if possible, then when it is passed the test, starting you 
> kernel load and boot. > Good luck to you. 

ÏÖÔÚ¹ºÂò21CNÆóÒµÓÊÏä,¼´¿ÉÓÃ100Ôª»»5000Ôª!
ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡
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Re: [uClinux-dev] Re: uclinux with RAM size problem

2007-05-13 Thread Tao Wang

Hi,
 I don't have experiences related to dBUG and coldfire, but I think we can 
find some ways to find the reasom of problem.
 Firstly, you have checked the border of 64MB of SDRAM, so if you write 
0x5A into 0x3FF, what are the values at 0x2FF, 0x1FF, or 0xF. 
and what if you write 0x5A to 0x400, what happens?
 Then, if there is really working 64MB SDRAM, can you find an old stable 
version of Linux, and then run it with your ramdisk configuration, check the 
results.
 If is good, we can get that, there is something wrong during the porting, 
especialy related to memory, so you can compare the codes related to HW/LSP, 
maybe it is there.
 If not, I don't have any more ideas now, you can ask Ungreg, it is the 
guru of coldfire.
 I hope I am helpful, and good luck to you.

 May-14-2007

will <[EMAIL PROTECTED]> wrote: Hi Tao,
 I used a modified dBUG as my bootloader and I have used the 'mm' and 'md' 
commands to test my memory.
 The test result was just fine when I modified and read the very border of the 
64M memory. I am confused and the hardware designer is
 unreachable now. I port the kernel to the platform just according to the 
circuit diagram. Can you give me any suggestion?
 Thans!
 BR,
 Will Huang

> Hi, Mr. Huang, > I think you don't need to set the CS in kernel. As for the 
> SDRAM, it is not easy to make it work, so first, I think you'd better check 
> the problem in your bootloader, some bootloaders such as u-boot can do memory 
> write and read, so you can use these operations to check if the SDRAM on 
> board can be accessed properly. If not, the problem is in your bootloader, so 
> you may need to ask the hardware engineer, what is parameters of SDRAM, and 
> then how to initialize it to work properly. > In summay, testing the SDRAM 
> from bootloader if possible, then when it is passed the test, starting you 
> kernel load and boot. > Good luck to you. 

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ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡
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[uClinux-dev] Re: uclinux with RAM size problem

2007-05-13 Thread will

Hi Tao,
I used a modified dBUG as my bootloader and I have used the 'mm' and 'md' commands to test my memory.
The test result was just fine when I modified and read the very border of the 64M memory. I am confused and the hardware designer is
unreachable now. I port the kernel to the platform just according to the circuit diagram. Can you give me any suggestion?
Thans!
BR,
Will Huang> Hi, Mr. Huang, > I think you don't need to set the CS in kernel. As for the SDRAM, it is not easy to make it work, so first, I think you'd better check the problem in your bootloader, some bootloaders such as u-boot can do memory write and read, so you can use these operations to check if the SDRAM on board can be accessed properly. If not, the problem is in your bootloader, so you may need to ask the hardware engineer, what is parameters of SDRAM, and then how to initialize it to work properly. > In summay, testing the SDRAM from bootloader if possible, then when it is passed the test, starting you kernel load and boot. > Good luck to you. ÏÖÔÚ¹ºÂò21CNÆóÒµÓÊÏä,¼´¿ÉÓÃ100Ôª»»5000Ôª!ÖíÄêÐÐ´óÔË£¬²ÂÍ¼Ó®»°·Ñ£¡

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Re: [uClinux-dev] No response after the message "Freeing init memory" on IXP425

2007-05-13 Thread Shuanglin Wang


Greg,

I think I meet the similar problem on my ARM946E-S board. My toolchain 
is gcc 3.4.4 and uClinux is the uClinux-dist-20070130 from uclinux 
official website.


My question is about console setup. What should I do to make console 
work for userland applications? I prefer using "core 
applications->enable console shell" .


Thanks in advance.

Shuanglin


Greg Ungerer wrote:


Hi Srikanth,

Srikanth Chavali wrote:


Hi Greg,
   Just figured out that ADI Engineering is using uClinux-dist.



What version?

I looks like a console setup problem...

Regards
Greg




srikanth chavali

On 5/10/07, *Greg Ungerer* < [EMAIL PROTECTED] 
> wrote:


Hi Srikanthn

Srikanth Chavali wrote:
 >I compiled ( 2.6.x kernel) and loaded the zImage and
ramdisk.gz on my
 > board with IXP425. The board seems to be in the process of
loading the
 > kernel when it stops after the messages shown below.

Are you using the uClinux-dist, or something else?
If yes, what version?

Regards
Greg



 > I googled and found people facing similar issues. I ensured that
i had
 > CONFIG_FPE_NWFPE=y and CONFIG_FPE_FASTFPE is not set in my kernel
configs.
 >
 > Any help would be greatly appreciated.
 >
 > Regards,
 >
 > srikanth chavali
 >
 > Attached are the messages:
 >
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 > Using buffer write method
 > cfi_cmdset_0001: Erase suspend on write enabled
 > Searching for RedBoot partition table in IXP4XX-Flash.0 at offset
0xfe
 > 3 RedBoot partitions found on MTD device IXP4XX-Flash.0
 > Creating 3 MTD partitions on "IXP4XX-Flash.0":
 > 0x-0x0006 : "RedBoot"
 > 0x00fe-0x00fff000 : "FIS directory"
 > mtd: partition "FIS directory" doesn't end on an erase block 
-- force

 > read-only
 > 0x00fff000-0x0100 : "RedBoot config"
 > mtd: partition "RedBoot config" doesn't start on an erase block
boundary
 > -- forc
 > e read-only
 > mice: PS/2 mouse device common for all mice
 > i2c /dev entries driver
 > TCP bic registered
 > NET: Registered protocol family 1
 > NET: Registered protocol family 17
 > RAMDISK: Compressed image found at block 0
 > VFS: Mounted root (ext2 filesystem) readonly.
 > Freeing init memory: 96K 
<--

 > Nothing seems to happen after this
 > although it does'nt look like the system is frozen.
 >
 > --
 > srikanth chavali
 >
 >
 >



 >
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--


Greg Ungerer  --  Chief Software Dude   EMAIL:
[EMAIL PROTECTED] 

Secure Computing CorporationPHONE:   +61 7 3435
2888
825 Stanley St, FAX: +61 7 
3891 3630
Woolloongabba, QLD, 4102, Australia WEB: 
http://www.SnapGear.com

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Re: [uClinux-dev] No response after the message "Freeing init memory" on IXP425

2007-05-13 Thread Greg Ungerer


Hi Srikanth,

Srikanth Chavali wrote:

Hi Greg,
   Just figured out that ADI Engineering is using uClinux-dist.


What version?

I looks like a console setup problem...

Regards
Greg




srikanth chavali

On 5/10/07, *Greg Ungerer* < [EMAIL PROTECTED] 
> wrote:


Hi Srikanthn

Srikanth Chavali wrote:
 >I compiled ( 2.6.x kernel) and loaded the zImage and
ramdisk.gz on my
 > board with IXP425. The board seems to be in the process of
loading the
 > kernel when it stops after the messages shown below.

Are you using the uClinux-dist, or something else?
If yes, what version?

Regards
Greg



 > I googled and found people facing similar issues. I ensured that
i had
 > CONFIG_FPE_NWFPE=y and CONFIG_FPE_FASTFPE is not set in my kernel
configs.
 >
 > Any help would be greatly appreciated.
 >
 > Regards,
 >
 > srikanth chavali
 >
 > Attached are the messages:
 >
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 >  Intel/Sharp Extended Query Table at 0x010A
 > Using buffer write method
 > cfi_cmdset_0001: Erase suspend on write enabled
 > Searching for RedBoot partition table in IXP4XX-Flash.0 at offset
0xfe
 > 3 RedBoot partitions found on MTD device IXP4XX-Flash.0
 > Creating 3 MTD partitions on "IXP4XX-Flash.0":
 > 0x-0x0006 : "RedBoot"
 > 0x00fe-0x00fff000 : "FIS directory"
 > mtd: partition "FIS directory" doesn't end on an erase block -- force
 > read-only
 > 0x00fff000-0x0100 : "RedBoot config"
 > mtd: partition "RedBoot config" doesn't start on an erase block
boundary
 > -- forc
 > e read-only
 > mice: PS/2 mouse device common for all mice
 > i2c /dev entries driver
 > TCP bic registered
 > NET: Registered protocol family 1
 > NET: Registered protocol family 17
 > RAMDISK: Compressed image found at block 0
 > VFS: Mounted root (ext2 filesystem) readonly.
 > Freeing init memory: 96K <--
 > Nothing seems to happen after this
 > although it does'nt look like the system is frozen.
 >
 > --
 > srikanth chavali
 >
 >
 >

 >
 > ___
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 > uClinux-dev@uclinux.org 
 > http://mailman.uclinux.org/mailman/listinfo/uclinux-dev

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 > To unsubscribe see:
 > http://mailman.uclinux.org/mailman/options/uclinux-dev


--

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[EMAIL PROTECTED] 

Secure Computing CorporationPHONE:   +61 7 3435
2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
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--
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--

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Secure Computing CorporationPHONE:   +61 7 3435 2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
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[uClinux-dev] [PATCH]Kernel support for WildFire and WildFireMod

2007-05-13 Thread Steve Bennett

 This patch adds linux-2.6.x kernel support for the Intec Automation
ColdFire 5282-based boards, the WildFire and WildFireMod

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/arch/m68knommu/Kconfig 
uClinux-dist/linux-2.6.x/arch/m68knommu/Kconfig
--- uClinux-dist.orig/linux-2.6.x/arch/m68knommu/Kconfig2006-11-30 
12:03:03.0 +1000
+++ uClinux-dist/linux-2.6.x/arch/m68knommu/Kconfig 2007-05-11 
16:12:05.0 +1000
@@ -323,6 +323,18 @@
depends on M528x
help
  Support for the EMAC.Inc SOM5282EM module.  
+ 
+config WILDFIRE
+   bool "Intec Automation Inc. WildFire board support"
+   depends on M528x
+   help
+ Support for the Intec Automation Inc. WildFire.
+ 
+config WILDFIREMOD
+   bool "Intec Automation Inc. WildFire module support"
+   depends on M528x
+   help
+ Support for the Intec Automation Inc. WildFire module.
 
 config ARN5307
bool "Arnewsh 5307 board support"
diff -urN uClinux-dist.orig/linux-2.6.x/arch/m68knommu/platform/528x/config.c 
uClinux-dist/linux-2.6.x/arch/m68knommu/platform/528x/config.c
--- uClinux-dist.orig/linux-2.6.x/arch/m68knommu/platform/528x/config.c 
2006-10-11 17:07:42.0 +1000
+++ uClinux-dist/linux-2.6.x/arch/m68knommu/platform/528x/config.c  
2007-05-11 16:12:16.0 +1000
@@ -17,12 +17,20 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#ifdef CONFIG_MTD_PARTITIONS
+   #include 
+#endif
+
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 /***/
 
@@ -31,6 +39,7 @@
 unsigned long coldfire_pit_offset(void);
 void coldfire_trap_init(void);
 void coldfire_reset(void);
+void coldfire_qspi_cs_control(u8 cs, u8 command);
 
 /***/
 
@@ -43,6 +52,182 @@
 
 unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
 
+#if defined (CONFIG_SPI)
+
+#if defined(CONFIG_WILDFIRE)
+#define SPI_NUM_CHIPSELECTS0x02
+#define SPI_PAR_VAL0x07  // Enable DIN, DOUT, CLK
+#define SPI_CS_MASK0x18
+
+#define FLASH_BLOCKSIZE(1024*64)
+#define FLASH_NUMBLOCKS16
+#define FLASH_TYPE "m25p80"
+
+#define M25P80_CS  0
+#define MMC_CS 1
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition stm25p_partitions[] = {
+   /* sflash */
+   [0] = {
+   .name = "stm25p80",
+   .offset = 0x,
+   .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS,
+   .mask_flags = 0
+   }
+};
+
+#endif
+
+#elif defined(CONFIG_WILDFIREMOD)
+
+#define SPI_NUM_CHIPSELECTS0x08
+#define SPI_PAR_VAL0x07  // Enable DIN, DOUT, CLK
+#define SPI_CS_MASK0x78
+
+#define FLASH_BLOCKSIZE(1024*64)
+#define FLASH_NUMBLOCKS64
+#define FLASH_TYPE "m25p32"
+/* Reserve 1M for the kernel parition */
+#define FLASH_KERNEL_SIZE   (1024 * 1024)
+
+#define M25P80_CS  5
+#define MMC_CS 6
+
+#ifdef CONFIG_MTD_PARTITIONS
+static struct mtd_partition stm25p_partitions[] = {
+   /* sflash */
+   [0] = {
+   .name = "kernel",
+   .offset = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE,
+   .size = FLASH_KERNEL_SIZE,
+   .mask_flags = 0
+   },
+   [1] = {
+   .name = "image",
+   .offset = 0x,
+   .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS - FLASH_KERNEL_SIZE,
+   .mask_flags = 0
+   },
+   [2] = {
+   .name = "all",
+   .offset = 0x,
+   .size = FLASH_BLOCKSIZE * FLASH_NUMBLOCKS,
+   .mask_flags = 0
+   }
+};
+#endif
+
+#else
+#define SPI_NUM_CHIPSELECTS0x04
+#define SPI_PAR_VAL0x7F  // Enable DIN, DOUT, CLK, CS0 - CS4
+#endif
+
+#ifdef MMC_CS
+static struct coldfire_spi_chip flash_chip_info = {
+   .mode = SPI_MODE_0,
+   .bits_per_word = 16,
+   .del_cs_to_clk = 17,
+   .del_after_trans = 1,
+   .void_write_data = 0
+};
+
+static struct coldfire_spi_chip mmc_chip_info = {
+   .mode = SPI_MODE_0,
+   .bits_per_word = 16,
+   .del_cs_to_clk = 17,
+   .del_after_trans = 1,
+   .void_write_data = 0x
+};
+#endif
+
+#ifdef M25P80_CS
+static struct flash_platform_data stm25p80_platform_data = {
+   .name = "ST M25P80 SPI Flash chip",
+#ifdef CONFIG_MTD_PARTITIONS
+   .parts = stm25p_partitions,
+   .nr_parts = sizeof(stm25p_partitions) / sizeof(*stm25p_partitions),
+#endif
+   .type = FLASH_TYPE
+};
+#endif
+
+static struct spi_board_info spi_board_info[] __initdata = {
+#ifdef M25P80_CS
+   {
+   .modalias = "m25p80",
+   .max_speed_hz = 1600,
+

[uClinux-dev] [PATCH]coldfire qspi driver

2007-05-13 Thread Steve Bennett

 This patch adds support for the SPI driver for Freescale Coldfire QSPI module
in master mode. Tested with the 5282 processor, but should also work with other
Coldfire variants.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c 
uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c
--- uClinux-dist.orig/linux-2.6.x/drivers/mtd/devices/m25p80.c  2006-10-09 
10:01:47.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/mtd/devices/m25p80.c   2007-05-11 
16:12:09.0 +1000
@@ -201,6 +201,7 @@
addr = instr->addr;
len = instr->len;
 
+   qspi_mutex_down("m25p80");
down(&flash->lock);
 
/* now erase those sectors */
@@ -216,6 +217,7 @@
}
 
up(&flash->lock);
+   qspi_mutex_up("m25p80");
 
instr->state = MTD_ERASE_DONE;
mtd_erase_callback(instr);
@@ -260,6 +262,7 @@
if (retlen)
*retlen = 0;
 
+   qspi_mutex_down("m25p80");
down(&flash->lock);
 
/* Wait till previous write/erase is done. */
@@ -282,6 +285,7 @@
*retlen = m.actual_length - sizeof(flash->command);
 
up(&flash->lock);
+   qspi_mutex_up("m25p80");
 
return 0;
 }
@@ -323,6 +327,7 @@
t[1].tx_buf = buf;
spi_message_add_tail(&t[1], &m);
 
+   qspi_mutex_down("m25p80");
down(&flash->lock);
 
/* Wait until finished previous write command. */
@@ -385,6 +390,7 @@
}
 
up(&flash->lock);
+   qspi_mutex_up("m25p80");
 
return 0;
 }
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig 
uClinux-dist/linux-2.6.x/drivers/spi/Kconfig
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Kconfig   2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Kconfig2007-05-11 
16:12:05.0 +1000
@@ -103,6 +103,15 @@
  GPIO lines to provide the SPI bus. This can be used where
  the inbuilt hardware cannot provide the transfer mode, or
  where the board is using non hardware connected pins.
+ 
+config SPI_COLDFIRE
+   tristate "Coldfire QSPI SPI Master"
+   depends on SPI_MASTER && COLDFIRE && EXPERIMENTAL
+   help
+ SPI driver for Freescale Coldfire QSPI module in master mode.
+ Tested with the 5282 processor, but should also work with other
+ Coldfire variants.
+
 #
 # Add new SPI master controllers in alphabetical order above this line
 #
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile 
uClinux-dist/linux-2.6.x/drivers/spi/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/Makefile  2006-06-19 
11:02:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/Makefile   2007-05-11 
16:12:05.0 +1000
@@ -17,6 +17,7 @@
 obj-$(CONFIG_SPI_MPC83xx)  += spi_mpc83xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
 obj-$(CONFIG_SPI_S3C24XX)  += spi_s3c24xx.o
+obj-$(CONFIG_SPI_COLDFIRE) += spi_coldfire.o
 obj-$(CONFIG_MCFQSPI)  += mcf_qspi.o
 obj-$(CONFIG_DS1305)   += DS1305RTC.o
 #  ... add above this line ...
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c 
uClinux-dist/linux-2.6.x/drivers/spi/spi.c
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/spi.c 2006-11-30 
09:27:55.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/spi.c  2007-05-11 16:12:09.0 
+1000
@@ -25,6 +25,40 @@
 #include 
 #include 
 
+#if 1
+
+EXPORT_SYMBOL(qspi_mutex_down);
+EXPORT_SYMBOL(qspi_mutex_up);
+
+static DECLARE_MUTEX(sem);
+
+ /**
+  * qspi_mutex_down.
+  * get in line for the qspi mutex
+  * the internal kernel calls do not hold the mutex themselves and so down/up
+  * must be called manually. This introduces a new level of complexity,
+  * but is required, as it may be necessary for some drivers to
+  * hold the mutex through more than one transaction.
+  */
+ void qspi_mutex_down(char *s){
+//printk( "d:%s", s);
+down_interruptible(&sem);
+//printk( "-");
+ }
+
+ /**
+  * qspi_mutex up
+  * signal the qspi mutex.
+  * see qspi_mutex_down
+  */
+ void qspi_mutex_up(char *s){
+//printk( "%s:", s);
+up(&sem);
+//printk( "u\n");
+ }
+
+ #endif
+
 
 /* SPI bustype and spi_master class are registered after board init code
  * provides the SPI device tables, ensuring that both are present by the
@@ -360,7 +394,7 @@
if (!dev)
return NULL;
 
-   master = kzalloc(size + sizeof *master, SLAB_KERNEL);
+   master = kzalloc(size + sizeof *master, GFP_KERNEL);
if (!master)
return NULL;
 
@@ -447,7 +481,9 @@
  */
 void spi_unregister_master(struct spi_master *master)
 {
-   (void) device_for_each_child(master->cdev.dev, NULL, __unregister);
+   int dummy;
+
+   dummy = device_for_each_child(master->cdev.dev, NULL, __unregister);
class_device_unregister(&master->cdev);
 }

[uClinux-dev] [PATCH]spi bitbang with explicit "tx idle" output

2007-05-13 Thread Steve Bennett

 This patch adds support to the spi-bitbang driver for explicitly setting
what data is transmitted when the tx buffer is empty.
Either zeroes (the default), or ones (if SPI_TX_1 is set)

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/include/linux/spi/spi.h 
uClinux-dist/linux-2.6.x/include/linux/spi/spi.h
--- uClinux-dist.orig/linux-2.6.x/include/linux/spi/spi.h   2006-10-09 
10:01:37.0 +1000
+++ uClinux-dist/linux-2.6.x/include/linux/spi/spi.h2007-05-11 
16:12:05.0 +1000
@@ -71,6 +71,7 @@
 #defineSPI_MODE_3  (SPI_CPOL|SPI_CPHA)
 #defineSPI_CS_HIGH 0x04/* chipselect active 
high? */
 #defineSPI_LSB_FIRST   0x08/* per-word 
bits-on-wire */
+#defineSPI_TX_10x10/* shift out ones on 
rx-only */
u8  bits_per_word;
int irq;
void*controller_state;
@@ -289,8 +290,9 @@
  * the data being transferred; that may reduce overhead, when the
  * underlying driver uses dma.
  *
- * If the transmit buffer is null, undefined data will be shifted out
- * while filling rx_buf.  If the receive buffer is null, the data
+ * If the transmit buffer is null, zeroes will be shifted out while
+ * filling rx_buf, unless SPI_TX_1 is set in spi->mode (in which case
+ * ones will be shifted out).  If the receive buffer is null, the data
  * shifted in will be discarded.  Only "len" bytes shift out (or in).
  * It's an error to try to shift out a partial word.  (For example, by
  * shifting out three bytes with word size of sixteen or twenty bits;
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/spi/spi_bitbang.c 
uClinux-dist/linux-2.6.x/drivers/spi/spi_bitbang.c
--- uClinux-dist.orig/linux-2.6.x/drivers/spi/spi_bitbang.c 2006-10-09 
10:01:44.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/spi/spi_bitbang.c  2007-05-11 
16:12:05.0 +1000
@@ -73,10 +73,14 @@
u8  *rx = t->rx_buf;
 
while (likely(count > 0)) {
-   u8  word = 0;
+   u8  word;
 
if (tx)
word = *tx++;
+   else if (spi->mode & SPI_TX_1)
+   word = ~0;
+   else
+   word = 0;
word = txrx_word(spi, ns, word, bits);
if (rx)
*rx++ = word;
@@ -99,10 +103,14 @@
u16 *rx = t->rx_buf;
 
while (likely(count > 1)) {
-   u16 word = 0;
+   u16 word;
 
if (tx)
word = *tx++;
+   else if (spi->mode & SPI_TX_1)
+   word = ~0;
+   else
+   word = 0;
word = txrx_word(spi, ns, word, bits);
if (rx)
*rx++ = word;
@@ -125,10 +133,14 @@
u32 *rx = t->rx_buf;
 
while (likely(count > 3)) {
-   u32 word = 0;
+   u32 word;
 
if (tx)
word = *tx++;
+   else if (spi->mode & SPI_TX_1)
+   word = ~0;
+   else
+   word = 0;
word = txrx_word(spi, ns, word, bits);
if (rx)
*rx++ = word;
@@ -176,6 +188,8 @@
 }
 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
 
+#define MODEBITS   (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_TX_1)
+
 /**
  * spi_bitbang_setup - default setup for per-word I/O loops
  */
@@ -192,8 +206,11 @@
 * just bitbang_txrx_le_cphaX() routines shifting the other way, and
 * some hardware controllers also have this support.
 */
-   if ((spi->mode & SPI_LSB_FIRST) != 0)
+   if (spi->mode & ~MODEBITS) {
+   dev_dbg(&spi->dev, "unsupported SPI mode bits %04x\n",
+   spi->mode & ~MODEBITS);
return -EINVAL;
+   }
 
if (!cs) {
cs = kzalloc(sizeof *cs, SLAB_KERNEL);
___
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[uClinux-dev] [PATCH]Access FEC MII via bit bang interface

2007-05-13 Thread Steve Bennett

 This patch add support for FEC MII access via bit banging.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/net/Kconfig 
uClinux-dist/linux-2.6.x/drivers/net/Kconfig
--- uClinux-dist.orig/linux-2.6.x/drivers/net/Kconfig   2006-11-30 
12:03:18.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/net/Kconfig2007-05-11 
16:12:16.0 +1000
@@ -1909,6 +1909,14 @@
  Say Y here if you want to use the built-in 10/100 Fast ethernet
  controller on some Motorola ColdFire processors.
 
+config FEC_MII_BIT_BANG
+   bool "FEC MII bit bang interface"
+   depends on FEC && (WILDFIRE || WILDFIREMOD)
+   help
+ Say Y here if you want to use the MII bit banging interfaces.
+ The bit banging interfaces will use two digital IO lines
+ instead of the built in MII module.
+   
 config FEC2
bool "Second FEC ethernet controller (on some ColdFire CPUs)"
depends on FEC
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/net/Makefile 
uClinux-dist/linux-2.6.x/drivers/net/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/net/Makefile  2006-11-30 
12:03:18.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/net/Makefile   2007-05-11 
16:12:16.0 +1000
@@ -91,6 +91,7 @@
 obj-$(CONFIG_OPEN_ETH) += open_eth.o
 obj-$(CONFIG_MTIP1000_ETH) += mtip1000.o
 obj-$(CONFIG_FEC) += fec.o
+obj-$(CONFIG_FEC_MII_BIT_BANG) += fec_mii_bit_bang.o
 obj-$(CONFIG_ARM_ETHERH) += 8390.o
 obj-$(CONFIG_WD80x3) += wd.o 8390.o
 obj-$(CONFIG_EL2) += 3c503.o 8390.o
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/net/fec.c 
uClinux-dist/linux-2.6.x/drivers/net/fec.c
--- uClinux-dist.orig/linux-2.6.x/drivers/net/fec.c 2007-01-17 
15:58:59.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/net/fec.c  2007-05-11 16:12:16.0 
+1000
@@ -60,6 +60,10 @@
 #include "commproc.h"
 #endif
 
+#if defined(CONFIG_FEC_MII_BIT_BANG)
+#include "fec_mii_bit_bang.h"
+#endif
+
 #if defined(CONFIG_FEC2)
 #defineFEC_MAX_PORTS   2
 #else
@@ -745,6 +749,19 @@
 
spin_lock_irqsave(&fep->lock,flags);
 
+#if defined(CONFIG_FEC_MII_BIT_BANG)
+   /* If bit banging the MII just do it and don't bother
+* adding it to the queue.  once we have the result
+* call the function to parse it.
+*/
+   {
+   uint mii_result;
+   mii_result = mii_bit_bang_do(regval);
+   if (func != NULL) {
+   func(mii_result, dev);
+   }
+   }
+#else
if ((mip = mii_free) != NULL) {
mii_free = mip->mii_next;
mip->mii_regval = regval;
@@ -762,6 +779,7 @@
else {
retval = 1;
}
+#endif
 
spin_unlock_irqrestore(&fep->lock,flags);
 
@@ -1159,6 +1177,28 @@
 };
 
 /* - */
+/* ST Microelectronics STE100P phy   */
+
+/* register definitions for the STE100P */
+
+static phy_cmd_t const phy_cmd_ste100p_config[] = {
+   { mk_mii_read(MII_REG_CR), mii_parse_cr },
+   { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
+   { mk_mii_end, }
+   };
+static phy_cmd_t const phy_cmd_ste100p_startup[] = {
+   { mk_mii_read(MII_REG_SR), mii_parse_sr },
+   { mk_mii_end, }
+   };
+
+static phy_info_t phy_info_ste100p = {
+   .id = 0x1c04001,
+   .name = "STE100P",
+   .config = phy_cmd_ste100p_config,
+   .startup = phy_cmd_ste100p_startup,
+};
+
+/* - */
 /* register definitions for the DP83848 */
 
 #define MII_DP8384X_PHYSTST16  /* PHY Status Register */
@@ -1226,6 +1266,7 @@
&phy_info_am79c874,
&phy_info_ks8721bl,
&phy_info_dp83848,
+   &phy_info_ste100p,
NULL
 };
 
@@ -1423,7 +1464,9 @@
 
gpio_paspar = (volatile u16 *) (MCF_IPSBAR + 0x100056);
gpio_pehlpar = (volatile u16 *) (MCF_IPSBAR + 0x100058);
+#if !defined(CONFIG_FEC_MII_BIT_BANG)
*gpio_paspar |= 0x0f00;
+#endif
*gpio_pehlpar = 0xc0;
}
 #endif
@@ -2469,6 +2512,10 @@
/* setup MII interface */
fec_set_mii(dev, fep);
 
+#if defined(CONFIG_FEC_MII_BIT_BANG)
+   mii_bit_bang_setup();
+#endif
+
/* Clear and enable interrupts */
fecp->fec_ievent = 0xffc0;
fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB |
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/net/fec_mii_bit_bang.c 
uClinux-dist/linux-2.6.x/drivers/net/fec_mii_bit_bang.c
--- uClinux-dist.orig/linux-2.6.x/drivers/net/fec_mii_bit_bang.c
1970-01-01 10:00:00.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/net/fec_mii_bit_bang.c 2007-05-11 
16:12:16.0 +1000
@@ -0,0 +1,335 @@
+/***

[uClinux-dev] [PATCH]Driver for access to MCF IPS

2007-05-13 Thread Steve Bennett

 This patch adds a driver for simple access to the
Coldfire Internal Peripheral System (IPS) address space
via the /dev/ips char device.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile 
uClinux-dist/linux-2.6.x/drivers/char/Makefile
--- uClinux-dist.orig/linux-2.6.x/drivers/char/Makefile 2006-11-30 
12:03:15.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/Makefile  2007-05-11 
16:12:16.0 +1000
@@ -54,6 +54,7 @@
 obj-$(CONFIG_HVCS) += hvcs.o
 obj-$(CONFIG_SGI_MBCS) += mbcs.o
 obj-$(CONFIG_MCF_QSPI) += mcf_qspi.o
+obj-$(CONFIG_MCF_IPS)  += mcf_ips.o
 obj-$(CONFIG_BRIQ_PANEL)   += briq_panel.o
 
 obj-$(CONFIG_PRINTER)  += lp.o
diff -urN uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c 
uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c
--- uClinux-dist.orig/linux-2.6.x/drivers/char/mcf_ips.c1970-01-01 
10:00:00.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/char/mcf_ips.c 2007-05-11 
16:12:16.0 +1000
@@ -0,0 +1,184 @@
+/*
+ * linux-2.4.x/drivers/char/mcf_ips.c
+ *
+ * Internal Peripheral System Access Driver
+ *
+ * Copyright (C) 2005 Intec Automation ([EMAIL PROTECTED])
+ *
+ *
+ * Provides simple access to the Coldfire Internal Peripheral System
+ * address space via the /dev/ips char device.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEVICE_NAME "ips"
+
+/* Use a dynamically assigned misc device minor */
+/*#define IPS_MAJOR 0*/
+/* Or a statically assigned device major */
+#define IPS_MAJOR 122
+
+MODULE_AUTHOR("Mike Lavender <[EMAIL PROTECTED]>");
+MODULE_DESCRIPTION("Driver for Reading and Writing Peripherals");
+MODULE_SUPPORTED_DEVICE("Motorola MCF5282");
+MODULE_LICENSE("GPL");
+
+/* ioctl to set the read/write address */
+#define IPS_REG_SET 1
+
+static ssize_t
+ips_read(
+struct file *file,
+char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)buffer = *(char *)file->private_data;
+ret = 1;
+break;
+case 2:
+*(short *)buffer = *(short *)file->private_data;
+ret = 2;
+break;
+case 4:
+*(int *)buffer = *(int *)file->private_data;
+ret = 4;
+break;
+default:
+memcpy( buffer, (char *)file->private_data, length );
+ret = length;
+}
+
+return (ret);
+}
+
+static ssize_t
+ips_write(
+struct file *file,
+const char *buffer,
+size_t length,
+loff_t *offset )
+{
+int ret = 0;
+
+switch (length)
+{
+case 1:
+*(char *)file->private_data = *(char *)buffer;
+ret = 1;
+break;
+case 2:
+*(short *)file->private_data = *(short *)buffer;
+ret = 2;
+break;
+case 4:
+*(int *)file->private_data = *(int *)buffer;
+ret = 4;
+break;
+default:
+memcpy( (char *)file->private_data, buffer, length );
+ret = length;
+}
+
+return (ret);
+}
+
+int
+ips_ioctl(
+struct inode *inode,
+struct file *file,
+unsigned int ioctl_num,
+unsigned long ioctl_param )
+{
+int ret = 0;
+
+switch (ioctl_num) {
+case IPS_REG_SET:
+file->private_data = (void *)ioctl_param;
+break;
+default:
+ret = -EINVAL;
+}
+
+return (ret);
+}
+
+static int
+ips_open(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+static int
+ips_release(
+struct inode *inode,
+struct file *file )
+{
+return 0;
+}
+
+/*  fixed for 2.4 kernel, owner was ifdef'ed out for 2.0 kernel */
+static struct file_operations fops = {
+owner:  THIS_MODULE,
+read:   ips_read,
+write:  ips_write,
+ioctl:  ips_ioctl,
+open:   ips_open,
+release:ips_release  /* a.k.a. close */
+};
+
+#if IPS_MAJOR == 0
+static struct miscdevice misc_fops = {
+   .minor = MISC_DYNAMIC_MINOR,
+   .name = DEVICE_NAME,
+   .fops = &fops
+};
+#endif
+
+int __init
+ips_init(void)
+{
+   int ret;
+
+#if IPS_MAJOR == 0
+   ret = misc_register(&misc_fops);
+#else
+   ret = register_chrdev(IPS_MAJOR, DEVICE_NAME, &fops);
+#endif
+   
+   if (ret < 0) {
+   return -EIO;
+   }
+
+   printk("MCF IPS device driver installed\n");
+
+   return 0;
+}
+
+void __exit
+ips_exit(void)
+{
+#if IPS_MAJOR == 0
+   misc_deregister(&misc_fops);
+#else
+   unregister_chrdev(IPS_MAJOR, DEVICE_NAME);
+#endif
+}
+
+module_init(ips_init);
+module_exit(ips_exit);
diff -urN uClin

[uClinux-dev] [PATCH]Alarm support for PCF8563 RTC

2007-05-13 Thread Steve Bennett

 This patch adds support for reading and writing the alarm setting
on the PCF8563 RTC.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/rtc/rtc-pcf8563.c 
uClinux-dist/linux-2.6.x/drivers/rtc/rtc-pcf8563.c
--- uClinux-dist.orig/linux-2.6.x/drivers/rtc/rtc-pcf8563.c 2006-11-30 
09:27:49.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/rtc/rtc-pcf8563.c  2007-05-11 
16:12:16.0 +1000
@@ -53,14 +53,32 @@
 #define PCF8563_SC_LV  0x80 /* low voltage */
 #define PCF8563_MO_C   0x80 /* century */
 
+/* Define various control and status bits in the registers. */
+#definePCF8563_ST1_TEST1   0x80// 1 = test mode.
+#definePCF8563_ST1_STOP0x20// 1 = stop RTC.
+#definePCF8563_ST1_TESTC   0x8 // 1 = override 
power-on reset.
+
+#definePCF8563_ST2_TI  0x10// 1 = output clock on 
/int.
+#definePCF8563_ST2_AF  0x8 // Alarm flag.
+#definePCF8563_ST2_TF  0x4 // Timer flag.
+#definePCF8563_ST2_AIE 0x2 // Alarm interrupt 
enable.
+#definePCF8563_ST2_TIE 0x1 // Timer interrupt 
enable.
+
+#definePCF8563_ALARM_AE0x80// 1 = enable alarm 
output.
+
 static int pcf8563_probe(struct i2c_adapter *adapter, int address, int kind);
 static int pcf8563_detach(struct i2c_client *client);
 
+#define ALARM_BCD2BIN(B) (((B) & PCF8563_ALARM_AE) ? 0xFF : BCD2BIN(B))
+#define ALARM_BIN(B) (((B) & PCF8563_ALARM_AE) ? 0xFF : (B))
+
 /*
  * In the routines that deal directly with the pcf8563 hardware, we use
  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
+ *
+ * If 'alrm' is not NULL, the alarm state is retrieved into *tm, alrm->pending 
and alrm->enabled.
  */
-static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)
+static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time 
*tm, struct rtc_wkalrm *alrm)
 {
unsigned char buf[13] = { PCF8563_REG_ST1 };
 
@@ -87,39 +105,63 @@
buf[4], buf[5], buf[6], buf[7],
buf[8]);
 
+   if (alrm) {
+   dev_dbg(&client->dev,
+   "%s: alarm raw data is min=%02x, hr=%02x, "
+   "mday=%02x, wday=%02x\n",
+   __FUNCTION__,
+   buf[9], buf[10], buf[11], buf[12]);
+   }
 
-   tm->tm_sec = BCD2BIN(buf[PCF8563_REG_SC] & 0x7F);
-   tm->tm_min = BCD2BIN(buf[PCF8563_REG_MN] & 0x7F);
-   tm->tm_hour = BCD2BIN(buf[PCF8563_REG_HR] & 0x3F); /* rtc hr 0-23 */
-   tm->tm_mday = BCD2BIN(buf[PCF8563_REG_DM] & 0x3F);
-   tm->tm_wday = buf[PCF8563_REG_DW] & 0x07;
+   /* Alarm has no month and year, so these are the same for both */
tm->tm_mon = BCD2BIN(buf[PCF8563_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
tm->tm_year = BCD2BIN(buf[PCF8563_REG_YR])
+ (buf[PCF8563_REG_MO] & PCF8563_MO_C ? 0 : 100);
 
-   dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
+   if (alrm) {
+   tm->tm_sec = 0;
+   tm->tm_min = ALARM_BCD2BIN(buf[PCF8563_REG_AMN]);
+   tm->tm_hour = ALARM_BCD2BIN(buf[PCF8563_REG_AHR] & 0xBF);
+   tm->tm_mday = ALARM_BCD2BIN(buf[PCF8563_REG_ADM] & 0xBF);
+   tm->tm_wday = ALARM_BIN(buf[PCF8563_REG_ADW] & 0x87);
+   /* tm_mon and tm_year are set below */
+   alrm->enabled = buf[PCF8563_REG_ST2] & PCF8563_ST2_AIE;
+   alrm->pending = buf[PCF8563_REG_ST2] & PCF8563_ST2_AF;
+   }
+   else {
+   tm->tm_sec = BCD2BIN(buf[PCF8563_REG_SC] & 0x7F);
+   tm->tm_min = BCD2BIN(buf[PCF8563_REG_MN] & 0x7F);
+   tm->tm_hour = BCD2BIN(buf[PCF8563_REG_HR] & 0x3F); /* rtc hr 
0-23 */
+   tm->tm_mday = BCD2BIN(buf[PCF8563_REG_DM] & 0x3F);
+   tm->tm_wday = buf[PCF8563_REG_DW] & 0x07;
+
+   /* the clock can give out invalid datetime, but we cannot return
+* -EINVAL otherwise hwclock will refuse to set the time on 
bootup.
+*/
+   if (rtc_valid_tm(tm) < 0) {
+   dev_err(&client->dev, "retrieved date/time is not 
valid.\n");
+   }
+   }
+
+   dev_dbg(&client->dev, "%s: %s tm is secs=%d, mins=%d, hours=%d, "
"mday=%d, mon=%d, year=%d, wday=%d\n",
__FUNCTION__,
+   alrm ? "alarm" : "time",
tm->tm_sec, tm->tm_min, tm->tm_hour,
tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 
-   /* the clock can give out invalid datetime, but we cannot return
-* -EINVAL otherwise hwclock will refuse to set the time on bootup.
-*/
-   if (rtc_valid_tm(tm) < 0)
-   dev_err(&client->dev, "retrieved date/time is not v

[uClinux-dev] [PATCH]Common names for MCF I2C

2007-05-13 Thread Steve Bennett

 The MCF I2C-related register definitions have been renamed separately
for the MCF 528x and 532x series. This breaks the i2c-mcf driver.
I see no reason not to use common names, thus making the i2c-mcf driver
work again.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c 
uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c
--- uClinux-dist.orig/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c  2006-12-12 
23:21:50.0 +1000
+++ uClinux-dist/linux-2.6.x/drivers/i2c/busses/i2c-mcf.c   2007-05-11 
16:12:16.0 +1000
@@ -501,7 +501,7 @@
/* Port AS Pin Assignment Register (PASPAR) */
/*  PASPA1 = 11 = AS1 pin is I2C SDA*/
/*  PASPA0 = 11 = AS0 pin is I2C SCL*/
-   *MCF_GPIO_PASPAR |= 0x000F; /* u16 declaration */
+   *MCF5282_GPIO_PASPAR |= 0x000F; /* u16 declaration */
 #endif
 
 
diff -urN uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h  
2007-01-25 10:44:14.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h   2007-05-11 
16:12:16.0 +1000
@@ -63,31 +76,31 @@
 *
 */
 /* Read/Write access macros for general use */
-#define MCF5282_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // 
Address 
-#define MCF5282_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq 
Divider
-#define MCF5282_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // 
Control
-#define MCF5282_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // Status
-#define MCF5282_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // Data 
I/O
+#define MCF_I2C_I2ADR   (volatile u8 *) (MCF_IPSBAR + 0x0300) // Address 
+#define MCF_I2C_I2FDR   (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq 
Divider
+#define MCF_I2C_I2CR(volatile u8 *) (MCF_IPSBAR + 0x0308) // Control
+#define MCF_I2C_I2SR(volatile u8 *) (MCF_IPSBAR + 0x030C) // Status
+#define MCF_I2C_I2DR(volatile u8 *) (MCF_IPSBAR + 0x0310) // Data I/O
 
 /* Bit level definitions and macros */
-#define MCF5282_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
+#define MCF_I2C_I2ADR_ADDR(x)   (((x)&0x7F)<<0x01)
 
-#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F))
+#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F))
 
-#define MCF5282_I2C_I2CR_IEN(0x80) // I2C enable
-#define MCF5282_I2C_I2CR_IIEN   (0x40)  // interrupt enable
-#define MCF5282_I2C_I2CR_MSTA   (0x20)  // master/slave mode
-#define MCF5282_I2C_I2CR_MTX(0x10)  // transmit/receive mode
-#define MCF5282_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
-#define MCF5282_I2C_I2CR_RSTA   (0x04)  // repeat start
-
-#define MCF5282_I2C_I2SR_ICF(0x80)  // data transfer bit
-#define MCF5282_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
-#define MCF5282_I2C_I2SR_IBB(0x20)  // I2C bus busy
-#define MCF5282_I2C_I2SR_IAL(0x10)  // aribitration lost
-#define MCF5282_I2C_I2SR_SRW(0x04)  // slave read/write
-#define MCF5282_I2C_I2SR_IIF(0x02)  // I2C interrupt
-#define MCF5282_I2C_I2SR_RXAK   (0x01)  // received acknowledge
+#define MCF_I2C_I2CR_IEN(0x80) // I2C enable
+#define MCF_I2C_I2CR_IIEN   (0x40)  // interrupt enable
+#define MCF_I2C_I2CR_MSTA   (0x20)  // master/slave mode
+#define MCF_I2C_I2CR_MTX(0x10)  // transmit/receive mode
+#define MCF_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
+#define MCF_I2C_I2CR_RSTA   (0x04)  // repeat start
+
+#define MCF_I2C_I2SR_ICF(0x80)  // data transfer bit
+#define MCF_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
+#define MCF_I2C_I2SR_IBB(0x20)  // I2C bus busy
+#define MCF_I2C_I2SR_IAL(0x10)  // aribitration lost
+#define MCF_I2C_I2SR_SRW(0x04)  // slave read/write
+#define MCF_I2C_I2SR_IIF(0x02)  // I2C interrupt
+#define MCF_I2C_I2SR_RXAK   (0x01)  // received acknowledge
 
 
 
diff -urN uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m532xsim.h  
2006-05-26 16:18:02.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m532xsim.h   2007-05-11 
16:12:16.0 +1000
@@ -131,33 +131,33 @@
  */
 
 /* Read/Write access macros for general use */
-#define MCF532x_I2C_I2ADR   (volatile u8 *) (0xFC058000) // Address 
-#define MCF532x_I2C_I2FDR   (volatile u8 *) (0xFC058004) // Freq Divider
-#define MCF532x_I2C_I2CR(volatile u8 *) (0xFC058008) // Control
-#define MCF532x_I2C_I2SR(volatile u8 *) (0xFC05800C) // Status
-#define MCF532x_I2C_I2DR(vola

[uClinux-dev] [PATCH]Add various 5282 register definitions

2007-05-13 Thread Steve Bennett

 This patch adds definitions for various MCF 5282 registers

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h 
uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h
--- uClinux-dist.orig/linux-2.6.x/include/asm-m68knommu/m528xsim.h  
2007-01-25 10:44:14.0 +1000
+++ uClinux-dist/linux-2.6.x/include/asm-m68knommu/m528xsim.h   2007-05-11 
16:12:16.0 +1000
@@ -31,6 +31,8 @@
 #defineMCFINT_UART013  /* Interrupt number for 
UART0 */
 #defineMCFINT_PIT1 55  /* Interrupt number for 
PIT1 */
 
+#defineMCF5282_INTC0   (MCF_IPSBAR + MCFICM_INTC0)
+
 /*
  * SDRAM configuration registers.
  */
@@ -50,6 +52,17 @@
 /* Port UA Pin Assignment Register (8 Bit) */
 #define MCF5282_GPIO_PUAPAR0x10005C
 
+#define MCF5282_GPIO_PORTQS (*(volatile u8 *)  (MCF_IPSBAR + 0x001D))
+#define MCF5282_GPIO_DDRQS  (*(volatile u8 *)  (MCF_IPSBAR + 0x00100021))
+#define MCF5282_GPIO_PORTQSP(*(volatile u8 *)  (MCF_IPSBAR + 0x00100035))
+#define MCF5282_GPIO_PQSPAR (*(volatile u8 *)  (MCF_IPSBAR + 0x00100059))
+
+#define MCF5282_GPIO_PEPAR  (*(volatile u16 *) (MCF_IPSBAR + 0x00100052))
+
+#define MCF5282_GPIO_PORTE  (*(volatile u8 *)  (MCF_IPSBAR + 0x0014))
+#define MCF5282_GPIO_DDRE   (*(volatile u8 *)  (MCF_IPSBAR + 0x00100018))
+#define MCF5282_GPIO_PORTEP (*(volatile u8 *)  (MCF_IPSBAR + 0x0010002C))
+
 /* Interrupt Mask Register Register Low */ 
 #define MCF5282_INTC0_IMRL  (volatile u32 *) (MCF_IPSBAR + 0x0C0C)
 /* Interrupt Control Register 7 */
@@ -107,6 +120,11 @@
 #define MCF5282_QSPI_QDRMCF_IPSBAR + 0x0354
 #define MCF5282_QSPI_QCRMCF_IPSBAR + 0x0354
 
+#define MCF5282_QSPI_PAR   (MCF_IPSBAR + 0x00100059)
+
+#define MCF5282_QSPI_IRQ_SOURCE   18
+#define MCF5282_QSPI_IRQ_VECTOR   (64 + MCF5282_QSPI_IRQ_SOURCE)
+
 /* Bit level definitions and macros */
 #define MCF5282_QSPI_QMR_MSTR   (0x8000)
 #define MCF5282_QSPI_QMR_DOHIE  (0x4000)
___
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[uClinux-dev] [PATCH]create /dev/rtc with correct dev node

2007-05-13 Thread Steve Bennett



This patch uses 254,0 as the rtc device node if the CONFIG_RTC_INTF_DEV
feature is enabled.

Signed-Off-By: Steve Bennett <[EMAIL PROTECTED]>

diff -urN uClinux-dist.orig/vendors/config/config.dev 
uClinux-dist/vendors/config/config.dev
--- uClinux-dist.orig/vendors/config/config.dev 2006-12-08 08:51:58.0 
+1000
+++ uClinux-dist/vendors/config/config.dev  2007-05-11 16:12:16.0 
+1000
@@ -134,7 +134,7 @@
DEVICES += $(DEVICE_CRYPTO) crypto,c,10,70
 endif
 
-ifneq ($(CONFIG_RTC_DRV_SH)$(CONFIG_RTC_DRV_DS1302),)
+ifneq ($(CONFIG_RTC_INTF_DEV),$(CONFIG_RTC_DRV_SH)$(CONFIG_RTC_DRV_DS1302),)
DEVICES += $(DEVICE_PRIVATE) rtc,c,254,0
 else 
 ifneq 
($(CONFIG_RTC)$(CONFIG_M41T11M6)$(CONFIG_SENSORS_M41T11)$(CONFIG_NVRAM)$(CONFIG_SH_RTC),)

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[uClinux-dev] Patches for Intec coldfire 5282-based WildFire and WildFireMod

2007-05-13 Thread Steve Bennett


Hi Greg,

Following are a series of patches which add support
for the Intec Automation ColdFire 5282-based boards,
the WildFire and WildFireMod.

These patches are all against uClinux-dist-20070130

Let me know if you want these updated against your
latest 2.6.21-uc0 or if you think some of these
should be submitted elsewhere.

Cheers,
Steve
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Re: [uClinux-dev] MicroBlaze petalinux keyboard problem

2007-05-13 Thread Paula Stanciu


Hello,
I am using the petalinux dist, I've managed to make the keyboard initialize
( at least it seams to be doing that) but I have no device is created in
/dev and there is no response from the keyboard when i press the Lock
keys...
I need a way to test the keyboard without using the display ( because that
is not working yet for my board), even a blinking led will be ok but I dont
know how to user the  driver functions in an user space program.

any ideas will be of immense help.
Regards,
Paula
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Re: [uClinux-dev] [PATCH]coldfire qspi driver

Re: [uClinux-dev] [PATCH]Common names for MCF I2C

[uClinux-dev] Re: Upstream merge of big patch

Re: [uClinux-dev] [PATCH]coldfire qspi driver

[uClinux-dev] Upstream merge of big patch

Re: [uClinux-dev] [PATCH]Common names for MCF I2C

Re: [uClinux-dev] [PATCH]Driver for access to MCF IPS

Re: [uClinux-dev] Patches for Intec coldfire 5282-based WildFire and WildFireMod

Re: [uClinux-dev] [PATCH]Driver for access to MCF IPS

Re: [uClinux-dev] [PATCH]Common names for MCF I2C

[uClinux-dev] Re: uclinux with RAM size problem

Re: [uClinux-dev] Re: uclinux with RAM size problem

Re: [uClinux-dev] Re: uclinux with RAM size problem

Re: [uClinux-dev] Re: uclinux with RAM size problem

[uClinux-dev] Re: uclinux with RAM size problem

Re: [uClinux-dev] No response after the message "Freeing init memory" on IXP425

Re: [uClinux-dev] No response after the message "Freeing init memory" on IXP425

[uClinux-dev] [PATCH]Kernel support for WildFire and WildFireMod

[uClinux-dev] [PATCH]coldfire qspi driver

[uClinux-dev] [PATCH]spi bitbang with explicit "tx idle" output

[uClinux-dev] [PATCH]Access FEC MII via bit bang interface

[uClinux-dev] [PATCH]Driver for access to MCF IPS

[uClinux-dev] [PATCH]Alarm support for PCF8563 RTC

[uClinux-dev] [PATCH]Common names for MCF I2C

[uClinux-dev] [PATCH]Add various 5282 register definitions

[uClinux-dev] [PATCH]create /dev/rtc with correct dev node

[uClinux-dev] Patches for Intec coldfire 5282-based WildFire and WildFireMod

Re: [uClinux-dev] MicroBlaze petalinux keyboard problem

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