Re: [uClinux-dev] [PATCH 08/22] m68knommu: switch to GPIO init macros in ColdFire 528x init code
Hi Finn, On 27/04/12 12:49, Finn Thain wrote: On Thu, 26 Apr 2012, g...@snapgear.com wrote: + MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA), + MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB), I think the second label should be QB. Also affected is [PATCH 19/22] m68knommu: simplify the ColdFire 528x GPIO struct setup. Good catch! Thanks, I'll fix that up. Regards Greg Greg Ungerer -- Principal EngineerEMAIL: g...@snapgear.com SnapGear Group, McAfee PHONE: +61 7 3435 2888 8 Gardner Close FAX: +61 7 3217 5323 Milton, QLD, 4064, AustraliaWEB: http://www.SnapGear.com ___ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
Re: [uClinux-dev] [PATCH 08/22] m68knommu: switch to GPIO init macros in ColdFire 528x init code
On Thu, 26 Apr 2012, g...@snapgear.com wrote: + MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA), + MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB), I think the second label should be QB. Also affected is [PATCH 19/22] m68knommu: simplify the ColdFire 528x GPIO struct setup. Finn ___ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
[uClinux-dev] [PATCH 08/22] m68knommu: switch to GPIO init macros in ColdFire 528x init code
From: Greg Ungerer g...@uclinux.org Modify the GPIO setup table to use the mcfgpio.h macros for table init. Simplifies code and reduces line count significantly. We also need to rename some of the GPIO registers to be consistent with all other ColdFire parts (we can't use the new GPIO macros otherwise). Signed-off-by: Greg Ungerer g...@uclinux.org --- arch/m68k/include/asm/m528xsim.h | 179 +++- arch/m68k/platform/528x/gpio.c | 427 ++ 2 files changed, 103 insertions(+), 503 deletions(-) diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index 569476f..d63b99f 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -97,100 +97,81 @@ /* * GPIO registers */ -#define MCFGPIO_PORTA (MCF_IPSBAR + 0x0010) -#define MCFGPIO_PORTB (MCF_IPSBAR + 0x0011) -#define MCFGPIO_PORTC (MCF_IPSBAR + 0x0012) -#define MCFGPIO_PORTD (MCF_IPSBAR + 0x0013) -#define MCFGPIO_PORTE (MCF_IPSBAR + 0x0014) -#define MCFGPIO_PORTF (MCF_IPSBAR + 0x0015) -#define MCFGPIO_PORTG (MCF_IPSBAR + 0x0016) -#define MCFGPIO_PORTH (MCF_IPSBAR + 0x0017) -#define MCFGPIO_PORTJ (MCF_IPSBAR + 0x0018) -#define MCFGPIO_PORTDD (MCF_IPSBAR + 0x0019) -#define MCFGPIO_PORTEH (MCF_IPSBAR + 0x001A) -#define MCFGPIO_PORTEL (MCF_IPSBAR + 0x001B) -#define MCFGPIO_PORTAS (MCF_IPSBAR + 0x001C) -#define MCFGPIO_PORTQS (MCF_IPSBAR + 0x001D) -#define MCFGPIO_PORTSD (MCF_IPSBAR + 0x001E) -#define MCFGPIO_PORTTC (MCF_IPSBAR + 0x001F) -#define MCFGPIO_PORTTD (MCF_IPSBAR + 0x00100010) -#define MCFGPIO_PORTUA (MCF_IPSBAR + 0x00100011) - -#define MCFGPIO_DDRA (MCF_IPSBAR + 0x00100014) -#define MCFGPIO_DDRB (MCF_IPSBAR + 0x00100015) -#define MCFGPIO_DDRC (MCF_IPSBAR + 0x00100016) -#define MCFGPIO_DDRD (MCF_IPSBAR + 0x00100017) -#define MCFGPIO_DDRE (MCF_IPSBAR + 0x00100018) -#define MCFGPIO_DDRF (MCF_IPSBAR + 0x00100019) -#define MCFGPIO_DDRG (MCF_IPSBAR + 0x0010001A) -#define MCFGPIO_DDRH (MCF_IPSBAR + 0x0010001B) -#define MCFGPIO_DDRJ (MCF_IPSBAR + 0x0010001C) -#define MCFGPIO_DDRDD (MCF_IPSBAR + 0x0010001D) -#define MCFGPIO_DDREH (MCF_IPSBAR + 0x0010001E) -#define MCFGPIO_DDREL (MCF_IPSBAR + 0x0010001F) -#define MCFGPIO_DDRAS (MCF_IPSBAR + 0x00100020) -#define MCFGPIO_DDRQS (MCF_IPSBAR + 0x00100021) -#define MCFGPIO_DDRSD (MCF_IPSBAR + 0x00100022) -#define MCFGPIO_DDRTC (MCF_IPSBAR + 0x00100023) -#define MCFGPIO_DDRTD (MCF_IPSBAR + 0x00100024) -#define MCFGPIO_DDRUA (MCF_IPSBAR + 0x00100025) - -#define MCFGPIO_PORTAP (MCF_IPSBAR + 0x00100028) -#define MCFGPIO_PORTBP (MCF_IPSBAR + 0x00100029) -#define MCFGPIO_PORTCP (MCF_IPSBAR + 0x0010002A) -#define MCFGPIO_PORTDP (MCF_IPSBAR + 0x0010002B) -#define MCFGPIO_PORTEP (MCF_IPSBAR + 0x0010002C) -#define MCFGPIO_PORTFP (MCF_IPSBAR + 0x0010002D) -#define MCFGPIO_PORTGP (MCF_IPSBAR + 0x0010002E) -#define MCFGPIO_PORTHP (MCF_IPSBAR + 0x0010002F) -#define MCFGPIO_PORTJP (MCF_IPSBAR + 0x00100030) -#define MCFGPIO_PORTDDP(MCF_IPSBAR + 0x00100031) -#define MCFGPIO_PORTEHP(MCF_IPSBAR + 0x00100032) -#define MCFGPIO_PORTELP(MCF_IPSBAR + 0x00100033) -#define MCFGPIO_PORTASP(MCF_IPSBAR + 0x00100034) -#define MCFGPIO_PORTQSP(MCF_IPSBAR + 0x00100035) -#define MCFGPIO_PORTSDP(MCF_IPSBAR + 0x00100036) -#define MCFGPIO_PORTTCP(MCF_IPSBAR + 0x00100037) -#define MCFGPIO_PORTTDP(MCF_IPSBAR + 0x00100038) -#define MCFGPIO_PORTUAP(MCF_IPSBAR + 0x00100039) - -#define MCFGPIO_SETA (MCF_IPSBAR + 0x00100028) -#define MCFGPIO_SETB (MCF_IPSBAR + 0x00100029) -#define MCFGPIO_SETC (MCF_IPSBAR + 0x0010002A) -#define MCFGPIO_SETD (MCF_IPSBAR + 0x0010002B) -#define MCFGPIO_SETE (MCF_IPSBAR + 0x0010002C) -#define MCFGPIO_SETF (MCF_IPSBAR + 0x0010002D) -#define MCFGPIO_SETG (MCF_IPSBAR + 0x0010002E) -#define MCFGPIO_SETH (MCF_IPSBAR + 0x0010002F) -#define MCFGPIO_SETJ (MCF_IPSBAR + 0x00100030) -#define MCFGPIO_SETDD (MCF_IPSBAR + 0x00100031) -#define MCFGPIO_SETEH (MCF_IPSBAR + 0x00100032) -#define MCFGPIO_SETEL (MCF_IPSBAR + 0x00100033) -#define MCFGPIO_SETAS (MCF_IPSBAR + 0x00100034) -#define MCFGPIO_SETQS (MCF_IPSBAR + 0x00100035) -#define MCFGPIO_SETSD (MCF_IPSBAR + 0x00100036) -#define MCFGPIO_SETTC (MCF_IPSBAR + 0x00100037) -#define MCFGPIO_SETTD (MCF_IPSBAR + 0x00100038) -#define
